This is the 6.1.68 stable release
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Merge 6.1.68 into android14-6.1-lts
Changes in 6.1.68
vdpa/mlx5: preserve CVQ vringh index
hrtimers: Push pending hrtimers away from outgoing CPU earlier
i2c: designware: Fix corrupted memory seen in the ISR
netfilter: ipset: fix race condition between swap/destroy and kernel side add/del/test
zstd: Fix array-index-out-of-bounds UBSAN warning
tg3: Move the [rt]x_dropped counters to tg3_napi
tg3: Increment tx_dropped in tg3_tso_bug()
kconfig: fix memory leak from range properties
drm/amdgpu: correct chunk_ptr to a pointer to chunk.
x86: Introduce ia32_enabled()
x86/coco: Disable 32-bit emulation by default on TDX and SEV
x86/entry: Convert INT 0x80 emulation to IDTENTRY
x86/entry: Do not allow external 0x80 interrupts
x86/tdx: Allow 32-bit emulation by default
dt: dt-extract-compatibles: Handle cfile arguments in generator function
dt: dt-extract-compatibles: Don't follow symlinks when walking tree
platform/x86: asus-wmi: Move i8042 filter install to shared asus-wmi code
of: dynamic: Fix of_reconfig_get_state_change() return value documentation
platform/x86: wmi: Skip blocks with zero instances
ipv6: fix potential NULL deref in fib6_add()
octeontx2-pf: Add missing mutex lock in otx2_get_pauseparam
octeontx2-af: Check return value of nix_get_nixlf before using nixlf
hv_netvsc: rndis_filter needs to select NLS
r8152: Rename RTL8152_UNPLUG to RTL8152_INACCESSIBLE
r8152: Add RTL8152_INACCESSIBLE checks to more loops
r8152: Add RTL8152_INACCESSIBLE to r8156b_wait_loading_flash()
r8152: Add RTL8152_INACCESSIBLE to r8153_pre_firmware_1()
r8152: Add RTL8152_INACCESSIBLE to r8153_aldps_en()
mlxbf-bootctl: correctly identify secure boot with development keys
platform/mellanox: Add null pointer checks for devm_kasprintf()
platform/mellanox: Check devm_hwmon_device_register_with_groups() return value
arcnet: restoring support for multiple Sohard Arcnet cards
octeontx2-pf: consider both Rx and Tx packet stats for adaptive interrupt coalescing
net: stmmac: fix FPE events losing
xsk: Skip polling event check for unbound socket
octeontx2-af: fix a use-after-free in rvu_npa_register_reporters
i40e: Fix unexpected MFS warning message
iavf: validate tx_coalesce_usecs even if rx_coalesce_usecs is zero
net: bnxt: fix a potential use-after-free in bnxt_init_tc
tcp: fix mid stream window clamp.
ionic: fix snprintf format length warning
ionic: Fix dim work handling in split interrupt mode
ipv4: ip_gre: Avoid skb_pull() failure in ipgre_xmit()
net: atlantic: Fix NULL dereference of skb pointer in
net: hns: fix wrong head when modify the tx feature when sending packets
net: hns: fix fake link up on xge port
octeontx2-af: Adjust Tx credits when MCS external bypass is disabled
octeontx2-af: Fix mcs sa cam entries size
octeontx2-af: Fix mcs stats register address
octeontx2-af: Add missing mcs flr handler call
octeontx2-af: Update Tx link register range
dt-bindings: interrupt-controller: Allow #power-domain-cells
netfilter: nft_exthdr: add boolean DCCP option matching
netfilter: nf_tables: fix 'exist' matching on bigendian arches
netfilter: nf_tables: bail out on mismatching dynset and set expressions
netfilter: nf_tables: validate family when identifying table via handle
netfilter: xt_owner: Fix for unsafe access of sk->sk_socket
tcp: do not accept ACK of bytes we never sent
bpf: sockmap, updating the sg structure should also update curr
psample: Require 'CAP_NET_ADMIN' when joining "packets" group
drop_monitor: Require 'CAP_SYS_ADMIN' when joining "events" group
mm/damon/sysfs: eliminate potential uninitialized variable warning
tee: optee: Fix supplicant based device enumeration
RDMA/hns: Fix unnecessary err return when using invalid congest control algorithm
RDMA/irdma: Do not modify to SQD on error
RDMA/irdma: Add wait for suspend on SQD
arm64: dts: rockchip: Expand reg size of vdec node for RK3328
arm64: dts: rockchip: Expand reg size of vdec node for RK3399
ASoC: fsl_sai: Fix no frame sync clock issue on i.MX8MP
RDMA/rtrs-srv: Do not unconditionally enable irq
RDMA/rtrs-clt: Start hb after path_up
RDMA/rtrs-srv: Check return values while processing info request
RDMA/rtrs-srv: Free srv_mr iu only when always_invalidate is true
RDMA/rtrs-srv: Destroy path files after making sure no IOs in-flight
RDMA/rtrs-clt: Fix the max_send_wr setting
RDMA/rtrs-clt: Remove the warnings for req in_use check
RDMA/bnxt_re: Correct module description string
RDMA/irdma: Refactor error handling in create CQP
RDMA/irdma: Fix UAF in irdma_sc_ccq_get_cqe_info()
hwmon: (acpi_power_meter) Fix 4.29 MW bug
ASoC: codecs: lpass-tx-macro: set active_decimator correct default value
hwmon: (nzxt-kraken2) Fix error handling path in kraken2_probe()
ASoC: wm_adsp: fix memleak in wm_adsp_buffer_populate
RDMA/core: Fix umem iterator when PAGE_SIZE is greater then HCA pgsz
RDMA/irdma: Avoid free the non-cqp_request scratch
drm/bridge: tc358768: select CONFIG_VIDEOMODE_HELPERS
arm64: dts: imx8mq: drop usb3-resume-missing-cas from usb
arm64: dts: imx8mp: imx8mq: Add parkmode-disable-ss-quirk on DWC3
ARM: dts: imx6ul-pico: Describe the Ethernet PHY clock
tracing: Fix a warning when allocating buffered events fails
scsi: be2iscsi: Fix a memleak in beiscsi_init_wrb_handle()
ARM: imx: Check return value of devm_kasprintf in imx_mmdc_perf_init
ARM: dts: imx7: Declare timers compatible with fsl,imx6dl-gpt
ARM: dts: imx28-xea: Pass the 'model' property
riscv: fix misaligned access handling of C.SWSP and C.SDSP
md: introduce md_ro_state
md: don't leave 'MD_RECOVERY_FROZEN' in error path of md_set_readonly()
iommu: Avoid more races around device probe
rethook: Use __rcu pointer for rethook::handler
kprobes: consistent rcu api usage for kretprobe holder
ASoC: amd: yc: Fix non-functional mic on ASUS E1504FA
io_uring/af_unix: disable sending io_uring over sockets
nvme-pci: Add sleep quirk for Kingston drives
io_uring: fix mutex_unlock with unreferenced ctx
ALSA: usb-audio: Add Pioneer DJM-450 mixer controls
ALSA: pcm: fix out-of-bounds in snd_pcm_state_names
ALSA: hda/realtek: Enable headset on Lenovo M90 Gen5
ALSA: hda/realtek: add new Framework laptop to quirks
ALSA: hda/realtek: Add Framework laptop 16 to quirks
ring-buffer: Test last update in 32bit version of __rb_time_read()
nilfs2: fix missing error check for sb_set_blocksize call
nilfs2: prevent WARNING in nilfs_sufile_set_segment_usage()
cgroup_freezer: cgroup_freezing: Check if not frozen
checkstack: fix printed address
tracing: Always update snapshot buffer size
tracing: Disable snapshot buffer when stopping instance tracers
tracing: Fix incomplete locking when disabling buffered events
tracing: Fix a possible race when disabling buffered events
packet: Move reference count in packet_sock to atomic_long_t
r8169: fix rtl8125b PAUSE frames blasting when suspended
regmap: fix bogus error on regcache_sync success
platform/surface: aggregator: fix recv_buf() return value
hugetlb: fix null-ptr-deref in hugetlb_vma_lock_write
mm: fix oops when filemap_map_pmd() without prealloc_pte
powercap: DTPM: Fix missing cpufreq_cpu_put() calls
md/raid6: use valid sector values to determine if an I/O should wait on the reshape
arm64: dts: mediatek: mt7622: fix memory node warning check
arm64: dts: mediatek: mt8183-kukui-jacuzzi: fix dsi unnecessary cells properties
arm64: dts: mediatek: cherry: Fix interrupt cells for MT6360 on I2C7
arm64: dts: mediatek: mt8173-evb: Fix regulator-fixed node names
arm64: dts: mediatek: mt8195: Fix PM suspend/resume with venc clocks
arm64: dts: mediatek: mt8183: Fix unit address for scp reserved memory
arm64: dts: mediatek: mt8183: Move thermal-zones to the root node
arm64: dts: mediatek: mt8183-evb: Fix unit_address_vs_reg warning on ntc
binder: fix memory leaks of spam and pending work
coresight: etm4x: Make etm4_remove_dev() return void
coresight: etm4x: Remove bogous __exit annotation for some functions
hwtracing: hisi_ptt: Add dummy callback pmu::read()
misc: mei: client.c: return negative error code in mei_cl_write
misc: mei: client.c: fix problem of return '-EOVERFLOW' in mei_cl_write
LoongArch: BPF: Don't sign extend memory load operand
LoongArch: BPF: Don't sign extend function return value
ring-buffer: Force absolute timestamp on discard of event
tracing: Set actual size after ring buffer resize
tracing: Stop current tracer when resizing buffer
parisc: Reduce size of the bug_table on 64-bit kernel by half
parisc: Fix asm operand number out of range build error in bug table
arm64: dts: mediatek: add missing space before {
arm64: dts: mt8183: kukui: Fix underscores in node names
perf: Fix perf_event_validate_size()
x86/sev: Fix kernel crash due to late update to read-only ghcb_version
gpiolib: sysfs: Fix error handling on failed export
drm/amdgpu: fix memory overflow in the IB test
drm/amd/amdgpu: Fix warnings in amdgpu/amdgpu_display.c
drm/amdgpu: correct the amdgpu runtime dereference usage count
drm/amdgpu: Update ras eeprom support for smu v13_0_0 and v13_0_10
drm/amdgpu: Add EEPROM I2C address support for ip discovery
drm/amdgpu: Remove redundant I2C EEPROM address
drm/amdgpu: Decouple RAS EEPROM addresses from chips
drm/amdgpu: Add support for RAS table at 0x40000
drm/amdgpu: Remove second moot switch to set EEPROM I2C address
drm/amdgpu: Return from switch early for EEPROM I2C address
drm/amdgpu: simplify amdgpu_ras_eeprom.c
drm/amdgpu: Add I2C EEPROM support on smu v13_0_6
drm/amdgpu: Update EEPROM I2C address for smu v13_0_0
usb: gadget: f_hid: fix report descriptor allocation
serial: 8250_dw: Add ACPI ID for Granite Rapids-D UART
parport: Add support for Brainboxes IX/UC/PX parallel cards
cifs: Fix non-availability of dedup breaking generic/304
Revert "xhci: Loosen RPM as default policy to cover for AMD xHC 1.1"
smb: client: fix potential NULL deref in parse_dfs_referrals()
usb: typec: class: fix typec_altmode_put_partner to put plugs
ARM: PL011: Fix DMA support
serial: sc16is7xx: address RX timeout interrupt errata
serial: 8250: 8250_omap: Clear UART_HAS_RHR_IT_DIS bit
serial: 8250: 8250_omap: Do not start RX DMA on THRI interrupt
serial: 8250_omap: Add earlycon support for the AM654 UART controller
devcoredump: Send uevent once devcd is ready
x86/CPU/AMD: Check vendor in the AMD microcode callback
USB: gadget: core: adjust uevent timing on gadget unbind
cifs: Fix flushing, invalidation and file size with copy_file_range()
cifs: Fix flushing, invalidation and file size with FICLONE
MIPS: kernel: Clear FPU states when setting up kernel threads
KVM: s390/mm: Properly reset no-dat
KVM: SVM: Update EFER software model on CR0 trap for SEV-ES
MIPS: Loongson64: Reserve vgabios memory on boot
MIPS: Loongson64: Handle more memory types passed from firmware
MIPS: Loongson64: Enable DMA noncoherent support
netfilter: nft_set_pipapo: skip inactive elements during set walk
riscv: Kconfig: Add select ARM_AMBA to SOC_STARFIVE
drm/i915/display: Drop check for doublescan mode in modevalid
drm/i915/lvds: Use REG_BIT() & co.
drm/i915/sdvo: stop caching has_hdmi_monitor in struct intel_sdvo
drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
Linux 6.1.68
Change-Id: I0a824071a80b24dc4a2e0077f305b7cac42235b8
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
c9b484c69d
@ -6,3 +6,12 @@ Description:
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OP-TEE bus provides reference to registered drivers under this directory. The <uuid>
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matches Trusted Application (TA) driver and corresponding TA in secure OS. Drivers
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are free to create needed API under optee-ta-<uuid> directory.
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What: /sys/bus/tee/devices/optee-ta-<uuid>/need_supplicant
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Date: November 2023
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KernelVersion: 6.7
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Contact: op-tee@lists.trustedfirmware.org
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Description:
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Allows to distinguish whether an OP-TEE based TA/device requires user-space
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tee-supplicant to function properly or not. This attribute will be present for
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devices which depend on tee-supplicant to be running.
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@ -62,6 +62,9 @@ properties:
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- description: MPM pin number
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- description: GIC SPI number for the MPM pin
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'#power-domain-cells':
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const: 0
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required:
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- compatible
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- reg
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@ -93,4 +96,5 @@ examples:
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<86 183>,
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<90 260>,
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<91 260>;
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#power-domain-cells = <0>;
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};
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 1
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SUBLEVEL = 67
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SUBLEVEL = 68
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EXTRAVERSION =
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NAME = Curry Ramen
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@ -8,6 +8,7 @@
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#include "imx28-lwe.dtsi"
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/ {
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model = "Liebherr XEA board";
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compatible = "lwn,imx28-xea", "fsl,imx28";
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};
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@ -121,6 +121,8 @@ ethphy1: ethernet-phy@1 {
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max-speed = <100>;
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interrupt-parent = <&gpio5>;
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interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clock-names = "rmii-ref";
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};
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};
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};
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@ -454,7 +454,7 @@ iomuxc_lpsr: pinctrl@302c0000 {
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};
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gpt1: timer@302d0000 {
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compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
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compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
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reg = <0x302d0000 0x10000>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
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@ -463,7 +463,7 @@ gpt1: timer@302d0000 {
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};
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gpt2: timer@302e0000 {
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compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
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compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
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reg = <0x302e0000 0x10000>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
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@ -473,7 +473,7 @@ gpt2: timer@302e0000 {
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};
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gpt3: timer@302f0000 {
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compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
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compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
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reg = <0x302f0000 0x10000>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
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@ -483,7 +483,7 @@ gpt3: timer@302f0000 {
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};
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gpt4: timer@30300000 {
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compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
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compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
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reg = <0x30300000 0x10000>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
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@ -502,6 +502,10 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b
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name = devm_kasprintf(&pdev->dev,
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GFP_KERNEL, "mmdc%d", ret);
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if (!name) {
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ret = -ENOMEM;
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goto pmu_release_id;
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}
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pmu_mmdc->mmdc_ipg_clk = mmdc_ipg_clk;
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pmu_mmdc->devtype_data = (struct fsl_mmdc_devtype_data *)of_id->data;
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@ -524,9 +528,10 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b
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pmu_register_err:
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pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret);
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ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
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cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
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hrtimer_cancel(&pmu_mmdc->hrtimer);
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pmu_release_id:
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ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
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pmu_free:
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kfree(pmu_mmdc);
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return ret;
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@ -1301,6 +1301,7 @@ usb_dwc3_0: usb@38100000 {
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phys = <&usb3_phy0>, <&usb3_phy0>;
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phy-names = "usb2-phy", "usb3-phy";
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snps,gfladj-refclk-lpm-sel-quirk;
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snps,parkmode-disable-ss-quirk;
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};
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};
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@ -1343,6 +1344,7 @@ usb_dwc3_1: usb@38200000 {
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phys = <&usb3_phy1>, <&usb3_phy1>;
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phy-names = "usb2-phy", "usb3-phy";
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snps,gfladj-refclk-lpm-sel-quirk;
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snps,parkmode-disable-ss-quirk;
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};
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};
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@ -1431,7 +1431,7 @@ usb_dwc3_0: usb@38100000 {
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phys = <&usb3_phy0>, <&usb3_phy0>;
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phy-names = "usb2-phy", "usb3-phy";
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power-domains = <&pgc_otg1>;
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usb3-resume-missing-cas;
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snps,parkmode-disable-ss-quirk;
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status = "disabled";
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};
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@ -1463,7 +1463,7 @@ usb_dwc3_1: usb@38200000 {
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phys = <&usb3_phy1>, <&usb3_phy1>;
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phy-names = "usb2-phy", "usb3-phy";
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power-domains = <&pgc_otg2>;
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usb3-resume-missing-cas;
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snps,parkmode-disable-ss-quirk;
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status = "disabled";
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};
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@ -72,7 +72,7 @@ led-1 {
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};
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};
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memory {
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memory@40000000 {
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reg = <0 0x40000000 0 0x40000000>;
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};
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@ -54,7 +54,7 @@ key-wps {
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};
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};
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memory {
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memory@40000000 {
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reg = <0 0x40000000 0 0x20000000>;
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};
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@ -43,7 +43,7 @@ extcon_usb: extcon_iddig {
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id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
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};
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usb_p1_vbus: regulator@0 {
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usb_p1_vbus: regulator-usb-p1 {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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@ -52,7 +52,7 @@ usb_p1_vbus: regulator@0 {
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enable-active-high;
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};
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usb_p0_vbus: regulator@1 {
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usb_p0_vbus: regulator-usb-p0 {
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compatible = "regulator-fixed";
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regulator-name = "vbus";
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regulator-min-microvolt = <5000000>;
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@ -30,14 +30,14 @@ reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
scp_mem_reserved: scp_mem_region {
|
||||
scp_mem_reserved: memory@50000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x50000000 0 0x2900000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
ntc@0 {
|
||||
thermal-sensor {
|
||||
compatible = "murata,ncp03wf104";
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <390000>;
|
||||
@ -139,8 +139,8 @@ &mmc1 {
|
||||
};
|
||||
|
||||
&pio {
|
||||
i2c_pins_0: i2c0{
|
||||
pins_i2c{
|
||||
i2c_pins_0: i2c0 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
|
||||
<PINMUX_GPIO83__FUNC_SCL0>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -148,8 +148,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
i2c_pins_1: i2c1{
|
||||
pins_i2c{
|
||||
i2c_pins_1: i2c1 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
|
||||
<PINMUX_GPIO84__FUNC_SCL1>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -157,8 +157,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
i2c_pins_2: i2c2{
|
||||
pins_i2c{
|
||||
i2c_pins_2: i2c2 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
|
||||
<PINMUX_GPIO104__FUNC_SDA2>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -166,8 +166,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
i2c_pins_3: i2c3{
|
||||
pins_i2c{
|
||||
i2c_pins_3: i2c3 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
|
||||
<PINMUX_GPIO51__FUNC_SDA3>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -175,8 +175,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
i2c_pins_4: i2c4{
|
||||
pins_i2c{
|
||||
i2c_pins_4: i2c4 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
|
||||
<PINMUX_GPIO106__FUNC_SDA4>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -184,8 +184,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
i2c_pins_5: i2c5{
|
||||
pins_i2c{
|
||||
i2c_pins_5: i2c5 {
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
||||
<PINMUX_GPIO49__FUNC_SDA5>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -193,8 +193,8 @@ pins_i2c{
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_0: spi0{
|
||||
pins_spi{
|
||||
spi_pins_0: spi0 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
|
||||
<PINMUX_GPIO86__FUNC_SPI0_CSB>,
|
||||
<PINMUX_GPIO87__FUNC_SPI0_MO>,
|
||||
@ -308,8 +308,8 @@ pins_clk {
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_1: spi1{
|
||||
pins_spi{
|
||||
spi_pins_1: spi1 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
|
||||
<PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
|
||||
<PINMUX_GPIO163__FUNC_SPI1_A_MO>,
|
||||
@ -318,8 +318,8 @@ pins_spi{
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_2: spi2{
|
||||
pins_spi{
|
||||
spi_pins_2: spi2 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
|
||||
<PINMUX_GPIO1__FUNC_SPI2_MO>,
|
||||
<PINMUX_GPIO2__FUNC_SPI2_CLK>,
|
||||
@ -328,8 +328,8 @@ pins_spi{
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_3: spi3{
|
||||
pins_spi{
|
||||
spi_pins_3: spi3 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
|
||||
<PINMUX_GPIO22__FUNC_SPI3_CSB>,
|
||||
<PINMUX_GPIO23__FUNC_SPI3_MO>,
|
||||
@ -338,8 +338,8 @@ pins_spi{
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_4: spi4{
|
||||
pins_spi{
|
||||
spi_pins_4: spi4 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
|
||||
<PINMUX_GPIO18__FUNC_SPI4_CSB>,
|
||||
<PINMUX_GPIO19__FUNC_SPI4_MO>,
|
||||
@ -348,8 +348,8 @@ pins_spi{
|
||||
};
|
||||
};
|
||||
|
||||
spi_pins_5: spi5{
|
||||
pins_spi{
|
||||
spi_pins_5: spi5 {
|
||||
pins_spi {
|
||||
pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
|
||||
<PINMUX_GPIO14__FUNC_SPI5_CSB>,
|
||||
<PINMUX_GPIO15__FUNC_SPI5_MO>,
|
||||
|
||||
@ -101,6 +101,8 @@ cros_ec_pwm: pwm {
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
/delete-property/#size-cells;
|
||||
/delete-property/#address-cells;
|
||||
/delete-node/panel@0;
|
||||
ports {
|
||||
port {
|
||||
@ -437,20 +439,20 @@ pins2 {
|
||||
};
|
||||
|
||||
touchscreen_pins: touchscreen-pins {
|
||||
touch_int_odl {
|
||||
touch-int-odl {
|
||||
pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
touch_rst_l {
|
||||
touch-rst-l {
|
||||
pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
trackpad_pins: trackpad-pins {
|
||||
trackpad_int {
|
||||
trackpad-int {
|
||||
pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
|
||||
input-enable;
|
||||
bias-disable; /* pulled externally */
|
||||
|
||||
@ -108,7 +108,7 @@ reserved_memory: reserved-memory {
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
scp_mem_reserved: scp_mem_region {
|
||||
scp_mem_reserved: memory@50000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x50000000 0 0x2900000>;
|
||||
no-map;
|
||||
@ -423,7 +423,7 @@ &mt6358_vsim2_reg {
|
||||
|
||||
&pio {
|
||||
aud_pins_default: audiopins {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
|
||||
<PINMUX_GPIO98__FUNC_I2S2_BCK>,
|
||||
<PINMUX_GPIO101__FUNC_I2S2_LRCK>,
|
||||
@ -445,7 +445,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
aud_pins_tdm_out_on: audiotdmouton {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
|
||||
<PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
|
||||
<PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
|
||||
@ -457,7 +457,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
aud_pins_tdm_out_off: audiotdmoutoff {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
|
||||
<PINMUX_GPIO170__FUNC_GPIO170>,
|
||||
<PINMUX_GPIO171__FUNC_GPIO171>,
|
||||
@ -471,13 +471,13 @@ pins_bus {
|
||||
};
|
||||
|
||||
bt_pins: bt-pins {
|
||||
pins_bt_en {
|
||||
pins-bt-en {
|
||||
pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
ec_ap_int_odl: ec_ap_int_odl {
|
||||
ec_ap_int_odl: ec-ap-int-odl {
|
||||
pins1 {
|
||||
pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
|
||||
input-enable;
|
||||
@ -485,7 +485,7 @@ pins1 {
|
||||
};
|
||||
};
|
||||
|
||||
h1_int_od_l: h1_int_od_l {
|
||||
h1_int_od_l: h1-int-od-l {
|
||||
pins1 {
|
||||
pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
|
||||
input-enable;
|
||||
@ -493,7 +493,7 @@ pins1 {
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
|
||||
<PINMUX_GPIO83__FUNC_SCL0>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -502,7 +502,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
|
||||
<PINMUX_GPIO84__FUNC_SCL1>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -511,7 +511,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
|
||||
<PINMUX_GPIO104__FUNC_SDA2>;
|
||||
bias-disable;
|
||||
@ -520,7 +520,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c3_pins: i2c3 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
|
||||
<PINMUX_GPIO51__FUNC_SDA3>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -529,7 +529,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
|
||||
<PINMUX_GPIO106__FUNC_SDA4>;
|
||||
bias-disable;
|
||||
@ -538,7 +538,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c5_pins: i2c5 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
||||
<PINMUX_GPIO49__FUNC_SDA5>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -547,7 +547,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6 {
|
||||
pins_bus {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
|
||||
<PINMUX_GPIO12__FUNC_SDA6>;
|
||||
bias-disable;
|
||||
@ -555,7 +555,7 @@ pins_bus {
|
||||
};
|
||||
|
||||
mmc0_pins_default: mmc0-pins-default {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||
@ -570,13 +570,13 @@ pins_cmd_dat {
|
||||
mediatek,pull-up-adv = <01>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pins-rst {
|
||||
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <01>;
|
||||
@ -584,7 +584,7 @@ pins_rst {
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0-pins-uhs {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||
@ -599,19 +599,19 @@ pins_cmd_dat {
|
||||
mediatek,pull-up-adv = <01>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_ds {
|
||||
pins-ds {
|
||||
pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pins-rst {
|
||||
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-up-adv = <01>;
|
||||
@ -619,7 +619,7 @@ pins_rst {
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1-pins-default {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||
@ -629,7 +629,7 @@ pins_cmd_dat {
|
||||
mediatek,pull-up-adv = <10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||
input-enable;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
@ -637,7 +637,7 @@ pins_clk {
|
||||
};
|
||||
|
||||
mmc1_pins_uhs: mmc1-pins-uhs {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||
@ -648,7 +648,7 @@ pins_cmd_dat {
|
||||
mediatek,pull-up-adv = <10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
@ -656,15 +656,15 @@ pins_clk {
|
||||
};
|
||||
};
|
||||
|
||||
panel_pins_default: panel_pins_default {
|
||||
panel_reset {
|
||||
panel_pins_default: panel-pins-default {
|
||||
panel-reset {
|
||||
pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
|
||||
output-low;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
pwm0_pin_default: pwm0_pin_default {
|
||||
pwm0_pin_default: pwm0-pin-default {
|
||||
pins1 {
|
||||
pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
|
||||
output-high;
|
||||
@ -676,14 +676,14 @@ pins2 {
|
||||
};
|
||||
|
||||
scp_pins: scp {
|
||||
pins_scp_uart {
|
||||
pins-scp-uart {
|
||||
pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
|
||||
<PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0_pins: spi0 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
|
||||
<PINMUX_GPIO86__FUNC_GPIO86>,
|
||||
<PINMUX_GPIO87__FUNC_SPI0_MO>,
|
||||
@ -693,7 +693,7 @@ pins_spi{
|
||||
};
|
||||
|
||||
spi1_pins: spi1 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
|
||||
<PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
|
||||
<PINMUX_GPIO163__FUNC_SPI1_A_MO>,
|
||||
@ -703,20 +703,20 @@ pins_spi{
|
||||
};
|
||||
|
||||
spi2_pins: spi2 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
|
||||
<PINMUX_GPIO1__FUNC_SPI2_MO>,
|
||||
<PINMUX_GPIO2__FUNC_SPI2_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
pins_spi_mi {
|
||||
pins-spi-mi {
|
||||
pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
|
||||
mediatek,pull-down-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
spi3_pins: spi3 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
|
||||
<PINMUX_GPIO22__FUNC_SPI3_CSB>,
|
||||
<PINMUX_GPIO23__FUNC_SPI3_MO>,
|
||||
@ -726,7 +726,7 @@ pins_spi{
|
||||
};
|
||||
|
||||
spi4_pins: spi4 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
|
||||
<PINMUX_GPIO18__FUNC_SPI4_CSB>,
|
||||
<PINMUX_GPIO19__FUNC_SPI4_MO>,
|
||||
@ -736,7 +736,7 @@ pins_spi{
|
||||
};
|
||||
|
||||
spi5_pins: spi5 {
|
||||
pins_spi{
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
|
||||
<PINMUX_GPIO14__FUNC_SPI5_CSB>,
|
||||
<PINMUX_GPIO15__FUNC_SPI5_MO>,
|
||||
@ -746,63 +746,63 @@ pins_spi{
|
||||
};
|
||||
|
||||
uart0_pins_default: uart0-pins-default {
|
||||
pins_rx {
|
||||
pins-rx {
|
||||
pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pins-tx {
|
||||
pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins_default: uart1-pins-default {
|
||||
pins_rx {
|
||||
pins-rx {
|
||||
pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pins-tx {
|
||||
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
||||
};
|
||||
pins_rts {
|
||||
pins-rts {
|
||||
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
||||
output-enable;
|
||||
};
|
||||
pins_cts {
|
||||
pins-cts {
|
||||
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins_sleep: uart1-pins-sleep {
|
||||
pins_rx {
|
||||
pins-rx {
|
||||
pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pins-tx {
|
||||
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
||||
};
|
||||
pins_rts {
|
||||
pins-rts {
|
||||
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
||||
output-enable;
|
||||
};
|
||||
pins_cts {
|
||||
pins-cts {
|
||||
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pins_pwrseq: wifi-pins-pwrseq {
|
||||
pins_wifi_enable {
|
||||
pins-wifi-enable {
|
||||
pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pins_wakeup: wifi-pins-wakeup {
|
||||
pins_wifi_wakeup {
|
||||
pins-wifi-wakeup {
|
||||
pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
@ -178,7 +178,7 @@ &mmc1 {
|
||||
|
||||
&pio {
|
||||
i2c_pins_0: i2c0 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
|
||||
<PINMUX_GPIO83__FUNC_SCL0>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -187,7 +187,7 @@ pins_i2c{
|
||||
};
|
||||
|
||||
i2c_pins_1: i2c1 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
|
||||
<PINMUX_GPIO84__FUNC_SCL1>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -196,7 +196,7 @@ pins_i2c{
|
||||
};
|
||||
|
||||
i2c_pins_2: i2c2 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
|
||||
<PINMUX_GPIO104__FUNC_SDA2>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -205,7 +205,7 @@ pins_i2c{
|
||||
};
|
||||
|
||||
i2c_pins_3: i2c3 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
|
||||
<PINMUX_GPIO51__FUNC_SDA3>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -214,7 +214,7 @@ pins_i2c{
|
||||
};
|
||||
|
||||
i2c_pins_4: i2c4 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
|
||||
<PINMUX_GPIO106__FUNC_SDA4>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
@ -223,7 +223,7 @@ pins_i2c{
|
||||
};
|
||||
|
||||
i2c_pins_5: i2c5 {
|
||||
pins_i2c{
|
||||
pins_i2c {
|
||||
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
||||
<PINMUX_GPIO49__FUNC_SDA5>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
|
||||
@ -1136,127 +1136,6 @@ thermal: thermal@1100b000 {
|
||||
nvmem-cell-names = "calibration-data";
|
||||
};
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <100>;
|
||||
polling-delay = <500>;
|
||||
thermal-sensors = <&thermal 0>;
|
||||
sustainable-power = <5000>;
|
||||
|
||||
trips {
|
||||
threshold: trip-point0 {
|
||||
temperature = <68000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
target: trip-point1 {
|
||||
temperature = <80000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit: cpu-crit {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu0
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu1
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu2
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu3
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>;
|
||||
contribution = <3072>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu4
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu5
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu6
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu7
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* The tzts1 ~ tzts6 don't need to polling */
|
||||
/* The tzts1 ~ tzts6 don't need to thermal throttle */
|
||||
|
||||
tzts1: tzts1 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 1>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts2: tzts2 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 2>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts3: tzts3 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 3>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts4: tzts4 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 4>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts5: tzts5 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 5>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tztsABB: tztsABB {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 6>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
};
|
||||
|
||||
pwm0: pwm@1100e000 {
|
||||
compatible = "mediatek,mt8183-disp-pwm";
|
||||
reg = <0 0x1100e000 0 0x1000>;
|
||||
@ -2031,4 +1910,125 @@ larb3: larb@1a002000 {
|
||||
power-domains = <&spm MT8183_POWER_DOMAIN_CAM>;
|
||||
};
|
||||
};
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <100>;
|
||||
polling-delay = <500>;
|
||||
thermal-sensors = <&thermal 0>;
|
||||
sustainable-power = <5000>;
|
||||
|
||||
trips {
|
||||
threshold: trip-point0 {
|
||||
temperature = <68000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
target: trip-point1 {
|
||||
temperature = <80000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit: cpu-crit {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu0
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu1
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu2
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu3
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>;
|
||||
contribution = <3072>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu4
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu5
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu6
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>,
|
||||
<&cpu7
|
||||
THERMAL_NO_LIMIT
|
||||
THERMAL_NO_LIMIT>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* The tzts1 ~ tzts6 don't need to polling */
|
||||
/* The tzts1 ~ tzts6 don't need to thermal throttle */
|
||||
|
||||
tzts1: tzts1 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 1>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts2: tzts2 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 2>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts3: tzts3 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 3>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts4: tzts4 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 4>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tzts5: tzts5 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 5>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
|
||||
tztsABB: tztsABB {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 6>;
|
||||
sustainable-power = <5000>;
|
||||
trips {};
|
||||
cooling-maps {};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -207,7 +207,7 @@ &i2c7 {
|
||||
pinctrl-0 = <&i2c7_pins>;
|
||||
|
||||
pmic@34 {
|
||||
#interrupt-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "mediatek,mt6360";
|
||||
reg = <0x34>;
|
||||
interrupt-controller;
|
||||
|
||||
@ -471,6 +471,8 @@ power-domain@MT8195_POWER_DOMAIN_VDEC1 {
|
||||
|
||||
power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {
|
||||
reg = <MT8195_POWER_DOMAIN_VENC_CORE1>;
|
||||
clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>;
|
||||
clock-names = "venc1-larb";
|
||||
mediatek,infracfg = <&infracfg_ao>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
@ -533,6 +535,8 @@ power-domain@MT8195_POWER_DOMAIN_VDEC2 {
|
||||
|
||||
power-domain@MT8195_POWER_DOMAIN_VENC {
|
||||
reg = <MT8195_POWER_DOMAIN_VENC>;
|
||||
clocks = <&vencsys CLK_VENC_LARB>;
|
||||
clock-names = "venc0-larb";
|
||||
mediatek,infracfg = <&infracfg_ao>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
@ -1985,7 +1989,7 @@ larb20: larb@1b010000 {
|
||||
reg = <0 0x1b010000 0 0x1000>;
|
||||
mediatek,larb-id = <20>;
|
||||
mediatek,smi = <&smi_common_vpp>;
|
||||
clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>,
|
||||
clocks = <&vencsys_core1 CLK_VENC_CORE1_VENC>,
|
||||
<&vencsys_core1 CLK_VENC_CORE1_GALS>,
|
||||
<&vppsys0 CLK_VPP0_GALS_VDO0_VDO1_VENCSYS_CORE1>;
|
||||
clock-names = "apb", "smi", "gals";
|
||||
|
||||
@ -666,7 +666,7 @@ vpu_mmu: iommu@ff350800 {
|
||||
|
||||
vdec: video-codec@ff360000 {
|
||||
compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec";
|
||||
reg = <0x0 0xff360000 0x0 0x400>;
|
||||
reg = <0x0 0xff360000 0x0 0x480>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
|
||||
<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
|
||||
|
||||
@ -1062,7 +1062,9 @@ power-domain@RK3399_PD_VCODEC {
|
||||
power-domain@RK3399_PD_VDU {
|
||||
reg = <RK3399_PD_VDU>;
|
||||
clocks = <&cru ACLK_VDU>,
|
||||
<&cru HCLK_VDU>;
|
||||
<&cru HCLK_VDU>,
|
||||
<&cru SCLK_VDU_CA>,
|
||||
<&cru SCLK_VDU_CORE>;
|
||||
pm_qos = <&qos_video_m1_r>,
|
||||
<&qos_video_m1_w>;
|
||||
#power-domain-cells = <0>;
|
||||
@ -1338,7 +1340,7 @@ vpu_mmu: iommu@ff650800 {
|
||||
|
||||
vdec: video-codec@ff660000 {
|
||||
compatible = "rockchip,rk3399-vdec";
|
||||
reg = <0x0 0xff660000 0x0 0x400>;
|
||||
reg = <0x0 0xff660000 0x0 0x480>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
|
||||
<&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
|
||||
|
||||
@ -796,8 +796,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
||||
|
||||
/* function return */
|
||||
case BPF_JMP | BPF_EXIT:
|
||||
emit_sext_32(ctx, regmap[BPF_REG_0], true);
|
||||
|
||||
if (i == ctx->prog->len - 1)
|
||||
break;
|
||||
|
||||
@ -844,14 +842,8 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
||||
}
|
||||
break;
|
||||
case BPF_DW:
|
||||
if (is_signed_imm12(off)) {
|
||||
emit_insn(ctx, ldd, dst, src, off);
|
||||
} else if (is_signed_imm14(off)) {
|
||||
emit_insn(ctx, ldptrd, dst, src, off);
|
||||
} else {
|
||||
move_imm(ctx, t1, off, is32);
|
||||
emit_insn(ctx, ldxd, dst, src, t1);
|
||||
}
|
||||
move_imm(ctx, t1, off, is32);
|
||||
emit_insn(ctx, ldxd, dst, src, t1);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -483,6 +483,7 @@ config MACH_LOONGSON2EF
|
||||
|
||||
config MACH_LOONGSON64
|
||||
bool "Loongson 64-bit family of machines"
|
||||
select ARCH_DMA_DEFAULT_COHERENT
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select ARCH_MIGHT_HAVE_PC_PARPORT
|
||||
select ARCH_MIGHT_HAVE_PC_SERIO
|
||||
@ -1304,6 +1305,7 @@ config CPU_LOONGSON64
|
||||
select CPU_SUPPORTS_MSA
|
||||
select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
|
||||
select CPU_MIPSR2_IRQ_VI
|
||||
select DMA_NONCOHERENT
|
||||
select WEAK_ORDERING
|
||||
select WEAK_REORDERING_BEYOND_LLSC
|
||||
select MIPS_ASID_BITS_VARIABLE
|
||||
|
||||
@ -14,7 +14,11 @@
|
||||
#define ADAPTER_ROM 8
|
||||
#define ACPI_TABLE 9
|
||||
#define SMBIOS_TABLE 10
|
||||
#define MAX_MEMORY_TYPE 11
|
||||
#define UMA_VIDEO_RAM 11
|
||||
#define VUMA_VIDEO_RAM 12
|
||||
#define MAX_MEMORY_TYPE 13
|
||||
|
||||
#define MEM_SIZE_IS_IN_BYTES (1 << 31)
|
||||
|
||||
#define LOONGSON3_BOOT_MEM_MAP_MAX 128
|
||||
struct efi_memory_map_loongson {
|
||||
@ -117,7 +121,8 @@ struct irq_source_routing_table {
|
||||
u64 pci_io_start_addr;
|
||||
u64 pci_io_end_addr;
|
||||
u64 pci_config_addr;
|
||||
u32 dma_mask_bits;
|
||||
u16 dma_mask_bits;
|
||||
u16 dma_noncoherent;
|
||||
} __packed;
|
||||
|
||||
struct interface_info {
|
||||
|
||||
@ -121,6 +121,19 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
|
||||
/* Put the stack after the struct pt_regs. */
|
||||
childksp = (unsigned long) childregs;
|
||||
p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK;
|
||||
|
||||
/*
|
||||
* New tasks lose permission to use the fpu. This accelerates context
|
||||
* switching for most programs since they don't use the fpu.
|
||||
*/
|
||||
clear_tsk_thread_flag(p, TIF_USEDFPU);
|
||||
clear_tsk_thread_flag(p, TIF_USEDMSA);
|
||||
clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_FPAFF
|
||||
clear_tsk_thread_flag(p, TIF_FPUBOUND);
|
||||
#endif /* CONFIG_MIPS_MT_FPAFF */
|
||||
|
||||
if (unlikely(args->fn)) {
|
||||
/* kernel thread */
|
||||
unsigned long status = p->thread.cp0_status;
|
||||
@ -149,20 +162,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
|
||||
p->thread.reg29 = (unsigned long) childregs;
|
||||
p->thread.reg31 = (unsigned long) ret_from_fork;
|
||||
|
||||
/*
|
||||
* New tasks lose permission to use the fpu. This accelerates context
|
||||
* switching for most programs since they don't use the fpu.
|
||||
*/
|
||||
childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
|
||||
|
||||
clear_tsk_thread_flag(p, TIF_USEDFPU);
|
||||
clear_tsk_thread_flag(p, TIF_USEDMSA);
|
||||
clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_FPAFF
|
||||
clear_tsk_thread_flag(p, TIF_FPUBOUND);
|
||||
#endif /* CONFIG_MIPS_MT_FPAFF */
|
||||
|
||||
#ifdef CONFIG_MIPS_FP_SUPPORT
|
||||
atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
|
||||
#endif
|
||||
|
||||
@ -13,6 +13,8 @@
|
||||
* Copyright (C) 2009 Lemote Inc.
|
||||
* Author: Wu Zhangjin, wuzhangjin@gmail.com
|
||||
*/
|
||||
|
||||
#include <linux/dma-map-ops.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/pci_ids.h>
|
||||
#include <asm/bootinfo.h>
|
||||
@ -147,8 +149,14 @@ void __init prom_lefi_init_env(void)
|
||||
|
||||
loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
|
||||
if (loongson_sysconf.dma_mask_bits < 32 ||
|
||||
loongson_sysconf.dma_mask_bits > 64)
|
||||
loongson_sysconf.dma_mask_bits > 64) {
|
||||
loongson_sysconf.dma_mask_bits = 32;
|
||||
dma_default_coherent = true;
|
||||
} else {
|
||||
dma_default_coherent = !eirq_source->dma_noncoherent;
|
||||
}
|
||||
|
||||
pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off");
|
||||
|
||||
loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
|
||||
loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
|
||||
|
||||
@ -49,8 +49,7 @@ void virtual_early_config(void)
|
||||
void __init szmem(unsigned int node)
|
||||
{
|
||||
u32 i, mem_type;
|
||||
static unsigned long num_physpages;
|
||||
u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size;
|
||||
phys_addr_t node_id, mem_start, mem_size;
|
||||
|
||||
/* Otherwise come from DTB */
|
||||
if (loongson_sysconf.fw_interface != LOONGSON_LEFI)
|
||||
@ -64,30 +63,46 @@ void __init szmem(unsigned int node)
|
||||
|
||||
mem_type = loongson_memmap->map[i].mem_type;
|
||||
mem_size = loongson_memmap->map[i].mem_size;
|
||||
mem_start = loongson_memmap->map[i].mem_start;
|
||||
|
||||
/* Memory size comes in MB if MEM_SIZE_IS_IN_BYTES not set */
|
||||
if (mem_size & MEM_SIZE_IS_IN_BYTES)
|
||||
mem_size &= ~MEM_SIZE_IS_IN_BYTES;
|
||||
else
|
||||
mem_size = mem_size << 20;
|
||||
|
||||
mem_start = (node_id << 44) | loongson_memmap->map[i].mem_start;
|
||||
|
||||
switch (mem_type) {
|
||||
case SYSTEM_RAM_LOW:
|
||||
case SYSTEM_RAM_HIGH:
|
||||
start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
|
||||
node_psize = (mem_size << 20) >> PAGE_SHIFT;
|
||||
end_pfn = start_pfn + node_psize;
|
||||
num_physpages += node_psize;
|
||||
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
|
||||
(u32)node_id, mem_type, mem_start, mem_size);
|
||||
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
|
||||
start_pfn, end_pfn, num_physpages);
|
||||
memblock_add_node(PFN_PHYS(start_pfn),
|
||||
PFN_PHYS(node_psize), node,
|
||||
case UMA_VIDEO_RAM:
|
||||
pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes usable\n",
|
||||
(u32)node_id, mem_type, &mem_start, &mem_size);
|
||||
memblock_add_node(mem_start, mem_size, node,
|
||||
MEMBLOCK_NONE);
|
||||
break;
|
||||
case SYSTEM_RAM_RESERVED:
|
||||
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
|
||||
(u32)node_id, mem_type, mem_start, mem_size);
|
||||
memblock_reserve(((node_id << 44) + mem_start), mem_size << 20);
|
||||
case VIDEO_ROM:
|
||||
case ADAPTER_ROM:
|
||||
case ACPI_TABLE:
|
||||
case SMBIOS_TABLE:
|
||||
pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes reserved\n",
|
||||
(u32)node_id, mem_type, &mem_start, &mem_size);
|
||||
memblock_reserve(mem_start, mem_size);
|
||||
break;
|
||||
/* We should not reserve VUMA_VIDEO_RAM as it overlaps with MMIO */
|
||||
case VUMA_VIDEO_RAM:
|
||||
default:
|
||||
pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes unhandled\n",
|
||||
(u32)node_id, mem_type, &mem_start, &mem_size);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Reserve vgabios if it comes from firmware */
|
||||
if (loongson_sysconf.vgabios_addr)
|
||||
memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr),
|
||||
SZ_256K);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_NUMA
|
||||
|
||||
@ -105,9 +105,12 @@ config ARCH_HAS_ILOG2_U64
|
||||
default n
|
||||
|
||||
config GENERIC_BUG
|
||||
bool
|
||||
default y
|
||||
def_bool y
|
||||
depends on BUG
|
||||
select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
|
||||
|
||||
config GENERIC_BUG_RELATIVE_POINTERS
|
||||
bool
|
||||
|
||||
config GENERIC_HWEIGHT
|
||||
bool
|
||||
|
||||
@ -17,26 +17,27 @@
|
||||
#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
|
||||
#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
|
||||
|
||||
#if defined(CONFIG_64BIT)
|
||||
#define ASM_WORD_INSN ".dword\t"
|
||||
#ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS
|
||||
# define __BUG_REL(val) ".word " __stringify(val) " - ."
|
||||
#else
|
||||
#define ASM_WORD_INSN ".word\t"
|
||||
# define __BUG_REL(val) ".word " __stringify(val)
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_DEBUG_BUGVERBOSE
|
||||
#define BUG() \
|
||||
do { \
|
||||
asm volatile("\n" \
|
||||
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
|
||||
"\t.pushsection __bug_table,\"a\"\n" \
|
||||
"\t.align %4\n" \
|
||||
"2:\t" ASM_WORD_INSN "1b, %c0\n" \
|
||||
"\t.align 4\n" \
|
||||
"2:\t" __BUG_REL(1b) "\n" \
|
||||
"\t" __BUG_REL(%c0) "\n" \
|
||||
"\t.short %1, %2\n" \
|
||||
"\t.blockz %3-2*%4-2*2\n" \
|
||||
"\t.blockz %3-2*4-2*2\n" \
|
||||
"\t.popsection" \
|
||||
: : "i" (__FILE__), "i" (__LINE__), \
|
||||
"i" (0), "i" (sizeof(struct bug_entry)), \
|
||||
"i" (sizeof(long)) ); \
|
||||
"i" (0), "i" (sizeof(struct bug_entry)) ); \
|
||||
unreachable(); \
|
||||
} while(0)
|
||||
|
||||
@ -54,15 +55,15 @@
|
||||
asm volatile("\n" \
|
||||
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
|
||||
"\t.pushsection __bug_table,\"a\"\n" \
|
||||
"\t.align %4\n" \
|
||||
"2:\t" ASM_WORD_INSN "1b, %c0\n" \
|
||||
"\t.align 4\n" \
|
||||
"2:\t" __BUG_REL(1b) "\n" \
|
||||
"\t" __BUG_REL(%c0) "\n" \
|
||||
"\t.short %1, %2\n" \
|
||||
"\t.blockz %3-2*%4-2*2\n" \
|
||||
"\t.blockz %3-2*4-2*2\n" \
|
||||
"\t.popsection" \
|
||||
: : "i" (__FILE__), "i" (__LINE__), \
|
||||
"i" (BUGFLAG_WARNING|(flags)), \
|
||||
"i" (sizeof(struct bug_entry)), \
|
||||
"i" (sizeof(long)) ); \
|
||||
"i" (sizeof(struct bug_entry)) ); \
|
||||
} while(0)
|
||||
#else
|
||||
#define __WARN_FLAGS(flags) \
|
||||
@ -70,14 +71,13 @@
|
||||
asm volatile("\n" \
|
||||
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
|
||||
"\t.pushsection __bug_table,\"a\"\n" \
|
||||
"\t.align %2\n" \
|
||||
"2:\t" ASM_WORD_INSN "1b\n" \
|
||||
"\t.align 4\n" \
|
||||
"2:\t" __BUG_REL(1b) "\n" \
|
||||
"\t.short %0\n" \
|
||||
"\t.blockz %1-%2-2\n" \
|
||||
"\t.blockz %1-4-2\n" \
|
||||
"\t.popsection" \
|
||||
: : "i" (BUGFLAG_WARNING|(flags)), \
|
||||
"i" (sizeof(struct bug_entry)), \
|
||||
"i" (sizeof(long)) ); \
|
||||
"i" (sizeof(struct bug_entry)) ); \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
|
||||
@ -23,6 +23,7 @@ config SOC_STARFIVE
|
||||
select PINCTRL
|
||||
select RESET_CONTROLLER
|
||||
select SIFIVE_PLIC
|
||||
select ARM_AMBA
|
||||
help
|
||||
This enables support for StarFive SoC platform hardware.
|
||||
|
||||
|
||||
@ -342,16 +342,14 @@ int handle_misaligned_store(struct pt_regs *regs)
|
||||
} else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
|
||||
len = 8;
|
||||
val.data_ulong = GET_RS2S(insn, regs);
|
||||
} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP &&
|
||||
((insn >> SH_RD) & 0x1f)) {
|
||||
} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP) {
|
||||
len = 8;
|
||||
val.data_ulong = GET_RS2C(insn, regs);
|
||||
#endif
|
||||
} else if ((insn & INSN_MASK_C_SW) == INSN_MATCH_C_SW) {
|
||||
len = 4;
|
||||
val.data_ulong = GET_RS2S(insn, regs);
|
||||
} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP &&
|
||||
((insn >> SH_RD) & 0x1f)) {
|
||||
} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP) {
|
||||
len = 4;
|
||||
val.data_ulong = GET_RS2C(insn, regs);
|
||||
} else {
|
||||
|
||||
@ -731,7 +731,7 @@ void ptep_zap_unused(struct mm_struct *mm, unsigned long addr,
|
||||
pte_clear(mm, addr, ptep);
|
||||
}
|
||||
if (reset)
|
||||
pgste_val(pgste) &= ~_PGSTE_GPS_USAGE_MASK;
|
||||
pgste_val(pgste) &= ~(_PGSTE_GPS_USAGE_MASK | _PGSTE_GPS_NODAT);
|
||||
pgste_set_unlock(ptep, pgste);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
@ -8,6 +8,7 @@
|
||||
#include <asm/coco.h>
|
||||
#include <asm/tdx.h>
|
||||
#include <asm/vmx.h>
|
||||
#include <asm/ia32.h>
|
||||
#include <asm/insn.h>
|
||||
#include <asm/insn-eval.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
@ -25,6 +25,7 @@
|
||||
#include <xen/events.h>
|
||||
#endif
|
||||
|
||||
#include <asm/apic.h>
|
||||
#include <asm/desc.h>
|
||||
#include <asm/traps.h>
|
||||
#include <asm/vdso.h>
|
||||
@ -96,6 +97,10 @@ static __always_inline int syscall_32_enter(struct pt_regs *regs)
|
||||
return (int)regs->orig_ax;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
bool __ia32_enabled __ro_after_init = true;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Invoke a 32-bit syscall. Called with IRQs on in CONTEXT_KERNEL.
|
||||
*/
|
||||
@ -115,7 +120,96 @@ static __always_inline void do_syscall_32_irqs_on(struct pt_regs *regs, int nr)
|
||||
}
|
||||
}
|
||||
|
||||
/* Handles int $0x80 */
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
static __always_inline bool int80_is_external(void)
|
||||
{
|
||||
const unsigned int offs = (0x80 / 32) * 0x10;
|
||||
const u32 bit = BIT(0x80 % 32);
|
||||
|
||||
/* The local APIC on XENPV guests is fake */
|
||||
if (cpu_feature_enabled(X86_FEATURE_XENPV))
|
||||
return false;
|
||||
|
||||
/*
|
||||
* If vector 0x80 is set in the APIC ISR then this is an external
|
||||
* interrupt. Either from broken hardware or injected by a VMM.
|
||||
*
|
||||
* Note: In guest mode this is only valid for secure guests where
|
||||
* the secure module fully controls the vAPIC exposed to the guest.
|
||||
*/
|
||||
return apic_read(APIC_ISR + offs) & bit;
|
||||
}
|
||||
|
||||
/**
|
||||
* int80_emulation - 32-bit legacy syscall entry
|
||||
*
|
||||
* This entry point can be used by 32-bit and 64-bit programs to perform
|
||||
* 32-bit system calls. Instances of INT $0x80 can be found inline in
|
||||
* various programs and libraries. It is also used by the vDSO's
|
||||
* __kernel_vsyscall fallback for hardware that doesn't support a faster
|
||||
* entry method. Restarted 32-bit system calls also fall back to INT
|
||||
* $0x80 regardless of what instruction was originally used to do the
|
||||
* system call.
|
||||
*
|
||||
* This is considered a slow path. It is not used by most libc
|
||||
* implementations on modern hardware except during process startup.
|
||||
*
|
||||
* The arguments for the INT $0x80 based syscall are on stack in the
|
||||
* pt_regs structure:
|
||||
* eax: system call number
|
||||
* ebx, ecx, edx, esi, edi, ebp: arg1 - arg 6
|
||||
*/
|
||||
DEFINE_IDTENTRY_RAW(int80_emulation)
|
||||
{
|
||||
int nr;
|
||||
|
||||
/* Kernel does not use INT $0x80! */
|
||||
if (unlikely(!user_mode(regs))) {
|
||||
irqentry_enter(regs);
|
||||
instrumentation_begin();
|
||||
panic("Unexpected external interrupt 0x80\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* Establish kernel context for instrumentation, including for
|
||||
* int80_is_external() below which calls into the APIC driver.
|
||||
* Identical for soft and external interrupts.
|
||||
*/
|
||||
enter_from_user_mode(regs);
|
||||
|
||||
instrumentation_begin();
|
||||
add_random_kstack_offset();
|
||||
|
||||
/* Validate that this is a soft interrupt to the extent possible */
|
||||
if (unlikely(int80_is_external()))
|
||||
panic("Unexpected external interrupt 0x80\n");
|
||||
|
||||
/*
|
||||
* The low level idtentry code pushed -1 into regs::orig_ax
|
||||
* and regs::ax contains the syscall number.
|
||||
*
|
||||
* User tracing code (ptrace or signal handlers) might assume
|
||||
* that the regs::orig_ax contains a 32-bit number on invoking
|
||||
* a 32-bit syscall.
|
||||
*
|
||||
* Establish the syscall convention by saving the 32bit truncated
|
||||
* syscall number in regs::orig_ax and by invalidating regs::ax.
|
||||
*/
|
||||
regs->orig_ax = regs->ax & GENMASK(31, 0);
|
||||
regs->ax = -ENOSYS;
|
||||
|
||||
nr = syscall_32_enter(regs);
|
||||
|
||||
local_irq_enable();
|
||||
nr = syscall_enter_from_user_mode_work(regs, nr);
|
||||
do_syscall_32_irqs_on(regs, nr);
|
||||
|
||||
instrumentation_end();
|
||||
syscall_exit_to_user_mode(regs);
|
||||
}
|
||||
#else /* CONFIG_IA32_EMULATION */
|
||||
|
||||
/* Handles int $0x80 on a 32bit kernel */
|
||||
__visible noinstr void do_int80_syscall_32(struct pt_regs *regs)
|
||||
{
|
||||
int nr = syscall_32_enter(regs);
|
||||
@ -134,6 +228,7 @@ __visible noinstr void do_int80_syscall_32(struct pt_regs *regs)
|
||||
instrumentation_end();
|
||||
syscall_exit_to_user_mode(regs);
|
||||
}
|
||||
#endif /* !CONFIG_IA32_EMULATION */
|
||||
|
||||
static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)
|
||||
{
|
||||
|
||||
@ -277,80 +277,3 @@ SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL)
|
||||
ANNOTATE_NOENDBR
|
||||
int3
|
||||
SYM_CODE_END(entry_SYSCALL_compat)
|
||||
|
||||
/*
|
||||
* 32-bit legacy system call entry.
|
||||
*
|
||||
* 32-bit x86 Linux system calls traditionally used the INT $0x80
|
||||
* instruction. INT $0x80 lands here.
|
||||
*
|
||||
* This entry point can be used by 32-bit and 64-bit programs to perform
|
||||
* 32-bit system calls. Instances of INT $0x80 can be found inline in
|
||||
* various programs and libraries. It is also used by the vDSO's
|
||||
* __kernel_vsyscall fallback for hardware that doesn't support a faster
|
||||
* entry method. Restarted 32-bit system calls also fall back to INT
|
||||
* $0x80 regardless of what instruction was originally used to do the
|
||||
* system call.
|
||||
*
|
||||
* This is considered a slow path. It is not used by most libc
|
||||
* implementations on modern hardware except during process startup.
|
||||
*
|
||||
* Arguments:
|
||||
* eax system call number
|
||||
* ebx arg1
|
||||
* ecx arg2
|
||||
* edx arg3
|
||||
* esi arg4
|
||||
* edi arg5
|
||||
* ebp arg6
|
||||
*/
|
||||
SYM_CODE_START(entry_INT80_compat)
|
||||
UNWIND_HINT_ENTRY
|
||||
ENDBR
|
||||
/*
|
||||
* Interrupts are off on entry.
|
||||
*/
|
||||
ASM_CLAC /* Do this early to minimize exposure */
|
||||
ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV
|
||||
|
||||
/*
|
||||
* User tracing code (ptrace or signal handlers) might assume that
|
||||
* the saved RAX contains a 32-bit number when we're invoking a 32-bit
|
||||
* syscall. Just in case the high bits are nonzero, zero-extend
|
||||
* the syscall number. (This could almost certainly be deleted
|
||||
* with no ill effects.)
|
||||
*/
|
||||
movl %eax, %eax
|
||||
|
||||
/* switch to thread stack expects orig_ax and rdi to be pushed */
|
||||
pushq %rax /* pt_regs->orig_ax */
|
||||
|
||||
/* Need to switch before accessing the thread stack. */
|
||||
SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
|
||||
|
||||
/* In the Xen PV case we already run on the thread stack. */
|
||||
ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
|
||||
|
||||
movq %rsp, %rax
|
||||
movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
|
||||
|
||||
pushq 5*8(%rax) /* regs->ss */
|
||||
pushq 4*8(%rax) /* regs->rsp */
|
||||
pushq 3*8(%rax) /* regs->eflags */
|
||||
pushq 2*8(%rax) /* regs->cs */
|
||||
pushq 1*8(%rax) /* regs->ip */
|
||||
pushq 0*8(%rax) /* regs->orig_ax */
|
||||
.Lint80_keep_stack:
|
||||
|
||||
PUSH_AND_CLEAR_REGS rax=$-ENOSYS
|
||||
UNWIND_HINT_REGS
|
||||
|
||||
cld
|
||||
|
||||
IBRS_ENTER
|
||||
UNTRAIN_RET
|
||||
|
||||
movq %rsp, %rdi
|
||||
call do_int80_syscall_32
|
||||
jmp swapgs_restore_regs_and_return_to_usermode
|
||||
SYM_CODE_END(entry_INT80_compat)
|
||||
|
||||
@ -68,6 +68,27 @@ extern void ia32_pick_mmap_layout(struct mm_struct *mm);
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_IA32_EMULATION */
|
||||
extern bool __ia32_enabled;
|
||||
|
||||
static inline bool ia32_enabled(void)
|
||||
{
|
||||
return __ia32_enabled;
|
||||
}
|
||||
|
||||
static inline void ia32_disable(void)
|
||||
{
|
||||
__ia32_enabled = false;
|
||||
}
|
||||
|
||||
#else /* !CONFIG_IA32_EMULATION */
|
||||
|
||||
static inline bool ia32_enabled(void)
|
||||
{
|
||||
return IS_ENABLED(CONFIG_X86_32);
|
||||
}
|
||||
|
||||
static inline void ia32_disable(void) {}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_X86_IA32_H */
|
||||
|
||||
@ -569,6 +569,10 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_UD, exc_invalid_op);
|
||||
DECLARE_IDTENTRY_RAW(X86_TRAP_BP, exc_int3);
|
||||
DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF, exc_page_fault);
|
||||
|
||||
#if defined(CONFIG_IA32_EMULATION)
|
||||
DECLARE_IDTENTRY_RAW(IA32_SYSCALL_VECTOR, int80_emulation);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_MCE
|
||||
#ifdef CONFIG_X86_64
|
||||
DECLARE_IDTENTRY_MCE(X86_TRAP_MC, exc_machine_check);
|
||||
|
||||
@ -32,10 +32,6 @@ void entry_SYSCALL_compat(void);
|
||||
void entry_SYSCALL_compat_safe_stack(void);
|
||||
void entry_SYSRETL_compat_unsafe_stack(void);
|
||||
void entry_SYSRETL_compat_end(void);
|
||||
void entry_INT80_compat(void);
|
||||
#ifdef CONFIG_XEN_PV
|
||||
void xen_entry_INT80_compat(void);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
void x86_configure_nx(void);
|
||||
|
||||
@ -1291,6 +1291,9 @@ static void zenbleed_check_cpu(void *unused)
|
||||
|
||||
void amd_check_microcode(void)
|
||||
{
|
||||
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
|
||||
return;
|
||||
|
||||
on_each_cpu(zenbleed_check_cpu, NULL, 1);
|
||||
}
|
||||
|
||||
|
||||
@ -117,7 +117,7 @@ static const __initconst struct idt_data def_idts[] = {
|
||||
|
||||
SYSG(X86_TRAP_OF, asm_exc_overflow),
|
||||
#if defined(CONFIG_IA32_EMULATION)
|
||||
SYSG(IA32_SYSCALL_VECTOR, entry_INT80_compat),
|
||||
SYSG(IA32_SYSCALL_VECTOR, asm_int80_emulation),
|
||||
#elif defined(CONFIG_X86_32)
|
||||
SYSG(IA32_SYSCALL_VECTOR, entry_INT80_32),
|
||||
#endif
|
||||
|
||||
@ -1279,10 +1279,6 @@ void setup_ghcb(void)
|
||||
if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
|
||||
return;
|
||||
|
||||
/* First make sure the hypervisor talks a supported protocol. */
|
||||
if (!sev_es_negotiate_protocol())
|
||||
sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
|
||||
|
||||
/*
|
||||
* Check whether the runtime #VC exception handler is active. It uses
|
||||
* the per-CPU GHCB page which is set up by sev_es_init_vc_handling().
|
||||
@ -1297,6 +1293,13 @@ void setup_ghcb(void)
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure the hypervisor talks a supported protocol.
|
||||
* This gets called only in the BSP boot phase.
|
||||
*/
|
||||
if (!sev_es_negotiate_protocol())
|
||||
sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
|
||||
|
||||
/*
|
||||
* Clear the boot_ghcb. The first exception comes in before the bss
|
||||
* section is cleared.
|
||||
|
||||
@ -1786,15 +1786,17 @@ void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
|
||||
bool old_paging = is_paging(vcpu);
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (vcpu->arch.efer & EFER_LME && !vcpu->arch.guest_state_protected) {
|
||||
if (vcpu->arch.efer & EFER_LME) {
|
||||
if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
|
||||
vcpu->arch.efer |= EFER_LMA;
|
||||
svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
|
||||
if (!vcpu->arch.guest_state_protected)
|
||||
svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
|
||||
}
|
||||
|
||||
if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
|
||||
vcpu->arch.efer &= ~EFER_LMA;
|
||||
svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
|
||||
if (!vcpu->arch.guest_state_protected)
|
||||
svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -34,6 +34,7 @@
|
||||
#include <asm/msr.h>
|
||||
#include <asm/cmdline.h>
|
||||
#include <asm/sev.h>
|
||||
#include <asm/ia32.h>
|
||||
|
||||
#include "mm_internal.h"
|
||||
|
||||
@ -502,6 +503,16 @@ void __init sme_early_init(void)
|
||||
x86_platform.guest.enc_status_change_finish = amd_enc_status_change_finish;
|
||||
x86_platform.guest.enc_tlb_flush_required = amd_enc_tlb_flush_required;
|
||||
x86_platform.guest.enc_cache_flush_required = amd_enc_cache_flush_required;
|
||||
|
||||
/*
|
||||
* The VMM is capable of injecting interrupt 0x80 and triggering the
|
||||
* compatibility syscall path.
|
||||
*
|
||||
* By default, the 32-bit emulation is disabled in order to ensure
|
||||
* the safety of the VM.
|
||||
*/
|
||||
if (sev_status & MSR_AMD64_SEV_ENABLED)
|
||||
ia32_disable();
|
||||
}
|
||||
|
||||
void __init mem_encrypt_free_decrypted_mem(void)
|
||||
|
||||
@ -623,7 +623,7 @@ static struct trap_array_entry trap_array[] = {
|
||||
TRAP_ENTRY(exc_int3, false ),
|
||||
TRAP_ENTRY(exc_overflow, false ),
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
{ entry_INT80_compat, xen_entry_INT80_compat, false },
|
||||
TRAP_ENTRY(int80_emulation, false ),
|
||||
#endif
|
||||
TRAP_ENTRY(exc_page_fault, false ),
|
||||
TRAP_ENTRY(exc_divide_error, false ),
|
||||
|
||||
@ -156,7 +156,7 @@ xen_pv_trap asm_xenpv_exc_machine_check
|
||||
#endif /* CONFIG_X86_MCE */
|
||||
xen_pv_trap asm_exc_simd_coprocessor_error
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
xen_pv_trap entry_INT80_compat
|
||||
xen_pv_trap asm_int80_emulation
|
||||
#endif
|
||||
xen_pv_trap asm_exc_xen_unknown_trap
|
||||
xen_pv_trap asm_exc_xen_hypervisor_callback
|
||||
|
||||
@ -5037,6 +5037,7 @@ static void binder_release_work(struct binder_proc *proc,
|
||||
"undelivered TRANSACTION_ERROR: %u\n",
|
||||
e->cmd);
|
||||
} break;
|
||||
case BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT:
|
||||
case BINDER_WORK_TRANSACTION_COMPLETE: {
|
||||
binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
|
||||
"undelivered TRANSACTION_COMPLETE\n");
|
||||
|
||||
@ -410,8 +410,7 @@ int regcache_sync(struct regmap *map)
|
||||
rb_entry(node, struct regmap_range_node, node);
|
||||
|
||||
/* If there's nothing in the cache there's nothing to sync */
|
||||
ret = regcache_read(map, this->selector_reg, &i);
|
||||
if (ret != 0)
|
||||
if (regcache_read(map, this->selector_reg, &i) != 0)
|
||||
continue;
|
||||
|
||||
ret = _regmap_write(map, this->selector_reg, i);
|
||||
|
||||
@ -463,14 +463,17 @@ static ssize_t export_store(struct class *class,
|
||||
goto done;
|
||||
|
||||
status = gpiod_set_transitory(desc, false);
|
||||
if (!status) {
|
||||
status = gpiod_export(desc, true);
|
||||
if (status < 0)
|
||||
gpiod_free(desc);
|
||||
else
|
||||
set_bit(FLAG_SYSFS, &desc->flags);
|
||||
if (status) {
|
||||
gpiod_free(desc);
|
||||
goto done;
|
||||
}
|
||||
|
||||
status = gpiod_export(desc, true);
|
||||
if (status < 0)
|
||||
gpiod_free(desc);
|
||||
else
|
||||
set_bit(FLAG_SYSFS, &desc->flags);
|
||||
|
||||
done:
|
||||
if (status)
|
||||
pr_debug("%s: status %d\n", __func__, status);
|
||||
|
||||
@ -201,7 +201,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p,
|
||||
}
|
||||
|
||||
for (i = 0; i < p->nchunks; i++) {
|
||||
struct drm_amdgpu_cs_chunk __user **chunk_ptr = NULL;
|
||||
struct drm_amdgpu_cs_chunk __user *chunk_ptr = NULL;
|
||||
struct drm_amdgpu_cs_chunk user_chunk;
|
||||
uint32_t __user *cdata;
|
||||
|
||||
|
||||
@ -90,7 +90,7 @@ static void amdgpu_display_flip_work_func(struct work_struct *__work)
|
||||
|
||||
struct drm_crtc *crtc = &amdgpu_crtc->base;
|
||||
unsigned long flags;
|
||||
unsigned i;
|
||||
unsigned int i;
|
||||
int vpos, hpos;
|
||||
|
||||
for (i = 0; i < work->shared_count; ++i)
|
||||
@ -167,7 +167,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
|
||||
u64 tiling_flags;
|
||||
int i, r;
|
||||
|
||||
work = kzalloc(sizeof *work, GFP_KERNEL);
|
||||
work = kzalloc(sizeof(*work), GFP_KERNEL);
|
||||
if (work == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -298,18 +298,17 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
|
||||
|
||||
adev = drm_to_adev(dev);
|
||||
/* if we have active crtcs and we don't have a power ref,
|
||||
take the current one */
|
||||
* take the current one
|
||||
*/
|
||||
if (active && !adev->have_disp_power_ref) {
|
||||
adev->have_disp_power_ref = true;
|
||||
return ret;
|
||||
}
|
||||
/* if we have no active crtcs, then drop the power ref
|
||||
we got before */
|
||||
if (!active && adev->have_disp_power_ref) {
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
/* if we have no active crtcs, then go to
|
||||
* drop the power ref we got before
|
||||
*/
|
||||
if (!active && adev->have_disp_power_ref)
|
||||
adev->have_disp_power_ref = false;
|
||||
}
|
||||
|
||||
out:
|
||||
/* drop the power reference we got coming in here */
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
@ -473,11 +472,10 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
|
||||
if (amdgpu_connector->router.ddc_valid)
|
||||
amdgpu_i2c_router_select_ddc_port(amdgpu_connector);
|
||||
|
||||
if (use_aux) {
|
||||
if (use_aux)
|
||||
ret = i2c_transfer(&amdgpu_connector->ddc_bus->aux.ddc, msgs, 2);
|
||||
} else {
|
||||
else
|
||||
ret = i2c_transfer(&amdgpu_connector->ddc_bus->adapter, msgs, 2);
|
||||
}
|
||||
|
||||
if (ret != 2)
|
||||
/* Couldn't find an accessible DDC on this connector */
|
||||
@ -486,10 +484,12 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
|
||||
* EDID header starts with:
|
||||
* 0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00.
|
||||
* Only the first 6 bytes must be valid as
|
||||
* drm_edid_block_valid() can fix the last 2 bytes */
|
||||
* drm_edid_block_valid() can fix the last 2 bytes
|
||||
*/
|
||||
if (drm_edid_header_is_valid(buf) < 6) {
|
||||
/* Couldn't find an accessible EDID on this
|
||||
* connector */
|
||||
* connector
|
||||
*/
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
@ -1204,8 +1204,10 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev,
|
||||
|
||||
obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
|
||||
if (obj == NULL) {
|
||||
drm_dbg_kms(dev, "No GEM object associated to handle 0x%08X, "
|
||||
"can't create framebuffer\n", mode_cmd->handles[0]);
|
||||
drm_dbg_kms(dev,
|
||||
"No GEM object associated to handle 0x%08X, can't create framebuffer\n",
|
||||
mode_cmd->handles[0]);
|
||||
|
||||
return ERR_PTR(-ENOENT);
|
||||
}
|
||||
|
||||
@ -1398,6 +1400,7 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
|
||||
}
|
||||
if (amdgpu_crtc->rmx_type != RMX_OFF) {
|
||||
fixed20_12 a, b;
|
||||
|
||||
a.full = dfixed_const(src_v);
|
||||
b.full = dfixed_const(dst_v);
|
||||
amdgpu_crtc->vsc.full = dfixed_div(a, b);
|
||||
@ -1417,7 +1420,7 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
|
||||
*
|
||||
* \param dev Device to query.
|
||||
* \param pipe Crtc to query.
|
||||
* \param flags Flags from caller (DRM_CALLED_FROM_VBLIRQ or 0).
|
||||
* \param flags from caller (DRM_CALLED_FROM_VBLIRQ or 0).
|
||||
* For driver internal use only also supports these flags:
|
||||
*
|
||||
* USE_REAL_VBLANKSTART to use the real start of vblank instead
|
||||
@ -1493,8 +1496,8 @@ int amdgpu_display_get_crtc_scanoutpos(struct drm_device *dev,
|
||||
|
||||
/* Called from driver internal vblank counter query code? */
|
||||
if (flags & GET_DISTANCE_TO_VBLANKSTART) {
|
||||
/* Caller wants distance from real vbl_start in *hpos */
|
||||
*hpos = *vpos - vbl_start;
|
||||
/* Caller wants distance from real vbl_start in *hpos */
|
||||
*hpos = *vpos - vbl_start;
|
||||
}
|
||||
|
||||
/* Fudge vblank to start a few scanlines earlier to handle the
|
||||
@ -1516,7 +1519,7 @@ int amdgpu_display_get_crtc_scanoutpos(struct drm_device *dev,
|
||||
|
||||
/* In vblank? */
|
||||
if (in_vbl)
|
||||
ret |= DRM_SCANOUTPOS_IN_VBLANK;
|
||||
ret |= DRM_SCANOUTPOS_IN_VBLANK;
|
||||
|
||||
/* Called from driver internal vblank counter query code? */
|
||||
if (flags & GET_DISTANCE_TO_VBLANKSTART) {
|
||||
@ -1622,6 +1625,7 @@ int amdgpu_display_suspend_helper(struct amdgpu_device *adev)
|
||||
|
||||
if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {
|
||||
struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);
|
||||
|
||||
r = amdgpu_bo_reserve(aobj, true);
|
||||
if (r == 0) {
|
||||
amdgpu_bo_unpin(aobj);
|
||||
@ -1629,9 +1633,9 @@ int amdgpu_display_suspend_helper(struct amdgpu_device *adev)
|
||||
}
|
||||
}
|
||||
|
||||
if (fb == NULL || fb->obj[0] == NULL) {
|
||||
if (!fb || !fb->obj[0])
|
||||
continue;
|
||||
}
|
||||
|
||||
robj = gem_to_amdgpu_bo(fb->obj[0]);
|
||||
if (!amdgpu_display_robj_is_fb(adev, robj)) {
|
||||
r = amdgpu_bo_reserve(robj, true);
|
||||
@ -1658,6 +1662,7 @@ int amdgpu_display_resume_helper(struct amdgpu_device *adev)
|
||||
|
||||
if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {
|
||||
struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);
|
||||
|
||||
r = amdgpu_bo_reserve(aobj, true);
|
||||
if (r == 0) {
|
||||
r = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
|
||||
|
||||
@ -79,6 +79,8 @@
|
||||
* That is, for an I2C EEPROM driver everything is controlled by
|
||||
* the "eeprom_addr".
|
||||
*
|
||||
* See also top of amdgpu_ras_eeprom.c.
|
||||
*
|
||||
* P.S. If you need to write, lock and read the Identification Page,
|
||||
* (M24M02-DR device only, which we do not use), change the "7" to
|
||||
* "0xF" in the macro below, and let the client set bit 20 to 1 in
|
||||
|
||||
@ -33,12 +33,29 @@
|
||||
|
||||
#include "amdgpu_reset.h"
|
||||
|
||||
#define EEPROM_I2C_MADDR_VEGA20 0x0
|
||||
#define EEPROM_I2C_MADDR_ARCTURUS 0x40000
|
||||
#define EEPROM_I2C_MADDR_ARCTURUS_D342 0x0
|
||||
#define EEPROM_I2C_MADDR_SIENNA_CICHLID 0x0
|
||||
#define EEPROM_I2C_MADDR_ALDEBARAN 0x0
|
||||
#define EEPROM_I2C_MADDR_SMU_13_0_0 (0x54UL << 16)
|
||||
/* These are memory addresses as would be seen by one or more EEPROM
|
||||
* chips strung on the I2C bus, usually by manipulating pins 1-3 of a
|
||||
* set of EEPROM devices. They form a continuous memory space.
|
||||
*
|
||||
* The I2C device address includes the device type identifier, 1010b,
|
||||
* which is a reserved value and indicates that this is an I2C EEPROM
|
||||
* device. It also includes the top 3 bits of the 19 bit EEPROM memory
|
||||
* address, namely bits 18, 17, and 16. This makes up the 7 bit
|
||||
* address sent on the I2C bus with bit 0 being the direction bit,
|
||||
* which is not represented here, and sent by the hardware directly.
|
||||
*
|
||||
* For instance,
|
||||
* 50h = 1010000b => device type identifier 1010b, bits 18:16 = 000b, address 0.
|
||||
* 54h = 1010100b => --"--, bits 18:16 = 100b, address 40000h.
|
||||
* 56h = 1010110b => --"--, bits 18:16 = 110b, address 60000h.
|
||||
* Depending on the size of the I2C EEPROM device(s), bits 18:16 may
|
||||
* address memory in a device or a device on the I2C bus, depending on
|
||||
* the status of pins 1-3. See top of amdgpu_eeprom.c.
|
||||
*
|
||||
* The RAS table lives either at address 0 or address 40000h of EEPROM.
|
||||
*/
|
||||
#define EEPROM_I2C_MADDR_0 0x0
|
||||
#define EEPROM_I2C_MADDR_4 0x40000
|
||||
|
||||
/*
|
||||
* The 2 macros bellow represent the actual size in bytes that
|
||||
@ -90,33 +107,23 @@
|
||||
|
||||
static bool __is_ras_eeprom_supported(struct amdgpu_device *adev)
|
||||
{
|
||||
return adev->asic_type == CHIP_VEGA20 ||
|
||||
adev->asic_type == CHIP_ARCTURUS ||
|
||||
adev->asic_type == CHIP_SIENNA_CICHLID ||
|
||||
adev->asic_type == CHIP_ALDEBARAN;
|
||||
}
|
||||
|
||||
static bool __get_eeprom_i2c_addr_arct(struct amdgpu_device *adev,
|
||||
struct amdgpu_ras_eeprom_control *control)
|
||||
{
|
||||
struct atom_context *atom_ctx = adev->mode_info.atom_context;
|
||||
|
||||
if (!control || !atom_ctx)
|
||||
switch (adev->ip_versions[MP1_HWIP][0]) {
|
||||
case IP_VERSION(11, 0, 2): /* VEGA20 and ARCTURUS */
|
||||
case IP_VERSION(11, 0, 7): /* Sienna cichlid */
|
||||
case IP_VERSION(13, 0, 0):
|
||||
case IP_VERSION(13, 0, 2): /* Aldebaran */
|
||||
case IP_VERSION(13, 0, 6):
|
||||
case IP_VERSION(13, 0, 10):
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
|
||||
if (strnstr(atom_ctx->vbios_version,
|
||||
"D342",
|
||||
sizeof(atom_ctx->vbios_version)))
|
||||
control->i2c_address = EEPROM_I2C_MADDR_ARCTURUS_D342;
|
||||
else
|
||||
control->i2c_address = EEPROM_I2C_MADDR_ARCTURUS;
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev,
|
||||
struct amdgpu_ras_eeprom_control *control)
|
||||
{
|
||||
struct atom_context *atom_ctx = adev->mode_info.atom_context;
|
||||
u8 i2c_addr;
|
||||
|
||||
if (!control)
|
||||
@ -137,36 +144,42 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev,
|
||||
return true;
|
||||
}
|
||||
|
||||
switch (adev->asic_type) {
|
||||
case CHIP_VEGA20:
|
||||
control->i2c_address = EEPROM_I2C_MADDR_VEGA20;
|
||||
break;
|
||||
|
||||
case CHIP_ARCTURUS:
|
||||
return __get_eeprom_i2c_addr_arct(adev, control);
|
||||
|
||||
case CHIP_SIENNA_CICHLID:
|
||||
control->i2c_address = EEPROM_I2C_MADDR_SIENNA_CICHLID;
|
||||
break;
|
||||
|
||||
case CHIP_ALDEBARAN:
|
||||
control->i2c_address = EEPROM_I2C_MADDR_ALDEBARAN;
|
||||
break;
|
||||
|
||||
switch (adev->ip_versions[MP1_HWIP][0]) {
|
||||
case IP_VERSION(11, 0, 2):
|
||||
/* VEGA20 and ARCTURUS */
|
||||
if (adev->asic_type == CHIP_VEGA20)
|
||||
control->i2c_address = EEPROM_I2C_MADDR_0;
|
||||
else if (strnstr(atom_ctx->vbios_version,
|
||||
"D342",
|
||||
sizeof(atom_ctx->vbios_version)))
|
||||
control->i2c_address = EEPROM_I2C_MADDR_0;
|
||||
else
|
||||
control->i2c_address = EEPROM_I2C_MADDR_4;
|
||||
return true;
|
||||
case IP_VERSION(11, 0, 7):
|
||||
control->i2c_address = EEPROM_I2C_MADDR_0;
|
||||
return true;
|
||||
case IP_VERSION(13, 0, 2):
|
||||
if (strnstr(atom_ctx->vbios_version, "D673",
|
||||
sizeof(atom_ctx->vbios_version)))
|
||||
control->i2c_address = EEPROM_I2C_MADDR_4;
|
||||
else
|
||||
control->i2c_address = EEPROM_I2C_MADDR_0;
|
||||
return true;
|
||||
case IP_VERSION(13, 0, 0):
|
||||
if (strnstr(atom_ctx->vbios_pn, "D707",
|
||||
sizeof(atom_ctx->vbios_pn)))
|
||||
control->i2c_address = EEPROM_I2C_MADDR_0;
|
||||
else
|
||||
control->i2c_address = EEPROM_I2C_MADDR_4;
|
||||
return true;
|
||||
case IP_VERSION(13, 0, 6):
|
||||
case IP_VERSION(13, 0, 10):
|
||||
control->i2c_address = EEPROM_I2C_MADDR_4;
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
switch (adev->ip_versions[MP1_HWIP][0]) {
|
||||
case IP_VERSION(13, 0, 0):
|
||||
control->i2c_address = EEPROM_I2C_MADDR_SMU_13_0_0;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void
|
||||
|
||||
@ -397,7 +397,7 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
|
||||
adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
|
||||
cpu_ptr = &adev->wb.wb[index];
|
||||
|
||||
r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
if (r) {
|
||||
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
|
||||
goto err1;
|
||||
|
||||
@ -883,8 +883,8 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
|
||||
gpu_addr = adev->wb.gpu_addr + (index * 4);
|
||||
adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
|
||||
memset(&ib, 0, sizeof(ib));
|
||||
r = amdgpu_ib_get(adev, NULL, 16,
|
||||
AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
|
||||
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
if (r)
|
||||
goto err1;
|
||||
|
||||
|
||||
@ -1034,8 +1034,8 @@ static int gfx_v9_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
|
||||
gpu_addr = adev->wb.gpu_addr + (index * 4);
|
||||
adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
|
||||
memset(&ib, 0, sizeof(ib));
|
||||
r = amdgpu_ib_get(adev, NULL, 16,
|
||||
AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
|
||||
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
|
||||
if (r)
|
||||
goto err1;
|
||||
|
||||
|
||||
@ -309,6 +309,7 @@ config DRM_TOSHIBA_TC358768
|
||||
select REGMAP_I2C
|
||||
select DRM_PANEL
|
||||
select DRM_MIPI_DSI
|
||||
select VIDEOMODE_HELPERS
|
||||
help
|
||||
Toshiba TC358768AXBG/TC358778XBG DSI bridge chip driver.
|
||||
|
||||
|
||||
@ -1500,6 +1500,13 @@ static void gen11_dsi_post_disable(struct intel_atomic_state *state,
|
||||
static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_i915_private *i915 = to_i915(connector->dev);
|
||||
enum drm_mode_status status;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
/* FIXME: DSC? */
|
||||
return intel_dsi_mode_valid(connector, mode);
|
||||
}
|
||||
|
||||
@ -343,8 +343,13 @@ intel_crt_mode_valid(struct drm_connector *connector,
|
||||
struct drm_device *dev = connector->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
int max_dotclk = dev_priv->max_dotclk_freq;
|
||||
enum drm_mode_status status;
|
||||
int max_clock;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
|
||||
@ -8229,6 +8229,16 @@ intel_mode_valid(struct drm_device *dev,
|
||||
mode->vtotal > vtotal_max)
|
||||
return MODE_V_ILLEGAL;
|
||||
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *dev_priv,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
/*
|
||||
* Additional transcoder timing limits,
|
||||
* excluding BXT/GLK DSI transcoders.
|
||||
*/
|
||||
if (DISPLAY_VER(dev_priv) >= 5) {
|
||||
if (mode->hdisplay < 64 ||
|
||||
mode->htotal - mode->hdisplay < 32)
|
||||
|
||||
@ -554,6 +554,9 @@ enum drm_mode_status
|
||||
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
|
||||
const struct drm_display_mode *mode,
|
||||
bool bigjoiner);
|
||||
enum drm_mode_status
|
||||
intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,
|
||||
const struct drm_display_mode *mode);
|
||||
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
|
||||
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
|
||||
bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state);
|
||||
|
||||
@ -973,8 +973,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
|
||||
enum drm_mode_status status;
|
||||
bool dsc = false, bigjoiner = false;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
return MODE_H_ILLEGAL;
|
||||
|
||||
@ -703,6 +703,10 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
|
||||
return 0;
|
||||
}
|
||||
|
||||
*status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
|
||||
if (*status != MODE_OK)
|
||||
return 0;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
|
||||
*status = MODE_NO_DBLESCAN;
|
||||
return 0;
|
||||
|
||||
@ -225,10 +225,16 @@ intel_dvo_mode_valid(struct drm_connector *connector,
|
||||
{
|
||||
struct intel_connector *intel_connector = to_intel_connector(connector);
|
||||
struct intel_dvo *intel_dvo = intel_attached_dvo(intel_connector);
|
||||
struct drm_i915_private *i915 = to_i915(intel_connector->base.dev);
|
||||
const struct drm_display_mode *fixed_mode =
|
||||
intel_panel_fixed_mode(intel_connector, mode);
|
||||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
int target_clock = mode->clock;
|
||||
enum drm_mode_status status;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
@ -1987,8 +1987,9 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
|
||||
bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->state);
|
||||
bool ycbcr_420_only;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
|
||||
clock *= 2;
|
||||
|
||||
@ -92,9 +92,9 @@ bool intel_lvds_port_enabled(struct drm_i915_private *dev_priv,
|
||||
|
||||
/* asserts want to know the pipe even if the port is disabled */
|
||||
if (HAS_PCH_CPT(dev_priv))
|
||||
*pipe = (val & LVDS_PIPE_SEL_MASK_CPT) >> LVDS_PIPE_SEL_SHIFT_CPT;
|
||||
*pipe = REG_FIELD_GET(LVDS_PIPE_SEL_MASK_CPT, val);
|
||||
else
|
||||
*pipe = (val & LVDS_PIPE_SEL_MASK) >> LVDS_PIPE_SEL_SHIFT;
|
||||
*pipe = REG_FIELD_GET(LVDS_PIPE_SEL_MASK, val);
|
||||
|
||||
return val & LVDS_PORT_EN;
|
||||
}
|
||||
@ -389,11 +389,16 @@ intel_lvds_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct intel_connector *intel_connector = to_intel_connector(connector);
|
||||
struct drm_i915_private *i915 = to_i915(intel_connector->base.dev);
|
||||
const struct drm_display_mode *fixed_mode =
|
||||
intel_panel_fixed_mode(intel_connector, mode);
|
||||
int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
enum drm_mode_status status;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
|
||||
@ -115,7 +115,6 @@ struct intel_sdvo {
|
||||
|
||||
enum port port;
|
||||
|
||||
bool has_hdmi_monitor;
|
||||
bool has_hdmi_audio;
|
||||
|
||||
/* DDC bus used by this SDVO encoder */
|
||||
@ -1278,10 +1277,13 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
|
||||
pipe_config->clock_set = true;
|
||||
}
|
||||
|
||||
static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
|
||||
static bool intel_has_hdmi_sink(struct intel_sdvo_connector *intel_sdvo_connector,
|
||||
const struct drm_connector_state *conn_state)
|
||||
{
|
||||
return sdvo->has_hdmi_monitor &&
|
||||
struct drm_connector *connector = conn_state->connector;
|
||||
|
||||
return intel_sdvo_connector->is_hdmi &&
|
||||
connector->display_info.is_hdmi &&
|
||||
READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
|
||||
}
|
||||
|
||||
@ -1360,7 +1362,7 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
|
||||
pipe_config->pixel_multiplier =
|
||||
intel_sdvo_get_pixel_multiplier(adjusted_mode);
|
||||
|
||||
pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
|
||||
pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, conn_state);
|
||||
|
||||
if (pipe_config->has_hdmi_sink) {
|
||||
if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO)
|
||||
@ -1871,13 +1873,19 @@ static enum drm_mode_status
|
||||
intel_sdvo_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_i915_private *i915 = to_i915(connector->dev);
|
||||
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
|
||||
struct intel_sdvo_connector *intel_sdvo_connector =
|
||||
to_intel_sdvo_connector(connector);
|
||||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
|
||||
bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
|
||||
int max_dotclk = i915->max_dotclk_freq;
|
||||
enum drm_mode_status status;
|
||||
int clock = mode->clock;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
@ -2064,7 +2072,6 @@ intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
|
||||
if (edid->input & DRM_EDID_INPUT_DIGITAL) {
|
||||
status = connector_status_connected;
|
||||
if (intel_sdvo_connector->is_hdmi) {
|
||||
intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
|
||||
intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
|
||||
}
|
||||
} else
|
||||
@ -2116,7 +2123,6 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
|
||||
|
||||
intel_sdvo->attached_output = response;
|
||||
|
||||
intel_sdvo->has_hdmi_monitor = false;
|
||||
intel_sdvo->has_hdmi_audio = false;
|
||||
|
||||
if ((intel_sdvo_connector->output_flag & response) == 0)
|
||||
|
||||
@ -956,8 +956,14 @@ static enum drm_mode_status
|
||||
intel_tv_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_i915_private *i915 = to_i915(connector->dev);
|
||||
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
|
||||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
int max_dotclk = i915->max_dotclk_freq;
|
||||
enum drm_mode_status status;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
@ -1627,9 +1627,25 @@ static const struct drm_encoder_funcs intel_dsi_funcs = {
|
||||
.destroy = intel_dsi_encoder_destroy,
|
||||
};
|
||||
|
||||
static enum drm_mode_status vlv_dsi_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_i915_private *i915 = to_i915(connector->dev);
|
||||
|
||||
if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
|
||||
enum drm_mode_status status;
|
||||
|
||||
status = intel_cpu_transcoder_mode_valid(i915, mode);
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
}
|
||||
|
||||
return intel_dsi_mode_valid(connector, mode);
|
||||
}
|
||||
|
||||
static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs = {
|
||||
.get_modes = intel_dsi_get_modes,
|
||||
.mode_valid = intel_dsi_mode_valid,
|
||||
.mode_valid = vlv_dsi_mode_valid,
|
||||
.atomic_check = intel_digital_connector_atomic_check,
|
||||
};
|
||||
|
||||
|
||||
@ -2681,52 +2681,50 @@
|
||||
* Enables the LVDS port. This bit must be set before DPLLs are enabled, as
|
||||
* the DPLL semantics change when the LVDS is assigned to that pipe.
|
||||
*/
|
||||
#define LVDS_PORT_EN (1 << 31)
|
||||
#define LVDS_PORT_EN REG_BIT(31)
|
||||
/* Selects pipe B for LVDS data. Must be set on pre-965. */
|
||||
#define LVDS_PIPE_SEL_SHIFT 30
|
||||
#define LVDS_PIPE_SEL_MASK (1 << 30)
|
||||
#define LVDS_PIPE_SEL(pipe) ((pipe) << 30)
|
||||
#define LVDS_PIPE_SEL_SHIFT_CPT 29
|
||||
#define LVDS_PIPE_SEL_MASK_CPT (3 << 29)
|
||||
#define LVDS_PIPE_SEL_CPT(pipe) ((pipe) << 29)
|
||||
#define LVDS_PIPE_SEL_MASK REG_BIT(30)
|
||||
#define LVDS_PIPE_SEL(pipe) REG_FIELD_PREP(LVDS_PIPE_SEL_MASK, (pipe))
|
||||
#define LVDS_PIPE_SEL_MASK_CPT REG_GENMASK(30, 29)
|
||||
#define LVDS_PIPE_SEL_CPT(pipe) REG_FIELD_PREP(LVDS_PIPE_SEL_MASK_CPT, (pipe))
|
||||
/* LVDS dithering flag on 965/g4x platform */
|
||||
#define LVDS_ENABLE_DITHER (1 << 25)
|
||||
#define LVDS_ENABLE_DITHER REG_BIT(25)
|
||||
/* LVDS sync polarity flags. Set to invert (i.e. negative) */
|
||||
#define LVDS_VSYNC_POLARITY (1 << 21)
|
||||
#define LVDS_HSYNC_POLARITY (1 << 20)
|
||||
#define LVDS_VSYNC_POLARITY REG_BIT(21)
|
||||
#define LVDS_HSYNC_POLARITY REG_BIT(20)
|
||||
|
||||
/* Enable border for unscaled (or aspect-scaled) display */
|
||||
#define LVDS_BORDER_ENABLE (1 << 15)
|
||||
#define LVDS_BORDER_ENABLE REG_BIT(15)
|
||||
/*
|
||||
* Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
|
||||
* pixel.
|
||||
*/
|
||||
#define LVDS_A0A2_CLKA_POWER_MASK (3 << 8)
|
||||
#define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8)
|
||||
#define LVDS_A0A2_CLKA_POWER_UP (3 << 8)
|
||||
#define LVDS_A0A2_CLKA_POWER_MASK REG_GENMASK(9, 8)
|
||||
#define LVDS_A0A2_CLKA_POWER_DOWN REG_FIELD_PREP(LVDS_A0A2_CLKA_POWER_MASK, 0)
|
||||
#define LVDS_A0A2_CLKA_POWER_UP REG_FIELD_PREP(LVDS_A0A2_CLKA_POWER_MASK, 3)
|
||||
/*
|
||||
* Controls the A3 data pair, which contains the additional LSBs for 24 bit
|
||||
* mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be
|
||||
* on.
|
||||
*/
|
||||
#define LVDS_A3_POWER_MASK (3 << 6)
|
||||
#define LVDS_A3_POWER_DOWN (0 << 6)
|
||||
#define LVDS_A3_POWER_UP (3 << 6)
|
||||
#define LVDS_A3_POWER_MASK REG_GENMASK(7, 6)
|
||||
#define LVDS_A3_POWER_DOWN REG_FIELD_PREP(LVDS_A3_POWER_MASK, 0)
|
||||
#define LVDS_A3_POWER_UP REG_FIELD_PREP(LVDS_A3_POWER_MASK, 3)
|
||||
/*
|
||||
* Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP
|
||||
* is set.
|
||||
*/
|
||||
#define LVDS_CLKB_POWER_MASK (3 << 4)
|
||||
#define LVDS_CLKB_POWER_DOWN (0 << 4)
|
||||
#define LVDS_CLKB_POWER_UP (3 << 4)
|
||||
#define LVDS_CLKB_POWER_MASK REG_GENMASK(5, 4)
|
||||
#define LVDS_CLKB_POWER_DOWN REG_FIELD_PREP(LVDS_CLKB_POWER_MASK, 0)
|
||||
#define LVDS_CLKB_POWER_UP REG_FIELD_PREP(LVDS_CLKB_POWER_MASK, 3)
|
||||
/*
|
||||
* Controls the B0-B3 data pairs. This must be set to match the DPLL p2
|
||||
* setting for whether we are in dual-channel mode. The B3 pair will
|
||||
* additionally only be powered up when LVDS_A3_POWER_UP is set.
|
||||
*/
|
||||
#define LVDS_B0B3_POWER_MASK (3 << 2)
|
||||
#define LVDS_B0B3_POWER_DOWN (0 << 2)
|
||||
#define LVDS_B0B3_POWER_UP (3 << 2)
|
||||
#define LVDS_B0B3_POWER_MASK REG_GENMASK(3, 2)
|
||||
#define LVDS_B0B3_POWER_DOWN REG_FIELD_PREP(LVDS_B0B3_POWER_MASK, 0)
|
||||
#define LVDS_B0B3_POWER_UP REG_FIELD_PREP(LVDS_B0B3_POWER_MASK, 3)
|
||||
|
||||
/* Video Data Island Packet control */
|
||||
#define VIDEO_DIP_DATA _MMIO(0x61178)
|
||||
@ -6461,7 +6459,7 @@
|
||||
#define FDI_PLL_CTL_2 _MMIO(0xfe004)
|
||||
|
||||
#define PCH_LVDS _MMIO(0xe1180)
|
||||
#define LVDS_DETECTED (1 << 1)
|
||||
#define LVDS_DETECTED REG_BIT(1)
|
||||
|
||||
#define _PCH_DP_B 0xe4100
|
||||
#define PCH_DP_B _MMIO(_PCH_DP_B)
|
||||
|
||||
@ -31,6 +31,7 @@
|
||||
#define POWER_METER_CAN_NOTIFY (1 << 3)
|
||||
#define POWER_METER_IS_BATTERY (1 << 8)
|
||||
#define UNKNOWN_HYSTERESIS 0xFFFFFFFF
|
||||
#define UNKNOWN_POWER 0xFFFFFFFF
|
||||
|
||||
#define METER_NOTIFY_CONFIG 0x80
|
||||
#define METER_NOTIFY_TRIP 0x81
|
||||
@ -348,6 +349,9 @@ static ssize_t show_power(struct device *dev,
|
||||
update_meter(resource);
|
||||
mutex_unlock(&resource->lock);
|
||||
|
||||
if (resource->power == UNKNOWN_POWER)
|
||||
return -ENODATA;
|
||||
|
||||
return sprintf(buf, "%llu\n", resource->power * 1000);
|
||||
}
|
||||
|
||||
|
||||
@ -161,13 +161,13 @@ static int kraken2_probe(struct hid_device *hdev,
|
||||
ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
|
||||
if (ret) {
|
||||
hid_err(hdev, "hid hw start failed with %d\n", ret);
|
||||
goto fail_and_stop;
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = hid_hw_open(hdev);
|
||||
if (ret) {
|
||||
hid_err(hdev, "hid hw open failed with %d\n", ret);
|
||||
goto fail_and_close;
|
||||
goto fail_and_stop;
|
||||
}
|
||||
|
||||
priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "kraken2",
|
||||
|
||||
@ -2072,7 +2072,7 @@ static void clear_etmdrvdata(void *info)
|
||||
etmdrvdata[cpu] = NULL;
|
||||
}
|
||||
|
||||
static int __exit etm4_remove_dev(struct etmv4_drvdata *drvdata)
|
||||
static void etm4_remove_dev(struct etmv4_drvdata *drvdata)
|
||||
{
|
||||
etm_perf_symlink(drvdata->csdev, false);
|
||||
/*
|
||||
@ -2094,10 +2094,9 @@ static int __exit etm4_remove_dev(struct etmv4_drvdata *drvdata)
|
||||
cscfg_unregister_csdev(drvdata->csdev);
|
||||
coresight_unregister(drvdata->csdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit etm4_remove_amba(struct amba_device *adev)
|
||||
static void etm4_remove_amba(struct amba_device *adev)
|
||||
{
|
||||
struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev);
|
||||
|
||||
@ -2105,15 +2104,14 @@ static void __exit etm4_remove_amba(struct amba_device *adev)
|
||||
etm4_remove_dev(drvdata);
|
||||
}
|
||||
|
||||
static int __exit etm4_remove_platform_dev(struct platform_device *pdev)
|
||||
static int etm4_remove_platform_dev(struct platform_device *pdev)
|
||||
{
|
||||
int ret = 0;
|
||||
struct etmv4_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
|
||||
|
||||
if (drvdata)
|
||||
ret = etm4_remove_dev(drvdata);
|
||||
etm4_remove_dev(drvdata);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct amba_id etm4_ids[] = {
|
||||
|
||||
@ -837,6 +837,10 @@ static void hisi_ptt_pmu_del(struct perf_event *event, int flags)
|
||||
hisi_ptt_pmu_stop(event, PERF_EF_UPDATE);
|
||||
}
|
||||
|
||||
static void hisi_ptt_pmu_read(struct perf_event *event)
|
||||
{
|
||||
}
|
||||
|
||||
static void hisi_ptt_remove_cpuhp_instance(void *hotplug_node)
|
||||
{
|
||||
cpuhp_state_remove_instance_nocalls(hisi_ptt_pmu_online, hotplug_node);
|
||||
@ -880,6 +884,7 @@ static int hisi_ptt_register_pmu(struct hisi_ptt *hisi_ptt)
|
||||
.stop = hisi_ptt_pmu_stop,
|
||||
.add = hisi_ptt_pmu_add,
|
||||
.del = hisi_ptt_pmu_del,
|
||||
.read = hisi_ptt_pmu_read,
|
||||
};
|
||||
|
||||
reg = readl(hisi_ptt->iobase + HISI_PTT_LOCATION);
|
||||
|
||||
@ -63,7 +63,7 @@ static int dw_reg_read(void *context, unsigned int reg, unsigned int *val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
*val = readl_relaxed(dev->base + reg);
|
||||
*val = readl(dev->base + reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -72,7 +72,7 @@ static int dw_reg_write(void *context, unsigned int reg, unsigned int val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
writel_relaxed(val, dev->base + reg);
|
||||
writel(val, dev->base + reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -81,7 +81,7 @@ static int dw_reg_read_swab(void *context, unsigned int reg, unsigned int *val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
*val = swab32(readl_relaxed(dev->base + reg));
|
||||
*val = swab32(readl(dev->base + reg));
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -90,7 +90,7 @@ static int dw_reg_write_swab(void *context, unsigned int reg, unsigned int val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
writel_relaxed(swab32(val), dev->base + reg);
|
||||
writel(swab32(val), dev->base + reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -99,8 +99,8 @@ static int dw_reg_read_word(void *context, unsigned int reg, unsigned int *val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
*val = readw_relaxed(dev->base + reg) |
|
||||
(readw_relaxed(dev->base + reg + 2) << 16);
|
||||
*val = readw(dev->base + reg) |
|
||||
(readw(dev->base + reg + 2) << 16);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -109,8 +109,8 @@ static int dw_reg_write_word(void *context, unsigned int reg, unsigned int val)
|
||||
{
|
||||
struct dw_i2c_dev *dev = context;
|
||||
|
||||
writew_relaxed(val, dev->base + reg);
|
||||
writew_relaxed(val >> 16, dev->base + reg + 2);
|
||||
writew(val, dev->base + reg);
|
||||
writew(val >> 16, dev->base + reg + 2);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -96,12 +96,6 @@ unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem,
|
||||
return page_size;
|
||||
}
|
||||
|
||||
/* rdma_for_each_block() has a bug if the page size is smaller than the
|
||||
* page size used to build the umem. For now prevent smaller page sizes
|
||||
* from being returned.
|
||||
*/
|
||||
pgsz_bitmap &= GENMASK(BITS_PER_LONG - 1, PAGE_SHIFT);
|
||||
|
||||
/* The best result is the smallest page size that results in the minimum
|
||||
* number of required pages. Compute the largest page size that could
|
||||
* work based on VA address bits that don't change.
|
||||
|
||||
@ -70,7 +70,7 @@ static char version[] =
|
||||
BNXT_RE_DESC "\n";
|
||||
|
||||
MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
|
||||
MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
|
||||
MODULE_DESCRIPTION(BNXT_RE_DESC);
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
||||
/* globals */
|
||||
|
||||
@ -4913,10 +4913,15 @@ static int check_cong_type(struct ib_qp *ibqp,
|
||||
cong_alg->wnd_mode_sel = WND_LIMIT;
|
||||
break;
|
||||
default:
|
||||
ibdev_err(&hr_dev->ib_dev,
|
||||
"error type(%u) for congestion selection.\n",
|
||||
hr_dev->caps.cong_type);
|
||||
return -EINVAL;
|
||||
ibdev_warn(&hr_dev->ib_dev,
|
||||
"invalid type(%u) for congestion selection.\n",
|
||||
hr_dev->caps.cong_type);
|
||||
hr_dev->caps.cong_type = CONG_TYPE_DCQCN;
|
||||
cong_alg->alg_sel = CONG_DCQCN;
|
||||
cong_alg->alg_sub_sel = UNSUPPORT_CONG_LEVEL;
|
||||
cong_alg->dip_vld = DIP_INVALID;
|
||||
cong_alg->wnd_mode_sel = WND_LIMIT;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -322,7 +322,11 @@ static void irdma_process_aeq(struct irdma_pci_f *rf)
|
||||
break;
|
||||
case IRDMA_AE_QP_SUSPEND_COMPLETE:
|
||||
if (iwqp->iwdev->vsi.tc_change_pending) {
|
||||
atomic_dec(&iwqp->sc_qp.vsi->qp_suspend_reqs);
|
||||
if (!atomic_dec_return(&qp->vsi->qp_suspend_reqs))
|
||||
wake_up(&iwqp->iwdev->suspend_wq);
|
||||
}
|
||||
if (iwqp->suspend_pending) {
|
||||
iwqp->suspend_pending = false;
|
||||
wake_up(&iwqp->iwdev->suspend_wq);
|
||||
}
|
||||
break;
|
||||
@ -568,16 +572,13 @@ static void irdma_destroy_irq(struct irdma_pci_f *rf,
|
||||
* Issue destroy cqp request and
|
||||
* free the resources associated with the cqp
|
||||
*/
|
||||
static void irdma_destroy_cqp(struct irdma_pci_f *rf, bool free_hwcqp)
|
||||
static void irdma_destroy_cqp(struct irdma_pci_f *rf)
|
||||
{
|
||||
struct irdma_sc_dev *dev = &rf->sc_dev;
|
||||
struct irdma_cqp *cqp = &rf->cqp;
|
||||
int status = 0;
|
||||
|
||||
if (rf->cqp_cmpl_wq)
|
||||
destroy_workqueue(rf->cqp_cmpl_wq);
|
||||
if (free_hwcqp)
|
||||
status = irdma_sc_cqp_destroy(dev->cqp);
|
||||
status = irdma_sc_cqp_destroy(dev->cqp);
|
||||
if (status)
|
||||
ibdev_dbg(to_ibdev(dev), "ERR: Destroy CQP failed %d\n", status);
|
||||
|
||||
@ -741,6 +742,9 @@ static void irdma_destroy_ccq(struct irdma_pci_f *rf)
|
||||
struct irdma_ccq *ccq = &rf->ccq;
|
||||
int status = 0;
|
||||
|
||||
if (rf->cqp_cmpl_wq)
|
||||
destroy_workqueue(rf->cqp_cmpl_wq);
|
||||
|
||||
if (!rf->reset)
|
||||
status = irdma_sc_ccq_destroy(dev->ccq, 0, true);
|
||||
if (status)
|
||||
@ -921,8 +925,8 @@ static int irdma_create_cqp(struct irdma_pci_f *rf)
|
||||
|
||||
cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
|
||||
if (!cqp->scratch_array) {
|
||||
kfree(cqp->cqp_requests);
|
||||
return -ENOMEM;
|
||||
status = -ENOMEM;
|
||||
goto err_scratch;
|
||||
}
|
||||
|
||||
dev->cqp = &cqp->sc_cqp;
|
||||
@ -932,15 +936,14 @@ static int irdma_create_cqp(struct irdma_pci_f *rf)
|
||||
cqp->sq.va = dma_alloc_coherent(dev->hw->device, cqp->sq.size,
|
||||
&cqp->sq.pa, GFP_KERNEL);
|
||||
if (!cqp->sq.va) {
|
||||
kfree(cqp->scratch_array);
|
||||
kfree(cqp->cqp_requests);
|
||||
return -ENOMEM;
|
||||
status = -ENOMEM;
|
||||
goto err_sq;
|
||||
}
|
||||
|
||||
status = irdma_obj_aligned_mem(rf, &mem, sizeof(struct irdma_cqp_ctx),
|
||||
IRDMA_HOST_CTX_ALIGNMENT_M);
|
||||
if (status)
|
||||
goto exit;
|
||||
goto err_ctx;
|
||||
|
||||
dev->cqp->host_ctx_pa = mem.pa;
|
||||
dev->cqp->host_ctx = mem.va;
|
||||
@ -966,7 +969,7 @@ static int irdma_create_cqp(struct irdma_pci_f *rf)
|
||||
status = irdma_sc_cqp_init(dev->cqp, &cqp_init_info);
|
||||
if (status) {
|
||||
ibdev_dbg(to_ibdev(dev), "ERR: cqp init status %d\n", status);
|
||||
goto exit;
|
||||
goto err_ctx;
|
||||
}
|
||||
|
||||
spin_lock_init(&cqp->req_lock);
|
||||
@ -977,7 +980,7 @@ static int irdma_create_cqp(struct irdma_pci_f *rf)
|
||||
ibdev_dbg(to_ibdev(dev),
|
||||
"ERR: cqp create failed - status %d maj_err %d min_err %d\n",
|
||||
status, maj_err, min_err);
|
||||
goto exit;
|
||||
goto err_ctx;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&cqp->cqp_avail_reqs);
|
||||
@ -991,8 +994,16 @@ static int irdma_create_cqp(struct irdma_pci_f *rf)
|
||||
init_waitqueue_head(&cqp->remove_wq);
|
||||
return 0;
|
||||
|
||||
exit:
|
||||
irdma_destroy_cqp(rf, false);
|
||||
err_ctx:
|
||||
dma_free_coherent(dev->hw->device, cqp->sq.size,
|
||||
cqp->sq.va, cqp->sq.pa);
|
||||
cqp->sq.va = NULL;
|
||||
err_sq:
|
||||
kfree(cqp->scratch_array);
|
||||
cqp->scratch_array = NULL;
|
||||
err_scratch:
|
||||
kfree(cqp->cqp_requests);
|
||||
cqp->cqp_requests = NULL;
|
||||
|
||||
return status;
|
||||
}
|
||||
@ -1159,7 +1170,6 @@ static int irdma_create_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq,
|
||||
int status;
|
||||
struct irdma_ceq_init_info info = {};
|
||||
struct irdma_sc_dev *dev = &rf->sc_dev;
|
||||
u64 scratch;
|
||||
u32 ceq_size;
|
||||
|
||||
info.ceq_id = ceq_id;
|
||||
@ -1180,14 +1190,13 @@ static int irdma_create_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq,
|
||||
iwceq->sc_ceq.ceq_id = ceq_id;
|
||||
info.dev = dev;
|
||||
info.vsi = vsi;
|
||||
scratch = (uintptr_t)&rf->cqp.sc_cqp;
|
||||
status = irdma_sc_ceq_init(&iwceq->sc_ceq, &info);
|
||||
if (!status) {
|
||||
if (dev->ceq_valid)
|
||||
status = irdma_cqp_ceq_cmd(&rf->sc_dev, &iwceq->sc_ceq,
|
||||
IRDMA_OP_CEQ_CREATE);
|
||||
else
|
||||
status = irdma_sc_cceq_create(&iwceq->sc_ceq, scratch);
|
||||
status = irdma_sc_cceq_create(&iwceq->sc_ceq, 0);
|
||||
}
|
||||
|
||||
if (status) {
|
||||
@ -1740,7 +1749,7 @@ void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf)
|
||||
rf->reset, rf->rdma_ver);
|
||||
fallthrough;
|
||||
case CQP_CREATED:
|
||||
irdma_destroy_cqp(rf, true);
|
||||
irdma_destroy_cqp(rf);
|
||||
fallthrough;
|
||||
case INITIAL_STATE:
|
||||
irdma_del_init_mem(rf);
|
||||
|
||||
@ -48,7 +48,7 @@ static void irdma_prep_tc_change(struct irdma_device *iwdev)
|
||||
/* Wait for all qp's to suspend */
|
||||
wait_event_timeout(iwdev->suspend_wq,
|
||||
!atomic_read(&iwdev->vsi.qp_suspend_reqs),
|
||||
IRDMA_EVENT_TIMEOUT);
|
||||
msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS));
|
||||
irdma_ws_reset(&iwdev->vsi);
|
||||
}
|
||||
|
||||
|
||||
@ -78,7 +78,7 @@ extern struct auxiliary_driver i40iw_auxiliary_drv;
|
||||
|
||||
#define MAX_DPC_ITERATIONS 128
|
||||
|
||||
#define IRDMA_EVENT_TIMEOUT 50000
|
||||
#define IRDMA_EVENT_TIMEOUT_MS 5000
|
||||
#define IRDMA_VCHNL_EVENT_TIMEOUT 100000
|
||||
#define IRDMA_RST_TIMEOUT_HZ 4
|
||||
|
||||
|
||||
@ -1098,6 +1098,21 @@ static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
|
||||
{
|
||||
if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
|
||||
!iwqp->suspend_pending,
|
||||
msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
|
||||
iwqp->suspend_pending = false;
|
||||
ibdev_warn(&iwqp->iwdev->ibdev,
|
||||
"modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
|
||||
iwqp->ibqp.qp_num, iwqp->last_aeq);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* irdma_modify_qp_roce - modify qp request
|
||||
* @ibqp: qp's pointer for modify
|
||||
@ -1359,17 +1374,11 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
||||
|
||||
info.next_iwarp_state = IRDMA_QP_STATE_SQD;
|
||||
issue_modify_qp = 1;
|
||||
iwqp->suspend_pending = true;
|
||||
break;
|
||||
case IB_QPS_SQE:
|
||||
case IB_QPS_ERR:
|
||||
case IB_QPS_RESET:
|
||||
if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
|
||||
spin_unlock_irqrestore(&iwqp->lock, flags);
|
||||
info.next_iwarp_state = IRDMA_QP_STATE_SQD;
|
||||
irdma_hw_modify_qp(iwdev, iwqp, &info, true);
|
||||
spin_lock_irqsave(&iwqp->lock, flags);
|
||||
}
|
||||
|
||||
if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
|
||||
spin_unlock_irqrestore(&iwqp->lock, flags);
|
||||
if (udata && udata->inlen) {
|
||||
@ -1406,6 +1415,11 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
||||
ctx_info->rem_endpoint_idx = udp_info->arp_idx;
|
||||
if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
|
||||
return -EINVAL;
|
||||
if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
|
||||
ret = irdma_wait_for_suspend(iwqp);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
spin_lock_irqsave(&iwqp->lock, flags);
|
||||
if (iwqp->iwarp_state == info.curr_iwarp_state) {
|
||||
iwqp->iwarp_state = info.next_iwarp_state;
|
||||
|
||||
@ -193,6 +193,7 @@ struct irdma_qp {
|
||||
u8 flush_issued : 1;
|
||||
u8 sig_all : 1;
|
||||
u8 pau_mode : 1;
|
||||
u8 suspend_pending : 1;
|
||||
u8 rsvd : 1;
|
||||
u8 iwarp_state;
|
||||
u16 term_sq_flush_code;
|
||||
|
||||
@ -382,7 +382,7 @@ static void complete_rdma_req(struct rtrs_clt_io_req *req, int errno,
|
||||
struct rtrs_clt_path *clt_path;
|
||||
int err;
|
||||
|
||||
if (WARN_ON(!req->in_use))
|
||||
if (!req->in_use)
|
||||
return;
|
||||
if (WARN_ON(!req->con))
|
||||
return;
|
||||
@ -1694,7 +1694,7 @@ static int create_con_cq_qp(struct rtrs_clt_con *con)
|
||||
clt_path->s.dev_ref++;
|
||||
max_send_wr = min_t(int, wr_limit,
|
||||
/* QD * (REQ + RSP + FR REGS or INVS) + drain */
|
||||
clt_path->queue_depth * 3 + 1);
|
||||
clt_path->queue_depth * 4 + 1);
|
||||
max_recv_wr = min_t(int, wr_limit,
|
||||
clt_path->queue_depth * 3 + 1);
|
||||
max_send_sge = 2;
|
||||
@ -2346,8 +2346,6 @@ static int init_conns(struct rtrs_clt_path *clt_path)
|
||||
if (err)
|
||||
goto destroy;
|
||||
|
||||
rtrs_start_hb(&clt_path->s);
|
||||
|
||||
return 0;
|
||||
|
||||
destroy:
|
||||
@ -2621,6 +2619,7 @@ static int init_path(struct rtrs_clt_path *clt_path)
|
||||
goto out;
|
||||
}
|
||||
rtrs_clt_path_up(clt_path);
|
||||
rtrs_start_hb(&clt_path->s);
|
||||
out:
|
||||
mutex_unlock(&clt_path->init_mutex);
|
||||
|
||||
|
||||
@ -63,8 +63,9 @@ static bool rtrs_srv_change_state(struct rtrs_srv_path *srv_path,
|
||||
{
|
||||
enum rtrs_srv_state old_state;
|
||||
bool changed = false;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irq(&srv_path->state_lock);
|
||||
spin_lock_irqsave(&srv_path->state_lock, flags);
|
||||
old_state = srv_path->state;
|
||||
switch (new_state) {
|
||||
case RTRS_SRV_CONNECTED:
|
||||
@ -85,7 +86,7 @@ static bool rtrs_srv_change_state(struct rtrs_srv_path *srv_path,
|
||||
}
|
||||
if (changed)
|
||||
srv_path->state = new_state;
|
||||
spin_unlock_irq(&srv_path->state_lock);
|
||||
spin_unlock_irqrestore(&srv_path->state_lock, flags);
|
||||
|
||||
return changed;
|
||||
}
|
||||
@ -548,7 +549,10 @@ static void unmap_cont_bufs(struct rtrs_srv_path *srv_path)
|
||||
struct rtrs_srv_mr *srv_mr;
|
||||
|
||||
srv_mr = &srv_path->mrs[i];
|
||||
rtrs_iu_free(srv_mr->iu, srv_path->s.dev->ib_dev, 1);
|
||||
|
||||
if (always_invalidate)
|
||||
rtrs_iu_free(srv_mr->iu, srv_path->s.dev->ib_dev, 1);
|
||||
|
||||
ib_dereg_mr(srv_mr->mr);
|
||||
ib_dma_unmap_sg(srv_path->s.dev->ib_dev, srv_mr->sgt.sgl,
|
||||
srv_mr->sgt.nents, DMA_BIDIRECTIONAL);
|
||||
@ -714,20 +718,23 @@ static void rtrs_srv_info_rsp_done(struct ib_cq *cq, struct ib_wc *wc)
|
||||
WARN_ON(wc->opcode != IB_WC_SEND);
|
||||
}
|
||||
|
||||
static void rtrs_srv_path_up(struct rtrs_srv_path *srv_path)
|
||||
static int rtrs_srv_path_up(struct rtrs_srv_path *srv_path)
|
||||
{
|
||||
struct rtrs_srv_sess *srv = srv_path->srv;
|
||||
struct rtrs_srv_ctx *ctx = srv->ctx;
|
||||
int up;
|
||||
int up, ret = 0;
|
||||
|
||||
mutex_lock(&srv->paths_ev_mutex);
|
||||
up = ++srv->paths_up;
|
||||
if (up == 1)
|
||||
ctx->ops.link_ev(srv, RTRS_SRV_LINK_EV_CONNECTED, NULL);
|
||||
ret = ctx->ops.link_ev(srv, RTRS_SRV_LINK_EV_CONNECTED, NULL);
|
||||
mutex_unlock(&srv->paths_ev_mutex);
|
||||
|
||||
/* Mark session as established */
|
||||
srv_path->established = true;
|
||||
if (!ret)
|
||||
srv_path->established = true;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void rtrs_srv_path_down(struct rtrs_srv_path *srv_path)
|
||||
@ -856,7 +863,12 @@ static int process_info_req(struct rtrs_srv_con *con,
|
||||
goto iu_free;
|
||||
kobject_get(&srv_path->kobj);
|
||||
get_device(&srv_path->srv->dev);
|
||||
rtrs_srv_change_state(srv_path, RTRS_SRV_CONNECTED);
|
||||
err = rtrs_srv_change_state(srv_path, RTRS_SRV_CONNECTED);
|
||||
if (!err) {
|
||||
rtrs_err(s, "rtrs_srv_change_state(), err: %d\n", err);
|
||||
goto iu_free;
|
||||
}
|
||||
|
||||
rtrs_srv_start_hb(srv_path);
|
||||
|
||||
/*
|
||||
@ -865,7 +877,11 @@ static int process_info_req(struct rtrs_srv_con *con,
|
||||
* all connections are successfully established. Thus, simply notify
|
||||
* listener with a proper event if we are the first path.
|
||||
*/
|
||||
rtrs_srv_path_up(srv_path);
|
||||
err = rtrs_srv_path_up(srv_path);
|
||||
if (err) {
|
||||
rtrs_err(s, "rtrs_srv_path_up(), err: %d\n", err);
|
||||
goto iu_free;
|
||||
}
|
||||
|
||||
ib_dma_sync_single_for_device(srv_path->s.dev->ib_dev,
|
||||
tx_iu->dma_addr,
|
||||
@ -1521,7 +1537,6 @@ static void rtrs_srv_close_work(struct work_struct *work)
|
||||
|
||||
srv_path = container_of(work, typeof(*srv_path), close_work);
|
||||
|
||||
rtrs_srv_destroy_path_files(srv_path);
|
||||
rtrs_srv_stop_hb(srv_path);
|
||||
|
||||
for (i = 0; i < srv_path->s.con_num; i++) {
|
||||
@ -1541,6 +1556,8 @@ static void rtrs_srv_close_work(struct work_struct *work)
|
||||
/* Wait for all completion */
|
||||
wait_for_completion(&srv_path->complete_done);
|
||||
|
||||
rtrs_srv_destroy_path_files(srv_path);
|
||||
|
||||
/* Notify upper layer if we are the last path */
|
||||
rtrs_srv_path_down(srv_path);
|
||||
|
||||
|
||||
174
drivers/md/md.c
174
drivers/md/md.c
@ -93,6 +93,18 @@ static int remove_and_add_spares(struct mddev *mddev,
|
||||
struct md_rdev *this);
|
||||
static void mddev_detach(struct mddev *mddev);
|
||||
|
||||
enum md_ro_state {
|
||||
MD_RDWR,
|
||||
MD_RDONLY,
|
||||
MD_AUTO_READ,
|
||||
MD_MAX_STATE
|
||||
};
|
||||
|
||||
static bool md_is_rdwr(struct mddev *mddev)
|
||||
{
|
||||
return (mddev->ro == MD_RDWR);
|
||||
}
|
||||
|
||||
/*
|
||||
* Default number of read corrections we'll attempt on an rdev
|
||||
* before ejecting it from the array. We divide the read error
|
||||
@ -444,7 +456,7 @@ static void md_submit_bio(struct bio *bio)
|
||||
if (!bio)
|
||||
return;
|
||||
|
||||
if (mddev->ro == 1 && unlikely(rw == WRITE)) {
|
||||
if (mddev->ro == MD_RDONLY && unlikely(rw == WRITE)) {
|
||||
if (bio_sectors(bio) != 0)
|
||||
bio->bi_status = BLK_STS_IOERR;
|
||||
bio_endio(bio);
|
||||
@ -2643,7 +2655,7 @@ void md_update_sb(struct mddev *mddev, int force_change)
|
||||
int any_badblocks_changed = 0;
|
||||
int ret = -1;
|
||||
|
||||
if (mddev->ro) {
|
||||
if (!md_is_rdwr(mddev)) {
|
||||
if (force_change)
|
||||
set_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags);
|
||||
return;
|
||||
@ -3909,7 +3921,7 @@ level_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
goto out_unlock;
|
||||
}
|
||||
rv = -EROFS;
|
||||
if (mddev->ro)
|
||||
if (!md_is_rdwr(mddev))
|
||||
goto out_unlock;
|
||||
|
||||
/* request to change the personality. Need to ensure:
|
||||
@ -4115,7 +4127,7 @@ layout_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
if (mddev->pers) {
|
||||
if (mddev->pers->check_reshape == NULL)
|
||||
err = -EBUSY;
|
||||
else if (mddev->ro)
|
||||
else if (!md_is_rdwr(mddev))
|
||||
err = -EROFS;
|
||||
else {
|
||||
mddev->new_layout = n;
|
||||
@ -4224,7 +4236,7 @@ chunk_size_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
if (mddev->pers) {
|
||||
if (mddev->pers->check_reshape == NULL)
|
||||
err = -EBUSY;
|
||||
else if (mddev->ro)
|
||||
else if (!md_is_rdwr(mddev))
|
||||
err = -EROFS;
|
||||
else {
|
||||
mddev->new_chunk_sectors = n >> 9;
|
||||
@ -4347,13 +4359,13 @@ array_state_show(struct mddev *mddev, char *page)
|
||||
|
||||
if (mddev->pers && !test_bit(MD_NOT_READY, &mddev->flags)) {
|
||||
switch(mddev->ro) {
|
||||
case 1:
|
||||
case MD_RDONLY:
|
||||
st = readonly;
|
||||
break;
|
||||
case 2:
|
||||
case MD_AUTO_READ:
|
||||
st = read_auto;
|
||||
break;
|
||||
case 0:
|
||||
case MD_RDWR:
|
||||
spin_lock(&mddev->lock);
|
||||
if (test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags))
|
||||
st = write_pending;
|
||||
@ -4389,7 +4401,8 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
int err = 0;
|
||||
enum array_state st = match_word(buf, array_states);
|
||||
|
||||
if (mddev->pers && (st == active || st == clean) && mddev->ro != 1) {
|
||||
if (mddev->pers && (st == active || st == clean) &&
|
||||
mddev->ro != MD_RDONLY) {
|
||||
/* don't take reconfig_mutex when toggling between
|
||||
* clean and active
|
||||
*/
|
||||
@ -4433,23 +4446,23 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
if (mddev->pers)
|
||||
err = md_set_readonly(mddev, NULL);
|
||||
else {
|
||||
mddev->ro = 1;
|
||||
mddev->ro = MD_RDONLY;
|
||||
set_disk_ro(mddev->gendisk, 1);
|
||||
err = do_md_run(mddev);
|
||||
}
|
||||
break;
|
||||
case read_auto:
|
||||
if (mddev->pers) {
|
||||
if (mddev->ro == 0)
|
||||
if (md_is_rdwr(mddev))
|
||||
err = md_set_readonly(mddev, NULL);
|
||||
else if (mddev->ro == 1)
|
||||
else if (mddev->ro == MD_RDONLY)
|
||||
err = restart_array(mddev);
|
||||
if (err == 0) {
|
||||
mddev->ro = 2;
|
||||
mddev->ro = MD_AUTO_READ;
|
||||
set_disk_ro(mddev->gendisk, 0);
|
||||
}
|
||||
} else {
|
||||
mddev->ro = 2;
|
||||
mddev->ro = MD_AUTO_READ;
|
||||
err = do_md_run(mddev);
|
||||
}
|
||||
break;
|
||||
@ -4474,7 +4487,7 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
wake_up(&mddev->sb_wait);
|
||||
err = 0;
|
||||
} else {
|
||||
mddev->ro = 0;
|
||||
mddev->ro = MD_RDWR;
|
||||
set_disk_ro(mddev->gendisk, 0);
|
||||
err = do_md_run(mddev);
|
||||
}
|
||||
@ -4775,7 +4788,7 @@ action_show(struct mddev *mddev, char *page)
|
||||
if (test_bit(MD_RECOVERY_FROZEN, &recovery))
|
||||
type = "frozen";
|
||||
else if (test_bit(MD_RECOVERY_RUNNING, &recovery) ||
|
||||
(!mddev->ro && test_bit(MD_RECOVERY_NEEDED, &recovery))) {
|
||||
(md_is_rdwr(mddev) && test_bit(MD_RECOVERY_NEEDED, &recovery))) {
|
||||
if (test_bit(MD_RECOVERY_RESHAPE, &recovery))
|
||||
type = "reshape";
|
||||
else if (test_bit(MD_RECOVERY_SYNC, &recovery)) {
|
||||
@ -4861,11 +4874,11 @@ action_store(struct mddev *mddev, const char *page, size_t len)
|
||||
set_bit(MD_RECOVERY_REQUESTED, &mddev->recovery);
|
||||
set_bit(MD_RECOVERY_SYNC, &mddev->recovery);
|
||||
}
|
||||
if (mddev->ro == 2) {
|
||||
if (mddev->ro == MD_AUTO_READ) {
|
||||
/* A write to sync_action is enough to justify
|
||||
* canceling read-auto mode
|
||||
*/
|
||||
mddev->ro = 0;
|
||||
mddev->ro = MD_RDWR;
|
||||
md_wakeup_thread(mddev->sync_thread);
|
||||
}
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
@ -5093,8 +5106,7 @@ max_sync_store(struct mddev *mddev, const char *buf, size_t len)
|
||||
goto out_unlock;
|
||||
|
||||
err = -EBUSY;
|
||||
if (max < mddev->resync_max &&
|
||||
mddev->ro == 0 &&
|
||||
if (max < mddev->resync_max && md_is_rdwr(mddev) &&
|
||||
test_bit(MD_RECOVERY_RUNNING, &mddev->recovery))
|
||||
goto out_unlock;
|
||||
|
||||
@ -5829,8 +5841,8 @@ int md_run(struct mddev *mddev)
|
||||
continue;
|
||||
sync_blockdev(rdev->bdev);
|
||||
invalidate_bdev(rdev->bdev);
|
||||
if (mddev->ro != 1 && rdev_read_only(rdev)) {
|
||||
mddev->ro = 1;
|
||||
if (mddev->ro != MD_RDONLY && rdev_read_only(rdev)) {
|
||||
mddev->ro = MD_RDONLY;
|
||||
if (mddev->gendisk)
|
||||
set_disk_ro(mddev->gendisk, 1);
|
||||
}
|
||||
@ -5938,8 +5950,8 @@ int md_run(struct mddev *mddev)
|
||||
|
||||
mddev->ok_start_degraded = start_dirty_degraded;
|
||||
|
||||
if (start_readonly && mddev->ro == 0)
|
||||
mddev->ro = 2; /* read-only, but switch on first write */
|
||||
if (start_readonly && md_is_rdwr(mddev))
|
||||
mddev->ro = MD_AUTO_READ; /* read-only, but switch on first write */
|
||||
|
||||
err = pers->run(mddev);
|
||||
if (err)
|
||||
@ -6017,8 +6029,8 @@ int md_run(struct mddev *mddev)
|
||||
mddev->sysfs_action = sysfs_get_dirent_safe(mddev->kobj.sd, "sync_action");
|
||||
mddev->sysfs_completed = sysfs_get_dirent_safe(mddev->kobj.sd, "sync_completed");
|
||||
mddev->sysfs_degraded = sysfs_get_dirent_safe(mddev->kobj.sd, "degraded");
|
||||
} else if (mddev->ro == 2) /* auto-readonly not meaningful */
|
||||
mddev->ro = 0;
|
||||
} else if (mddev->ro == MD_AUTO_READ)
|
||||
mddev->ro = MD_RDWR;
|
||||
|
||||
atomic_set(&mddev->max_corr_read_errors,
|
||||
MD_DEFAULT_MAX_CORRECTED_READ_ERRORS);
|
||||
@ -6036,7 +6048,7 @@ int md_run(struct mddev *mddev)
|
||||
if (rdev->raid_disk >= 0)
|
||||
sysfs_link_rdev(mddev, rdev); /* failure here is OK */
|
||||
|
||||
if (mddev->degraded && !mddev->ro)
|
||||
if (mddev->degraded && md_is_rdwr(mddev))
|
||||
/* This ensures that recovering status is reported immediately
|
||||
* via sysfs - until a lack of spares is confirmed.
|
||||
*/
|
||||
@ -6128,7 +6140,7 @@ static int restart_array(struct mddev *mddev)
|
||||
return -ENXIO;
|
||||
if (!mddev->pers)
|
||||
return -EINVAL;
|
||||
if (!mddev->ro)
|
||||
if (md_is_rdwr(mddev))
|
||||
return -EBUSY;
|
||||
|
||||
rcu_read_lock();
|
||||
@ -6147,7 +6159,7 @@ static int restart_array(struct mddev *mddev)
|
||||
return -EROFS;
|
||||
|
||||
mddev->safemode = 0;
|
||||
mddev->ro = 0;
|
||||
mddev->ro = MD_RDWR;
|
||||
set_disk_ro(disk, 0);
|
||||
pr_debug("md: %s switched to read-write mode.\n", mdname(mddev));
|
||||
/* Kick recovery or resync if necessary */
|
||||
@ -6174,7 +6186,7 @@ static void md_clean(struct mddev *mddev)
|
||||
mddev->clevel[0] = 0;
|
||||
mddev->flags = 0;
|
||||
mddev->sb_flags = 0;
|
||||
mddev->ro = 0;
|
||||
mddev->ro = MD_RDWR;
|
||||
mddev->metadata_type[0] = 0;
|
||||
mddev->chunk_sectors = 0;
|
||||
mddev->ctime = mddev->utime = 0;
|
||||
@ -6226,7 +6238,7 @@ static void __md_stop_writes(struct mddev *mddev)
|
||||
}
|
||||
md_bitmap_flush(mddev);
|
||||
|
||||
if (mddev->ro == 0 &&
|
||||
if (md_is_rdwr(mddev) &&
|
||||
((!mddev->in_sync && !mddev_is_clustered(mddev)) ||
|
||||
mddev->sb_flags)) {
|
||||
/* mark array as shutdown cleanly */
|
||||
@ -6302,6 +6314,9 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
|
||||
int err = 0;
|
||||
int did_freeze = 0;
|
||||
|
||||
if (mddev->external && test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags))
|
||||
return -EBUSY;
|
||||
|
||||
if (!test_bit(MD_RECOVERY_FROZEN, &mddev->recovery)) {
|
||||
did_freeze = 1;
|
||||
set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
|
||||
@ -6314,8 +6329,6 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
|
||||
* which will now never happen */
|
||||
wake_up_process(mddev->sync_thread->tsk);
|
||||
|
||||
if (mddev->external && test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags))
|
||||
return -EBUSY;
|
||||
mddev_unlock(mddev);
|
||||
wait_event(resync_wait, !test_bit(MD_RECOVERY_RUNNING,
|
||||
&mddev->recovery));
|
||||
@ -6328,29 +6341,30 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
|
||||
mddev->sync_thread ||
|
||||
test_bit(MD_RECOVERY_RUNNING, &mddev->recovery)) {
|
||||
pr_warn("md: %s still in use.\n",mdname(mddev));
|
||||
if (did_freeze) {
|
||||
clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
md_wakeup_thread(mddev->thread);
|
||||
}
|
||||
err = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (mddev->pers) {
|
||||
__md_stop_writes(mddev);
|
||||
|
||||
err = -ENXIO;
|
||||
if (mddev->ro==1)
|
||||
if (mddev->ro == MD_RDONLY) {
|
||||
err = -ENXIO;
|
||||
goto out;
|
||||
mddev->ro = 1;
|
||||
}
|
||||
|
||||
mddev->ro = MD_RDONLY;
|
||||
set_disk_ro(mddev->gendisk, 1);
|
||||
}
|
||||
|
||||
out:
|
||||
if ((mddev->pers && !err) || did_freeze) {
|
||||
clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
md_wakeup_thread(mddev->thread);
|
||||
sysfs_notify_dirent_safe(mddev->sysfs_state);
|
||||
err = 0;
|
||||
}
|
||||
out:
|
||||
|
||||
mutex_unlock(&mddev->open_mutex);
|
||||
return err;
|
||||
}
|
||||
@ -6399,7 +6413,7 @@ static int do_md_stop(struct mddev *mddev, int mode,
|
||||
return -EBUSY;
|
||||
}
|
||||
if (mddev->pers) {
|
||||
if (mddev->ro)
|
||||
if (!md_is_rdwr(mddev))
|
||||
set_disk_ro(disk, 0);
|
||||
|
||||
__md_stop_writes(mddev);
|
||||
@ -6416,8 +6430,8 @@ static int do_md_stop(struct mddev *mddev, int mode,
|
||||
mutex_unlock(&mddev->open_mutex);
|
||||
mddev->changed = 1;
|
||||
|
||||
if (mddev->ro)
|
||||
mddev->ro = 0;
|
||||
if (!md_is_rdwr(mddev))
|
||||
mddev->ro = MD_RDWR;
|
||||
} else
|
||||
mutex_unlock(&mddev->open_mutex);
|
||||
/*
|
||||
@ -7232,7 +7246,7 @@ static int update_size(struct mddev *mddev, sector_t num_sectors)
|
||||
if (test_bit(MD_RECOVERY_RUNNING, &mddev->recovery) ||
|
||||
mddev->sync_thread)
|
||||
return -EBUSY;
|
||||
if (mddev->ro)
|
||||
if (!md_is_rdwr(mddev))
|
||||
return -EROFS;
|
||||
|
||||
rdev_for_each(rdev, mddev) {
|
||||
@ -7262,7 +7276,7 @@ static int update_raid_disks(struct mddev *mddev, int raid_disks)
|
||||
/* change the number of raid disks */
|
||||
if (mddev->pers->check_reshape == NULL)
|
||||
return -EINVAL;
|
||||
if (mddev->ro)
|
||||
if (!md_is_rdwr(mddev))
|
||||
return -EROFS;
|
||||
if (raid_disks <= 0 ||
|
||||
(mddev->max_disks && raid_disks >= mddev->max_disks))
|
||||
@ -7686,26 +7700,25 @@ static int md_ioctl(struct block_device *bdev, fmode_t mode,
|
||||
* The remaining ioctls are changing the state of the
|
||||
* superblock, so we do not allow them on read-only arrays.
|
||||
*/
|
||||
if (mddev->ro && mddev->pers) {
|
||||
if (mddev->ro == 2) {
|
||||
mddev->ro = 0;
|
||||
sysfs_notify_dirent_safe(mddev->sysfs_state);
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
/* mddev_unlock will wake thread */
|
||||
/* If a device failed while we were read-only, we
|
||||
* need to make sure the metadata is updated now.
|
||||
*/
|
||||
if (test_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags)) {
|
||||
mddev_unlock(mddev);
|
||||
wait_event(mddev->sb_wait,
|
||||
!test_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags) &&
|
||||
!test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags));
|
||||
mddev_lock_nointr(mddev);
|
||||
}
|
||||
} else {
|
||||
if (!md_is_rdwr(mddev) && mddev->pers) {
|
||||
if (mddev->ro != MD_AUTO_READ) {
|
||||
err = -EROFS;
|
||||
goto unlock;
|
||||
}
|
||||
mddev->ro = MD_RDWR;
|
||||
sysfs_notify_dirent_safe(mddev->sysfs_state);
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
/* mddev_unlock will wake thread */
|
||||
/* If a device failed while we were read-only, we
|
||||
* need to make sure the metadata is updated now.
|
||||
*/
|
||||
if (test_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags)) {
|
||||
mddev_unlock(mddev);
|
||||
wait_event(mddev->sb_wait,
|
||||
!test_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags) &&
|
||||
!test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags));
|
||||
mddev_lock_nointr(mddev);
|
||||
}
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
@ -7791,11 +7804,11 @@ static int md_set_read_only(struct block_device *bdev, bool ro)
|
||||
* Transitioning to read-auto need only happen for arrays that call
|
||||
* md_write_start and which are not ready for writes yet.
|
||||
*/
|
||||
if (!ro && mddev->ro == 1 && mddev->pers) {
|
||||
if (!ro && mddev->ro == MD_RDONLY && mddev->pers) {
|
||||
err = restart_array(mddev);
|
||||
if (err)
|
||||
goto out_unlock;
|
||||
mddev->ro = 2;
|
||||
mddev->ro = MD_AUTO_READ;
|
||||
}
|
||||
|
||||
out_unlock:
|
||||
@ -8269,9 +8282,9 @@ static int md_seq_show(struct seq_file *seq, void *v)
|
||||
seq_printf(seq, "%s : %sactive", mdname(mddev),
|
||||
mddev->pers ? "" : "in");
|
||||
if (mddev->pers) {
|
||||
if (mddev->ro==1)
|
||||
if (mddev->ro == MD_RDONLY)
|
||||
seq_printf(seq, " (read-only)");
|
||||
if (mddev->ro==2)
|
||||
if (mddev->ro == MD_AUTO_READ)
|
||||
seq_printf(seq, " (auto-read-only)");
|
||||
seq_printf(seq, " %s", mddev->pers->name);
|
||||
}
|
||||
@ -8530,10 +8543,10 @@ bool md_write_start(struct mddev *mddev, struct bio *bi)
|
||||
if (bio_data_dir(bi) != WRITE)
|
||||
return true;
|
||||
|
||||
BUG_ON(mddev->ro == 1);
|
||||
if (mddev->ro == 2) {
|
||||
BUG_ON(mddev->ro == MD_RDONLY);
|
||||
if (mddev->ro == MD_AUTO_READ) {
|
||||
/* need to switch to read/write */
|
||||
mddev->ro = 0;
|
||||
mddev->ro = MD_RDWR;
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
md_wakeup_thread(mddev->thread);
|
||||
md_wakeup_thread(mddev->sync_thread);
|
||||
@ -8584,7 +8597,7 @@ void md_write_inc(struct mddev *mddev, struct bio *bi)
|
||||
{
|
||||
if (bio_data_dir(bi) != WRITE)
|
||||
return;
|
||||
WARN_ON_ONCE(mddev->in_sync || mddev->ro);
|
||||
WARN_ON_ONCE(mddev->in_sync || !md_is_rdwr(mddev));
|
||||
percpu_ref_get(&mddev->writes_pending);
|
||||
}
|
||||
EXPORT_SYMBOL(md_write_inc);
|
||||
@ -8690,7 +8703,7 @@ void md_allow_write(struct mddev *mddev)
|
||||
{
|
||||
if (!mddev->pers)
|
||||
return;
|
||||
if (mddev->ro)
|
||||
if (!md_is_rdwr(mddev))
|
||||
return;
|
||||
if (!mddev->pers->sync_request)
|
||||
return;
|
||||
@ -8738,7 +8751,7 @@ void md_do_sync(struct md_thread *thread)
|
||||
if (test_bit(MD_RECOVERY_DONE, &mddev->recovery) ||
|
||||
test_bit(MD_RECOVERY_WAIT, &mddev->recovery))
|
||||
return;
|
||||
if (mddev->ro) {/* never try to sync a read-only array */
|
||||
if (!md_is_rdwr(mddev)) {/* never try to sync a read-only array */
|
||||
set_bit(MD_RECOVERY_INTR, &mddev->recovery);
|
||||
return;
|
||||
}
|
||||
@ -9207,9 +9220,9 @@ static int remove_and_add_spares(struct mddev *mddev,
|
||||
if (test_bit(Faulty, &rdev->flags))
|
||||
continue;
|
||||
if (!test_bit(Journal, &rdev->flags)) {
|
||||
if (mddev->ro &&
|
||||
! (rdev->saved_raid_disk >= 0 &&
|
||||
!test_bit(Bitmap_sync, &rdev->flags)))
|
||||
if (!md_is_rdwr(mddev) &&
|
||||
!(rdev->saved_raid_disk >= 0 &&
|
||||
!test_bit(Bitmap_sync, &rdev->flags)))
|
||||
continue;
|
||||
|
||||
rdev->recovery_offset = 0;
|
||||
@ -9307,7 +9320,8 @@ void md_check_recovery(struct mddev *mddev)
|
||||
flush_signals(current);
|
||||
}
|
||||
|
||||
if (mddev->ro && !test_bit(MD_RECOVERY_NEEDED, &mddev->recovery))
|
||||
if (!md_is_rdwr(mddev) &&
|
||||
!test_bit(MD_RECOVERY_NEEDED, &mddev->recovery))
|
||||
return;
|
||||
if ( ! (
|
||||
(mddev->sb_flags & ~ (1<<MD_SB_CHANGE_PENDING)) ||
|
||||
@ -9326,7 +9340,7 @@ void md_check_recovery(struct mddev *mddev)
|
||||
if (!mddev->external && mddev->safemode == 1)
|
||||
mddev->safemode = 0;
|
||||
|
||||
if (mddev->ro) {
|
||||
if (!md_is_rdwr(mddev)) {
|
||||
struct md_rdev *rdev;
|
||||
if (!mddev->external && mddev->in_sync)
|
||||
/* 'Blocked' flag not needed as failed devices
|
||||
|
||||
@ -5905,11 +5905,11 @@ static bool stripe_ahead_of_reshape(struct mddev *mddev, struct r5conf *conf,
|
||||
int dd_idx;
|
||||
|
||||
for (dd_idx = 0; dd_idx < sh->disks; dd_idx++) {
|
||||
if (dd_idx == sh->pd_idx)
|
||||
if (dd_idx == sh->pd_idx || dd_idx == sh->qd_idx)
|
||||
continue;
|
||||
|
||||
min_sector = min(min_sector, sh->dev[dd_idx].sector);
|
||||
max_sector = min(max_sector, sh->dev[dd_idx].sector);
|
||||
max_sector = max(max_sector, sh->dev[dd_idx].sector);
|
||||
}
|
||||
|
||||
spin_lock_irq(&conf->device_lock);
|
||||
|
||||
@ -1978,7 +1978,7 @@ ssize_t mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb)
|
||||
|
||||
mei_hdr = mei_msg_hdr_init(cb);
|
||||
if (IS_ERR(mei_hdr)) {
|
||||
rets = -PTR_ERR(mei_hdr);
|
||||
rets = PTR_ERR(mei_hdr);
|
||||
mei_hdr = NULL;
|
||||
goto err;
|
||||
}
|
||||
@ -2002,7 +2002,7 @@ ssize_t mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb)
|
||||
|
||||
hbuf_slots = mei_hbuf_empty_slots(dev);
|
||||
if (hbuf_slots < 0) {
|
||||
rets = -EOVERFLOW;
|
||||
buf_len = -EOVERFLOW;
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
||||
@ -186,6 +186,8 @@ do { \
|
||||
#define ARC_IS_5MBIT 1 /* card default speed is 5MBit */
|
||||
#define ARC_CAN_10MBIT 2 /* card uses COM20022, supporting 10MBit,
|
||||
but default is 2.5MBit. */
|
||||
#define ARC_HAS_LED 4 /* card has software controlled LEDs */
|
||||
#define ARC_HAS_ROTARY 8 /* card has rotary encoder */
|
||||
|
||||
/* information needed to define an encapsulation driver */
|
||||
struct ArcProto {
|
||||
|
||||
@ -213,12 +213,13 @@ static int com20020pci_probe(struct pci_dev *pdev,
|
||||
if (!strncmp(ci->name, "EAE PLX-PCI FB2", 15))
|
||||
lp->backplane = 1;
|
||||
|
||||
/* Get the dev_id from the PLX rotary coder */
|
||||
if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
|
||||
dev_id_mask = 0x3;
|
||||
dev->dev_id = (inb(priv->misc + ci->rotary) >> 4) & dev_id_mask;
|
||||
|
||||
snprintf(dev->name, sizeof(dev->name), "arc%d-%d", dev->dev_id, i);
|
||||
if (ci->flags & ARC_HAS_ROTARY) {
|
||||
/* Get the dev_id from the PLX rotary coder */
|
||||
if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
|
||||
dev_id_mask = 0x3;
|
||||
dev->dev_id = (inb(priv->misc + ci->rotary) >> 4) & dev_id_mask;
|
||||
snprintf(dev->name, sizeof(dev->name), "arc%d-%d", dev->dev_id, i);
|
||||
}
|
||||
|
||||
if (arcnet_inb(ioaddr, COM20020_REG_R_STATUS) == 0xFF) {
|
||||
pr_err("IO address %Xh is empty!\n", ioaddr);
|
||||
@ -230,6 +231,10 @@ static int com20020pci_probe(struct pci_dev *pdev,
|
||||
goto err_free_arcdev;
|
||||
}
|
||||
|
||||
ret = com20020_found(dev, IRQF_SHARED);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
card = devm_kzalloc(&pdev->dev, sizeof(struct com20020_dev),
|
||||
GFP_KERNEL);
|
||||
if (!card) {
|
||||
@ -239,41 +244,39 @@ static int com20020pci_probe(struct pci_dev *pdev,
|
||||
|
||||
card->index = i;
|
||||
card->pci_priv = priv;
|
||||
card->tx_led.brightness_set = led_tx_set;
|
||||
card->tx_led.default_trigger = devm_kasprintf(&pdev->dev,
|
||||
GFP_KERNEL, "arc%d-%d-tx",
|
||||
dev->dev_id, i);
|
||||
card->tx_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
|
||||
"pci:green:tx:%d-%d",
|
||||
dev->dev_id, i);
|
||||
|
||||
card->tx_led.dev = &dev->dev;
|
||||
card->recon_led.brightness_set = led_recon_set;
|
||||
card->recon_led.default_trigger = devm_kasprintf(&pdev->dev,
|
||||
GFP_KERNEL, "arc%d-%d-recon",
|
||||
dev->dev_id, i);
|
||||
card->recon_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
|
||||
"pci:red:recon:%d-%d",
|
||||
dev->dev_id, i);
|
||||
card->recon_led.dev = &dev->dev;
|
||||
if (ci->flags & ARC_HAS_LED) {
|
||||
card->tx_led.brightness_set = led_tx_set;
|
||||
card->tx_led.default_trigger = devm_kasprintf(&pdev->dev,
|
||||
GFP_KERNEL, "arc%d-%d-tx",
|
||||
dev->dev_id, i);
|
||||
card->tx_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
|
||||
"pci:green:tx:%d-%d",
|
||||
dev->dev_id, i);
|
||||
|
||||
card->tx_led.dev = &dev->dev;
|
||||
card->recon_led.brightness_set = led_recon_set;
|
||||
card->recon_led.default_trigger = devm_kasprintf(&pdev->dev,
|
||||
GFP_KERNEL, "arc%d-%d-recon",
|
||||
dev->dev_id, i);
|
||||
card->recon_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
|
||||
"pci:red:recon:%d-%d",
|
||||
dev->dev_id, i);
|
||||
card->recon_led.dev = &dev->dev;
|
||||
|
||||
ret = devm_led_classdev_register(&pdev->dev, &card->tx_led);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
ret = devm_led_classdev_register(&pdev->dev, &card->recon_led);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
dev_set_drvdata(&dev->dev, card);
|
||||
devm_arcnet_led_init(dev, dev->dev_id, i);
|
||||
}
|
||||
|
||||
card->dev = dev;
|
||||
|
||||
ret = devm_led_classdev_register(&pdev->dev, &card->tx_led);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
ret = devm_led_classdev_register(&pdev->dev, &card->recon_led);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
dev_set_drvdata(&dev->dev, card);
|
||||
|
||||
ret = com20020_found(dev, IRQF_SHARED);
|
||||
if (ret)
|
||||
goto err_free_arcdev;
|
||||
|
||||
devm_arcnet_led_init(dev, dev->dev_id, i);
|
||||
|
||||
list_add(&card->list, &priv->list_dev);
|
||||
continue;
|
||||
|
||||
@ -329,7 +332,7 @@ static struct com20020_pci_card_info card_info_5mbit = {
|
||||
};
|
||||
|
||||
static struct com20020_pci_card_info card_info_sohard = {
|
||||
.name = "PLX-PCI",
|
||||
.name = "SOHARD SH ARC-PCI",
|
||||
.devcount = 1,
|
||||
/* SOHARD needs PCI base addr 4 */
|
||||
.chan_map_tbl = {
|
||||
@ -364,7 +367,7 @@ static struct com20020_pci_card_info card_info_eae_arc1 = {
|
||||
},
|
||||
},
|
||||
.rotary = 0x0,
|
||||
.flags = ARC_CAN_10MBIT,
|
||||
.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
|
||||
};
|
||||
|
||||
static struct com20020_pci_card_info card_info_eae_ma1 = {
|
||||
@ -396,7 +399,7 @@ static struct com20020_pci_card_info card_info_eae_ma1 = {
|
||||
},
|
||||
},
|
||||
.rotary = 0x0,
|
||||
.flags = ARC_CAN_10MBIT,
|
||||
.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
|
||||
};
|
||||
|
||||
static struct com20020_pci_card_info card_info_eae_fb2 = {
|
||||
@ -421,7 +424,7 @@ static struct com20020_pci_card_info card_info_eae_fb2 = {
|
||||
},
|
||||
},
|
||||
.rotary = 0x0,
|
||||
.flags = ARC_CAN_10MBIT,
|
||||
.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
|
||||
};
|
||||
|
||||
static const struct pci_device_id com20020pci_id_table[] = {
|
||||
|
||||
@ -553,17 +553,17 @@ void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp)
|
||||
|
||||
/* aq_ptp_rx_hwtstamp - utility function which checks for RX time stamp
|
||||
* @adapter: pointer to adapter struct
|
||||
* @skb: particular skb to send timestamp with
|
||||
* @shhwtstamps: particular skb_shared_hwtstamps to save timestamp
|
||||
*
|
||||
* if the timestamp is valid, we convert it into the timecounter ns
|
||||
* value, then store that result into the hwtstamps structure which
|
||||
* is passed up the network stack
|
||||
*/
|
||||
static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct sk_buff *skb,
|
||||
static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct skb_shared_hwtstamps *shhwtstamps,
|
||||
u64 timestamp)
|
||||
{
|
||||
timestamp -= atomic_read(&aq_ptp->offset_ingress);
|
||||
aq_ptp_convert_to_hwtstamp(aq_ptp, skb_hwtstamps(skb), timestamp);
|
||||
aq_ptp_convert_to_hwtstamp(aq_ptp, shhwtstamps, timestamp);
|
||||
}
|
||||
|
||||
void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,
|
||||
@ -639,7 +639,7 @@ bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)
|
||||
&aq_ptp->ptp_rx == ring || &aq_ptp->hwts_rx == ring;
|
||||
}
|
||||
|
||||
u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
|
||||
u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
|
||||
unsigned int len)
|
||||
{
|
||||
struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
|
||||
@ -648,7 +648,7 @@ u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
|
||||
p, len, ×tamp);
|
||||
|
||||
if (ret > 0)
|
||||
aq_ptp_rx_hwtstamp(aq_ptp, skb, timestamp);
|
||||
aq_ptp_rx_hwtstamp(aq_ptp, shhwtstamps, timestamp);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -67,7 +67,7 @@ int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,
|
||||
/* Return either ring is belong to PTP or not*/
|
||||
bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring);
|
||||
|
||||
u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
|
||||
u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
|
||||
unsigned int len);
|
||||
|
||||
struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp);
|
||||
@ -143,7 +143,7 @@ static inline bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)
|
||||
}
|
||||
|
||||
static inline u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic,
|
||||
struct sk_buff *skb, u8 *p,
|
||||
struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
|
||||
unsigned int len)
|
||||
{
|
||||
return 0;
|
||||
|
||||
@ -647,7 +647,7 @@ static int __aq_ring_rx_clean(struct aq_ring_s *self, struct napi_struct *napi,
|
||||
}
|
||||
if (is_ptp_ring)
|
||||
buff->len -=
|
||||
aq_ptp_extract_ts(self->aq_nic, skb,
|
||||
aq_ptp_extract_ts(self->aq_nic, skb_hwtstamps(skb),
|
||||
aq_buf_vaddr(&buff->rxdata),
|
||||
buff->len);
|
||||
|
||||
@ -742,6 +742,8 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring,
|
||||
struct aq_ring_buff_s *buff = &rx_ring->buff_ring[rx_ring->sw_head];
|
||||
bool is_ptp_ring = aq_ptp_ring(rx_ring->aq_nic, rx_ring);
|
||||
struct aq_ring_buff_s *buff_ = NULL;
|
||||
u16 ptp_hwtstamp_len = 0;
|
||||
struct skb_shared_hwtstamps shhwtstamps;
|
||||
struct sk_buff *skb = NULL;
|
||||
unsigned int next_ = 0U;
|
||||
struct xdp_buff xdp;
|
||||
@ -810,11 +812,12 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring,
|
||||
hard_start = page_address(buff->rxdata.page) +
|
||||
buff->rxdata.pg_off - rx_ring->page_offset;
|
||||
|
||||
if (is_ptp_ring)
|
||||
buff->len -=
|
||||
aq_ptp_extract_ts(rx_ring->aq_nic, skb,
|
||||
aq_buf_vaddr(&buff->rxdata),
|
||||
buff->len);
|
||||
if (is_ptp_ring) {
|
||||
ptp_hwtstamp_len = aq_ptp_extract_ts(rx_ring->aq_nic, &shhwtstamps,
|
||||
aq_buf_vaddr(&buff->rxdata),
|
||||
buff->len);
|
||||
buff->len -= ptp_hwtstamp_len;
|
||||
}
|
||||
|
||||
xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
|
||||
xdp_prepare_buff(&xdp, hard_start, rx_ring->page_offset,
|
||||
@ -834,6 +837,9 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring,
|
||||
if (IS_ERR(skb) || !skb)
|
||||
continue;
|
||||
|
||||
if (ptp_hwtstamp_len > 0)
|
||||
*skb_hwtstamps(skb) = shhwtstamps;
|
||||
|
||||
if (buff->is_vlan)
|
||||
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
|
||||
buff->vlan_rx_tag);
|
||||
|
||||
@ -2075,6 +2075,7 @@ int bnxt_init_tc(struct bnxt *bp)
|
||||
rhashtable_destroy(&tc_info->flow_table);
|
||||
free_tc_info:
|
||||
kfree(tc_info);
|
||||
bp->tc_info = NULL;
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
@ -6853,7 +6853,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
|
||||
desc_idx, *post_ptr);
|
||||
drop_it_no_recycle:
|
||||
/* Other statistics kept track of by card. */
|
||||
tp->rx_dropped++;
|
||||
tnapi->rx_dropped++;
|
||||
goto next_pkt;
|
||||
}
|
||||
|
||||
@ -7879,8 +7879,10 @@ static int tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi,
|
||||
|
||||
segs = skb_gso_segment(skb, tp->dev->features &
|
||||
~(NETIF_F_TSO | NETIF_F_TSO6));
|
||||
if (IS_ERR(segs) || !segs)
|
||||
if (IS_ERR(segs) || !segs) {
|
||||
tnapi->tx_dropped++;
|
||||
goto tg3_tso_bug_end;
|
||||
}
|
||||
|
||||
skb_list_walk_safe(segs, seg, next) {
|
||||
skb_mark_not_on_list(seg);
|
||||
@ -8151,7 +8153,7 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
drop:
|
||||
dev_kfree_skb_any(skb);
|
||||
drop_nofree:
|
||||
tp->tx_dropped++;
|
||||
tnapi->tx_dropped++;
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
@ -9330,7 +9332,7 @@ static void __tg3_set_rx_mode(struct net_device *);
|
||||
/* tp->lock is held. */
|
||||
static int tg3_halt(struct tg3 *tp, int kind, bool silent)
|
||||
{
|
||||
int err;
|
||||
int err, i;
|
||||
|
||||
tg3_stop_fw(tp);
|
||||
|
||||
@ -9351,6 +9353,13 @@ static int tg3_halt(struct tg3 *tp, int kind, bool silent)
|
||||
|
||||
/* And make sure the next sample is new data */
|
||||
memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats));
|
||||
|
||||
for (i = 0; i < TG3_IRQ_MAX_VECS; ++i) {
|
||||
struct tg3_napi *tnapi = &tp->napi[i];
|
||||
|
||||
tnapi->rx_dropped = 0;
|
||||
tnapi->tx_dropped = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return err;
|
||||
@ -11900,6 +11909,9 @@ static void tg3_get_nstats(struct tg3 *tp, struct rtnl_link_stats64 *stats)
|
||||
{
|
||||
struct rtnl_link_stats64 *old_stats = &tp->net_stats_prev;
|
||||
struct tg3_hw_stats *hw_stats = tp->hw_stats;
|
||||
unsigned long rx_dropped;
|
||||
unsigned long tx_dropped;
|
||||
int i;
|
||||
|
||||
stats->rx_packets = old_stats->rx_packets +
|
||||
get_stat64(&hw_stats->rx_ucast_packets) +
|
||||
@ -11946,8 +11958,26 @@ static void tg3_get_nstats(struct tg3 *tp, struct rtnl_link_stats64 *stats)
|
||||
stats->rx_missed_errors = old_stats->rx_missed_errors +
|
||||
get_stat64(&hw_stats->rx_discards);
|
||||
|
||||
stats->rx_dropped = tp->rx_dropped;
|
||||
stats->tx_dropped = tp->tx_dropped;
|
||||
/* Aggregate per-queue counters. The per-queue counters are updated
|
||||
* by a single writer, race-free. The result computed by this loop
|
||||
* might not be 100% accurate (counters can be updated in the middle of
|
||||
* the loop) but the next tg3_get_nstats() will recompute the current
|
||||
* value so it is acceptable.
|
||||
*
|
||||
* Note that these counters wrap around at 4G on 32bit machines.
|
||||
*/
|
||||
rx_dropped = (unsigned long)(old_stats->rx_dropped);
|
||||
tx_dropped = (unsigned long)(old_stats->tx_dropped);
|
||||
|
||||
for (i = 0; i < tp->irq_cnt; i++) {
|
||||
struct tg3_napi *tnapi = &tp->napi[i];
|
||||
|
||||
rx_dropped += tnapi->rx_dropped;
|
||||
tx_dropped += tnapi->tx_dropped;
|
||||
}
|
||||
|
||||
stats->rx_dropped = rx_dropped;
|
||||
stats->tx_dropped = tx_dropped;
|
||||
}
|
||||
|
||||
static int tg3_get_regs_len(struct net_device *dev)
|
||||
|
||||
@ -3018,6 +3018,7 @@ struct tg3_napi {
|
||||
u16 *rx_rcb_prod_idx;
|
||||
struct tg3_rx_prodring_set prodring;
|
||||
struct tg3_rx_buffer_desc *rx_rcb;
|
||||
unsigned long rx_dropped;
|
||||
|
||||
u32 tx_prod ____cacheline_aligned;
|
||||
u32 tx_cons;
|
||||
@ -3026,6 +3027,7 @@ struct tg3_napi {
|
||||
u32 prodmbox;
|
||||
struct tg3_tx_buffer_desc *tx_ring;
|
||||
struct tg3_tx_ring_info *tx_buffers;
|
||||
unsigned long tx_dropped;
|
||||
|
||||
dma_addr_t status_mapping;
|
||||
dma_addr_t rx_rcb_mapping;
|
||||
@ -3219,8 +3221,6 @@ struct tg3 {
|
||||
|
||||
|
||||
/* begin "everything else" cacheline(s) section */
|
||||
unsigned long rx_dropped;
|
||||
unsigned long tx_dropped;
|
||||
struct rtnl_link_stats64 net_stats_prev;
|
||||
struct tg3_ethtool_stats estats_prev;
|
||||
|
||||
|
||||
@ -66,6 +66,27 @@ static enum mac_mode hns_get_enet_interface(const struct hns_mac_cb *mac_cb)
|
||||
}
|
||||
}
|
||||
|
||||
static u32 hns_mac_link_anti_shake(struct mac_driver *mac_ctrl_drv)
|
||||
{
|
||||
#define HNS_MAC_LINK_WAIT_TIME 5
|
||||
#define HNS_MAC_LINK_WAIT_CNT 40
|
||||
|
||||
u32 link_status = 0;
|
||||
int i;
|
||||
|
||||
if (!mac_ctrl_drv->get_link_status)
|
||||
return link_status;
|
||||
|
||||
for (i = 0; i < HNS_MAC_LINK_WAIT_CNT; i++) {
|
||||
msleep(HNS_MAC_LINK_WAIT_TIME);
|
||||
mac_ctrl_drv->get_link_status(mac_ctrl_drv, &link_status);
|
||||
if (!link_status)
|
||||
break;
|
||||
}
|
||||
|
||||
return link_status;
|
||||
}
|
||||
|
||||
void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status)
|
||||
{
|
||||
struct mac_driver *mac_ctrl_drv;
|
||||
@ -83,6 +104,14 @@ void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status)
|
||||
&sfp_prsnt);
|
||||
if (!ret)
|
||||
*link_status = *link_status && sfp_prsnt;
|
||||
|
||||
/* for FIBER port, it may have a fake link up.
|
||||
* when the link status changes from down to up, we need to do
|
||||
* anti-shake. the anti-shake time is base on tests.
|
||||
* only FIBER port need to do this.
|
||||
*/
|
||||
if (*link_status && !mac_cb->link)
|
||||
*link_status = hns_mac_link_anti_shake(mac_ctrl_drv);
|
||||
}
|
||||
|
||||
mac_cb->link = *link_status;
|
||||
|
||||
@ -142,7 +142,8 @@ MODULE_DEVICE_TABLE(acpi, hns_enet_acpi_match);
|
||||
|
||||
static void fill_desc(struct hnae_ring *ring, void *priv,
|
||||
int size, dma_addr_t dma, int frag_end,
|
||||
int buf_num, enum hns_desc_type type, int mtu)
|
||||
int buf_num, enum hns_desc_type type, int mtu,
|
||||
bool is_gso)
|
||||
{
|
||||
struct hnae_desc *desc = &ring->desc[ring->next_to_use];
|
||||
struct hnae_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
|
||||
@ -275,6 +276,15 @@ static int hns_nic_maybe_stop_tso(
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hns_nic_maybe_stop_tx_v2(struct sk_buff **out_skb, int *bnum,
|
||||
struct hnae_ring *ring)
|
||||
{
|
||||
if (skb_is_gso(*out_skb))
|
||||
return hns_nic_maybe_stop_tso(out_skb, bnum, ring);
|
||||
else
|
||||
return hns_nic_maybe_stop_tx(out_skb, bnum, ring);
|
||||
}
|
||||
|
||||
static void fill_tso_desc(struct hnae_ring *ring, void *priv,
|
||||
int size, dma_addr_t dma, int frag_end,
|
||||
int buf_num, enum hns_desc_type type, int mtu)
|
||||
@ -300,6 +310,19 @@ static void fill_tso_desc(struct hnae_ring *ring, void *priv,
|
||||
mtu);
|
||||
}
|
||||
|
||||
static void fill_desc_v2(struct hnae_ring *ring, void *priv,
|
||||
int size, dma_addr_t dma, int frag_end,
|
||||
int buf_num, enum hns_desc_type type, int mtu,
|
||||
bool is_gso)
|
||||
{
|
||||
if (is_gso)
|
||||
fill_tso_desc(ring, priv, size, dma, frag_end, buf_num, type,
|
||||
mtu);
|
||||
else
|
||||
fill_v2_desc(ring, priv, size, dma, frag_end, buf_num, type,
|
||||
mtu);
|
||||
}
|
||||
|
||||
netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev,
|
||||
struct sk_buff *skb,
|
||||
struct hns_nic_ring_data *ring_data)
|
||||
@ -313,6 +336,7 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev,
|
||||
int seg_num;
|
||||
dma_addr_t dma;
|
||||
int size, next_to_use;
|
||||
bool is_gso;
|
||||
int i;
|
||||
|
||||
switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
|
||||
@ -339,8 +363,9 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev,
|
||||
ring->stats.sw_err_cnt++;
|
||||
goto out_err_tx_ok;
|
||||
}
|
||||
is_gso = skb_is_gso(skb);
|
||||
priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
|
||||
buf_num, DESC_TYPE_SKB, ndev->mtu);
|
||||
buf_num, DESC_TYPE_SKB, ndev->mtu, is_gso);
|
||||
|
||||
/* fill the fragments */
|
||||
for (i = 1; i < seg_num; i++) {
|
||||
@ -354,7 +379,7 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev,
|
||||
}
|
||||
priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
|
||||
seg_num - 1 == i ? 1 : 0, buf_num,
|
||||
DESC_TYPE_PAGE, ndev->mtu);
|
||||
DESC_TYPE_PAGE, ndev->mtu, is_gso);
|
||||
}
|
||||
|
||||
/*complete translate all packets*/
|
||||
@ -1776,15 +1801,6 @@ static int hns_nic_set_features(struct net_device *netdev,
|
||||
netdev_info(netdev, "enet v1 do not support tso!\n");
|
||||
break;
|
||||
default:
|
||||
if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
|
||||
priv->ops.fill_desc = fill_tso_desc;
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
|
||||
/* The chip only support 7*4096 */
|
||||
netif_set_tso_max_size(netdev, 7 * 4096);
|
||||
} else {
|
||||
priv->ops.fill_desc = fill_v2_desc;
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
|
||||
}
|
||||
break;
|
||||
}
|
||||
netdev->features = features;
|
||||
@ -2159,16 +2175,9 @@ static void hns_nic_set_priv_ops(struct net_device *netdev)
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
|
||||
} else {
|
||||
priv->ops.get_rxd_bnum = get_v2rx_desc_bnum;
|
||||
if ((netdev->features & NETIF_F_TSO) ||
|
||||
(netdev->features & NETIF_F_TSO6)) {
|
||||
priv->ops.fill_desc = fill_tso_desc;
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
|
||||
/* This chip only support 7*4096 */
|
||||
netif_set_tso_max_size(netdev, 7 * 4096);
|
||||
} else {
|
||||
priv->ops.fill_desc = fill_v2_desc;
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
|
||||
}
|
||||
priv->ops.fill_desc = fill_desc_v2;
|
||||
priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx_v2;
|
||||
netif_set_tso_max_size(netdev, 7 * 4096);
|
||||
/* enable tso when init
|
||||
* control tso on/off through TSE bit in bd
|
||||
*/
|
||||
|
||||
@ -44,7 +44,8 @@ struct hns_nic_ring_data {
|
||||
struct hns_nic_ops {
|
||||
void (*fill_desc)(struct hnae_ring *ring, void *priv,
|
||||
int size, dma_addr_t dma, int frag_end,
|
||||
int buf_num, enum hns_desc_type type, int mtu);
|
||||
int buf_num, enum hns_desc_type type, int mtu,
|
||||
bool is_gso);
|
||||
int (*maybe_stop_tx)(struct sk_buff **out_skb,
|
||||
int *bnum, struct hnae_ring *ring);
|
||||
void (*get_rxd_bnum)(u32 bnum_flag, int *out_bnum);
|
||||
|
||||
@ -16158,7 +16158,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
|
||||
if (val < MAX_FRAME_SIZE_DEFAULT)
|
||||
dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
|
||||
i, val);
|
||||
pf->hw.port, val);
|
||||
|
||||
/* Add a filter to drop all Flow control frames from any VSI from being
|
||||
* transmitted. By doing so we stop a malicious VF from sending out
|
||||
|
||||
@ -829,18 +829,10 @@ static int __iavf_set_coalesce(struct net_device *netdev,
|
||||
struct iavf_adapter *adapter = netdev_priv(netdev);
|
||||
int i;
|
||||
|
||||
if (ec->rx_coalesce_usecs == 0) {
|
||||
if (ec->use_adaptive_rx_coalesce)
|
||||
netif_info(adapter, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n");
|
||||
} else if ((ec->rx_coalesce_usecs < IAVF_MIN_ITR) ||
|
||||
(ec->rx_coalesce_usecs > IAVF_MAX_ITR)) {
|
||||
if (ec->rx_coalesce_usecs > IAVF_MAX_ITR) {
|
||||
netif_info(adapter, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
|
||||
return -EINVAL;
|
||||
} else if (ec->tx_coalesce_usecs == 0) {
|
||||
if (ec->use_adaptive_tx_coalesce)
|
||||
netif_info(adapter, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n");
|
||||
} else if ((ec->tx_coalesce_usecs < IAVF_MIN_ITR) ||
|
||||
(ec->tx_coalesce_usecs > IAVF_MAX_ITR)) {
|
||||
} else if (ec->tx_coalesce_usecs > IAVF_MAX_ITR) {
|
||||
netif_info(adapter, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user