arm64: dts: qcom: ipq6018: Fix the PCI I/O port range

[ Upstream commit 75a6e1fdb351189f55097741e8460ca3f9b2883f ]

For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI address
(0x20200000) specified in the ranges property for I/O region.

While at it, let's use the missing 0x prefix for the addresses.

Fixes: 095bbdd9a5 ("arm64: dts: qcom: ipq6018: Add pcie support")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2023-02-28 22:17:42 +05:30 committed by Greg Kroah-Hartman
parent 7803b357d9
commit c8178285ba

View File

@ -436,10 +436,8 @@ pcie0: pci@20000000 {
phys = <&pcie_phy0>;
phy-names = "pciephy";
ranges = <0x81000000 0 0x20200000 0 0x20200000
0 0x10000>, /* downstream I/O */
<0x82000000 0 0x20220000 0 0x20220000
0 0xfde0000>; /* non-prefetchable memory */
ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>,
<0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";