ASoC: rt711-sdca: fix the latency time of clock stop prepare state machine transitions
Due to the hardware behavior, it takes some time for CBJ detection/impedance sensing/de-bounce. The ClockStop_NotFinished flag will be raised until these functions are completed. In ClockStopMode0 mode case, the SdW controller might check this flag from D3 to D0 when the jack detection interrupt happened. Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://lore.kernel.org/r/20221116090318.5017-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
39bd801d69
commit
c7d7d4e7bb
@ -230,7 +230,7 @@ static int rt711_sdca_read_prop(struct sdw_slave *slave)
|
||||
}
|
||||
|
||||
/* set the timeout values */
|
||||
prop->clk_stop_timeout = 20;
|
||||
prop->clk_stop_timeout = 700;
|
||||
|
||||
/* wake-up event */
|
||||
prop->wake_capable = 1;
|
||||
|
Loading…
Reference in New Issue
Block a user