regmap: Support accelerated noinc operations
Several architectures have accelerated operations for MMIO operations writing to a single register, such as writesb, writesw, writesl, writesq, readsb, readsw, readsl and readsq but regmap currently cannot use them because we have no hooks for providing an accelerated noinc back-end for MMIO. Solve this by providing reg_[read/write]_noinc callbacks for the bus abstraction, so that the regmap-mmio bus can use this. Currently I do not see a need to support this for custom regmaps so it is only added to the bus. Callbacks are passed a void * with the array of values and a count which is the number of items of the byte chunk size for the specific register width. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220816204832.265837-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
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77672e0387
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c20cc099b3
@ -2129,6 +2129,99 @@ int regmap_raw_write(struct regmap *map, unsigned int reg,
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}
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EXPORT_SYMBOL_GPL(regmap_raw_write);
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static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
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void *val, unsigned int val_len, bool write)
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{
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size_t val_bytes = map->format.val_bytes;
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size_t val_count = val_len / val_bytes;
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unsigned int lastval;
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u8 *u8p;
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u16 *u16p;
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u32 *u32p;
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#ifdef CONFIG_64BIT
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u64 *u64p;
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#endif
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int ret;
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int i;
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switch (val_bytes) {
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case 1:
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u8p = val;
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if (write)
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lastval = (unsigned int)u8p[val_count - 1];
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break;
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case 2:
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u16p = val;
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if (write)
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lastval = (unsigned int)u16p[val_count - 1];
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break;
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case 4:
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u32p = val;
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if (write)
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lastval = (unsigned int)u32p[val_count - 1];
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break;
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#ifdef CONFIG_64BIT
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case 8:
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u64p = val;
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if (write)
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lastval = (unsigned int)u64p[val_count - 1];
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break;
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#endif
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default:
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return -EINVAL;
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}
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/*
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* Update the cache with the last value we write, the rest is just
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* gone down in the hardware FIFO. We can't cache FIFOs. This makes
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* sure a single read from the cache will work.
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*/
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if (write) {
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if (!map->cache_bypass && !map->defer_caching) {
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ret = regcache_write(map, reg, lastval);
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if (ret != 0)
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return ret;
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if (map->cache_only) {
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map->cache_dirty = true;
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return 0;
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}
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}
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ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
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} else {
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ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
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}
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if (!ret && regmap_should_log(map)) {
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dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
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for (i = 0; i < val_len; i++) {
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switch (val_bytes) {
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case 1:
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pr_cont("%x", u8p[i]);
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break;
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case 2:
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pr_cont("%x", u16p[i]);
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break;
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case 4:
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pr_cont("%x", u32p[i]);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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pr_cont("%llx", u64p[i]);
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break;
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#endif
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default:
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break;
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}
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if (i == (val_len - 1))
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pr_cont("]\n");
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else
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pr_cont(",");
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}
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}
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return 0;
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}
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/**
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* regmap_noinc_write(): Write data from a register without incrementing the
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* register number
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@ -2156,9 +2249,8 @@ int regmap_noinc_write(struct regmap *map, unsigned int reg,
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size_t write_len;
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int ret;
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if (!map->write)
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return -ENOTSUPP;
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if (!map->write && !(map->bus && map->bus->reg_noinc_write))
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return -EINVAL;
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if (val_len % map->format.val_bytes)
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return -EINVAL;
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if (!IS_ALIGNED(reg, map->reg_stride))
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@ -2173,6 +2265,15 @@ int regmap_noinc_write(struct regmap *map, unsigned int reg,
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goto out_unlock;
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}
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/*
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* Use the accelerated operation if we can. The val drops the const
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* typing in order to facilitate code reuse in regmap_noinc_readwrite().
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*/
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if (map->bus->reg_noinc_write) {
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ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
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goto out_unlock;
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}
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while (val_len) {
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if (map->max_raw_write && map->max_raw_write < val_len)
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write_len = map->max_raw_write;
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@ -2943,6 +3044,22 @@ int regmap_noinc_read(struct regmap *map, unsigned int reg,
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goto out_unlock;
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}
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/* Use the accelerated operation if we can */
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if (map->bus->reg_noinc_read) {
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/*
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* We have not defined the FIFO semantics for cache, as the
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* cache is just one value deep. Should we return the last
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* written value? Just avoid this by always reading the FIFO
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* even when using cache. Cache only will not work.
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*/
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if (map->cache_only) {
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ret = -EBUSY;
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goto out_unlock;
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}
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ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
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goto out_unlock;
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}
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while (val_len) {
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if (map->max_raw_read && map->max_raw_read < val_len)
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read_len = map->max_raw_read;
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@ -492,8 +492,12 @@ typedef int (*regmap_hw_read)(void *context,
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void *val_buf, size_t val_size);
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typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
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unsigned int *val);
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typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
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void *val, size_t val_count);
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typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
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unsigned int val);
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typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
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const void *val, size_t val_count);
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typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
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unsigned int mask, unsigned int val);
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typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
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@ -514,6 +518,8 @@ typedef void (*regmap_hw_free_context)(void *context);
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* must serialise with respect to non-async I/O.
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* @reg_write: Write a single register value to the given register address. This
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* write operation has to complete when returning from the function.
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* @reg_write_noinc: Write multiple register value to the same register. This
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* write operation has to complete when returning from the function.
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* @reg_update_bits: Update bits operation to be used against volatile
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* registers, intended for devices supporting some mechanism
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* for setting clearing bits without having to
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@ -541,9 +547,11 @@ struct regmap_bus {
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regmap_hw_gather_write gather_write;
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regmap_hw_async_write async_write;
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regmap_hw_reg_write reg_write;
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regmap_hw_reg_noinc_write reg_noinc_write;
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regmap_hw_reg_update_bits reg_update_bits;
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regmap_hw_read read;
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regmap_hw_reg_read reg_read;
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regmap_hw_reg_noinc_read reg_noinc_read;
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regmap_hw_free_context free_context;
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regmap_hw_async_alloc async_alloc;
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u8 read_flag_mask;
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