arm64: defconfig: Enable clock controllers and gdsc-regulator for BLAIR

Enable GCC, DISPCC, GPUCC, CLK_SMD_RPM, DEBUGCC and gdsc-regulator for
BLAIR platform.

Change-Id: I6629dd4dd515df890df1a27db1dcb5c3435452ee
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
This commit is contained in:
Kalpak Kawadkar 2023-04-15 21:33:17 +05:30 committed by Gerrit - the friendly Code Review server
parent 4754a57169
commit aff3da5b05
2 changed files with 12 additions and 0 deletions

View File

@ -53,6 +53,7 @@ CONFIG_POWER_RESET_QCOM_DOWNLOAD_MODE_DEFAULT=y
CONFIG_PWM_QTI_LPG=m
CONFIG_QCOM_CDSP_RM=m
CONFIG_QCOM_CLK_RPMH=m
CONFIG_QCOM_CLK_SMD_RPM=m
CONFIG_QCOM_COMMAND_DB=m
CONFIG_QCOM_CPU_VENDOR_HOOKS=m
CONFIG_QCOM_DCC_V2=m
@ -68,6 +69,7 @@ CONFIG_QCOM_DMABUF_HEAPS_SYSTEM_UNCACHED=y
# CONFIG_QCOM_DMABUF_HEAPS_UBWCP is not set
CONFIG_QCOM_EUD=m
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_GDSC_REGULATOR=m
CONFIG_QCOM_GLINK=m
CONFIG_QCOM_GLINK_PKT=m
CONFIG_QCOM_IOMMU_DEBUG=m
@ -125,6 +127,10 @@ CONFIG_SCSI_UFS_QCOM=m
CONFIG_SLIMBUS=m
# CONFIG_SLIM_QCOM_CTRL is not set
# CONFIG_SLIM_QCOM_NGD_CTRL is not set
CONFIG_SM_DEBUGCC_BLAIR=m
CONFIG_SM_DISPCC_BLAIR=m
CONFIG_SM_GCC_BLAIR=m
CONFIG_SM_GPUCC_BLAIR=m
# CONFIG_SND_SOC_WCD9335 is not set
CONFIG_SPI_MSM_GENI=m
CONFIG_SPI_SPIDEV=m

View File

@ -11,7 +11,13 @@ def define_blair():
"drivers/clk/qcom/clk-dummy.ko",
"drivers/clk/qcom/clk-qcom.ko",
"drivers/clk/qcom/clk-rpmh.ko",
"drivers/clk/qcom/clk-smd-rpm.ko",
"drivers/clk/qcom/clk-spmi-pmic-div.ko",
"drivers/clk/qcom/debugcc-blair.ko",
"drivers/clk/qcom/dispcc-blair.ko",
"drivers/clk/qcom/gcc-blair.ko",
"drivers/clk/qcom/gdsc-regulator.ko",
"drivers/clk/qcom/gpucc-blair.ko",
"drivers/cpufreq/qcom-cpufreq-hw.ko",
"drivers/cpufreq/qcom-cpufreq-hw-debug.ko",
"drivers/dma-buf/heaps/qcom_dma_heaps.ko",