x86/irq: Remove x86_io_apic_ops.set_affinity and related interfaces
Now there is no user of x86_io_apic_ops.set_affinity anymore, so remove it. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Tested-by: Joerg Roedel <jroedel@suse.de> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: iommu@lists.linux-foundation.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1428978610-28986-6-git-send-email-jiang.liu@linux.intel.com
This commit is contained in:
parent
35d50d8fd5
commit
aa5cb97f14
@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
|
|||||||
extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
|
extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
|
||||||
extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
|
extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
|
||||||
extern void native_disable_io_apic(void);
|
extern void native_disable_io_apic(void);
|
||||||
extern int native_ioapic_set_affinity(struct irq_data *,
|
|
||||||
const struct cpumask *,
|
|
||||||
bool);
|
|
||||||
|
|
||||||
static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
|
static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
|
||||||
{
|
{
|
||||||
@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }
|
|||||||
#define native_io_apic_write NULL
|
#define native_io_apic_write NULL
|
||||||
#define native_io_apic_modify NULL
|
#define native_io_apic_modify NULL
|
||||||
#define native_disable_io_apic NULL
|
#define native_disable_io_apic NULL
|
||||||
#define native_ioapic_set_affinity NULL
|
|
||||||
#define native_eoi_ioapic_pin NULL
|
#define native_eoi_ioapic_pin NULL
|
||||||
|
|
||||||
static inline void setup_IO_APIC(void) { }
|
static inline void setup_IO_APIC(void) { }
|
||||||
|
@ -191,9 +191,6 @@ struct x86_io_apic_ops {
|
|||||||
void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
|
void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
|
||||||
void (*modify) (unsigned int apic, unsigned int reg, unsigned int value);
|
void (*modify) (unsigned int apic, unsigned int reg, unsigned int value);
|
||||||
void (*disable)(void);
|
void (*disable)(void);
|
||||||
int (*set_affinity)(struct irq_data *data,
|
|
||||||
const struct cpumask *mask,
|
|
||||||
bool force);
|
|
||||||
void (*eoi_ioapic_pin)(int apic, int pin, int vector);
|
void (*eoi_ioapic_pin)(int apic, int pin, int vector);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -1787,29 +1787,6 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int native_ioapic_set_affinity(struct irq_data *data,
|
|
||||||
const struct cpumask *mask,
|
|
||||||
bool force)
|
|
||||||
{
|
|
||||||
unsigned int dest, irq = data->irq;
|
|
||||||
unsigned long flags;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (!config_enabled(CONFIG_SMP))
|
|
||||||
return -EPERM;
|
|
||||||
|
|
||||||
raw_spin_lock_irqsave(&ioapic_lock, flags);
|
|
||||||
ret = apic_set_affinity(data, mask, &dest);
|
|
||||||
if (!ret) {
|
|
||||||
/* Only the high 8 bits are valid. */
|
|
||||||
dest = SET_APIC_LOGICAL_ID(dest);
|
|
||||||
__target_IO_APIC_irq(irq, dest, irqd_cfg(data));
|
|
||||||
ret = IRQ_SET_MASK_OK_NOCOPY;
|
|
||||||
}
|
|
||||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
atomic_t irq_mis_count;
|
atomic_t irq_mis_count;
|
||||||
|
|
||||||
#ifdef CONFIG_GENERIC_PENDING_IRQ
|
#ifdef CONFIG_GENERIC_PENDING_IRQ
|
||||||
@ -2686,7 +2663,7 @@ void __init setup_ioapic_dest(void)
|
|||||||
else
|
else
|
||||||
mask = apic->target_cpus();
|
mask = apic->target_cpus();
|
||||||
|
|
||||||
x86_io_apic_ops.set_affinity(idata, mask, false);
|
irq_set_affinity(irq, mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = {
|
|||||||
.write = native_io_apic_write,
|
.write = native_io_apic_write,
|
||||||
.modify = native_io_apic_modify,
|
.modify = native_io_apic_modify,
|
||||||
.disable = native_disable_io_apic,
|
.disable = native_disable_io_apic,
|
||||||
.set_affinity = native_ioapic_set_affinity,
|
|
||||||
.eoi_ioapic_pin = native_eoi_ioapic_pin,
|
.eoi_ioapic_pin = native_eoi_ioapic_pin,
|
||||||
};
|
};
|
||||||
|
@ -25,10 +25,6 @@ int no_x2apic_optout;
|
|||||||
static int disable_irq_remap;
|
static int disable_irq_remap;
|
||||||
static struct irq_remap_ops *remap_ops;
|
static struct irq_remap_ops *remap_ops;
|
||||||
|
|
||||||
static int set_remapped_irq_affinity(struct irq_data *data,
|
|
||||||
const struct cpumask *mask,
|
|
||||||
bool force);
|
|
||||||
|
|
||||||
static bool irq_remapped(struct irq_cfg *cfg)
|
static bool irq_remapped(struct irq_cfg *cfg)
|
||||||
{
|
{
|
||||||
return (cfg->remapped == 1);
|
return (cfg->remapped == 1);
|
||||||
@ -61,7 +57,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
|
|||||||
static void __init irq_remapping_modify_x86_ops(void)
|
static void __init irq_remapping_modify_x86_ops(void)
|
||||||
{
|
{
|
||||||
x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
|
x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
|
||||||
x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
|
|
||||||
x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
|
x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -157,15 +152,6 @@ int __init irq_remap_enable_fault_handling(void)
|
|||||||
return remap_ops->enable_faulting();
|
return remap_ops->enable_faulting();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int set_remapped_irq_affinity(struct irq_data *data,
|
|
||||||
const struct cpumask *mask, bool force)
|
|
||||||
{
|
|
||||||
if (!config_enabled(CONFIG_SMP) || !remap_ops->set_affinity)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
return remap_ops->set_affinity(data, mask, force);
|
|
||||||
}
|
|
||||||
|
|
||||||
void free_remapped_irq(int irq)
|
void free_remapped_irq(int irq)
|
||||||
{
|
{
|
||||||
struct irq_cfg *cfg = irq_cfg(irq);
|
struct irq_cfg *cfg = irq_cfg(irq);
|
||||||
@ -201,7 +187,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip)
|
|||||||
chip->irq_print_chip = ir_print_prefix;
|
chip->irq_print_chip = ir_print_prefix;
|
||||||
chip->irq_ack = ir_ack_apic_edge;
|
chip->irq_ack = ir_ack_apic_edge;
|
||||||
chip->irq_eoi = ir_ack_apic_level;
|
chip->irq_eoi = ir_ack_apic_level;
|
||||||
chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
|
bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
|
||||||
|
Loading…
Reference in New Issue
Block a user