mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450
[ Upstream commit 5ae4b0d8875caa44946e579420c7fd5740d58653 ] Errata ERR010450 only shows up if voltage is 1.8V, but if the device is supplied by 3v3 the errata can be ignored. So let's check for if quirk SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency. Cc: Jim Reinhart <jimr@tekvox.com> Cc: James Autry <jautry@tekvox.com> Cc: Matthew Maron <matthewm@tekvox.com> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Acked-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230811214853.8623-1-giulio.benetti@benettiengineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -171,8 +171,8 @@
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#define ESDHC_FLAG_HS400 BIT(9)
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/*
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* The IP has errata ERR010450
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* uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
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* exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
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* uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
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* clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
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*/
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#define ESDHC_FLAG_ERR010450 BIT(10)
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/* The IP supports HS400ES mode */
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@ -932,7 +932,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
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| ESDHC_CLOCK_MASK);
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sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
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if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
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if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
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(!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
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unsigned int max_clock;
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max_clock = imx_data->is_ddr ? 45000000 : 150000000;
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