drm/i915: Use DPCD value for max DP lanes.
The BIOS VBT value for an eDP panel has been shown to be incorrect on one machine, and we haven't found any machines where the DPCD value was wrong, so we'll use the DPCD value everywhere. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -154,16 +154,12 @@ intel_edp_link_config(struct intel_encoder *intel_encoder,
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static int
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intel_dp_max_lane_count(struct intel_dp *intel_dp)
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{
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int max_lane_count = 4;
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if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {
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max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f;
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switch (max_lane_count) {
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case 1: case 2: case 4:
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break;
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default:
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max_lane_count = 4;
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}
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int max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f;
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switch (max_lane_count) {
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case 1: case 2: case 4:
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break;
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default:
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max_lane_count = 4;
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}
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return max_lane_count;
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}
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@ -765,12 +761,11 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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continue;
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intel_dp = enc_to_intel_dp(encoder);
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if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT || is_pch_edp(intel_dp)) {
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if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT ||
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intel_dp->base.type == INTEL_OUTPUT_EDP)
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{
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lane_count = intel_dp->lane_count;
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break;
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} else if (is_cpu_edp(intel_dp)) {
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lane_count = dev_priv->edp.lanes;
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break;
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}
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}
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