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Mediatek DRM Next for Linux 5.19

Browse Source 
1. Add display support for MT8186
 2. Miscellaneous refinement and fixup.
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Merge tag 'mediatek-drm-next-5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

Mediatek DRM Next for Linux 5.19

1. Add display support for MT8186
2. Miscellaneous refinement and fixup.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1651702965-23630-1-git-send-email-chunkuang.hu@kernel.org
This commit is contained in:
Dave Airlie 2022-05-06 17:25:54 +10:00
commit 98bcaafd7f
24 changed files with 194 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
View File

@ -21,16 +21,19 @@ description: |
properties:
compatible:
oneOf:
- items:
- const: mediatek,mt8173-disp-aal
- enum:
- mediatek,mt8173-disp-aal
- mediatek,mt8183-disp-aal
- items:
- enum:
- mediatek,mt2712-disp-aal
- mediatek,mt8183-disp-aal
- const: mediatek,mt8173-disp-aal
- items:
- enum:
- mediatek,mt8186-disp-aal
- mediatek,mt8192-disp-aal
- mediatek,mt8195-disp-aal
- enum:
- mediatek,mt8173-disp-aal
- const: mediatek,mt8183-disp-aal
reg:
maxItems: 1

5
Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
View File

@ -28,8 +28,11 @@ properties:
- items:
- enum:
- mediatek,mt8195-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
- items:
- enum:
- mediatek,mt8192-disp-ccorr
- mediatek,mt8186-disp-ccorr
- const: mediatek,mt8183-disp-ccorr
reg:
maxItems: 1

7
Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
View File

@ -32,15 +32,14 @@ properties:
- enum:
- mediatek,mt7623-disp-color
- mediatek,mt2712-disp-color
- enum:
- mediatek,mt2701-disp-color
- const: mediatek,mt2701-disp-color
- items:
- enum:
- mediatek,mt8183-disp-color
- mediatek,mt8186-disp-color
- mediatek,mt8192-disp-color
- mediatek,mt8195-disp-color
- enum:
- mediatek,mt8173-disp-color
- const: mediatek,mt8173-disp-color
reg:
maxItems: 1

4
Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
View File

@ -26,10 +26,10 @@ properties:
- const: mediatek,mt8183-disp-dither
- items:
- enum:
- mediatek,mt8186-disp-dither
- mediatek,mt8192-disp-dither
- mediatek,mt8195-disp-dither
- enum:
- mediatek,mt8183-disp-dither
- const: mediatek,mt8183-disp-dither
reg:
maxItems: 1

1
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
View File

@ -22,6 +22,7 @@ properties:
- mediatek,mt7623-dpi
- mediatek,mt8173-dpi
- mediatek,mt8183-dpi
- mediatek,mt8186-dpi
- mediatek,mt8192-dpi
reg:

4
Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
View File

@ -27,10 +27,10 @@ properties:
- const: mediatek,mt8183-disp-gamma
- items:
- enum:
- mediatek,mt8186-disp-gamma
- mediatek,mt8192-disp-gamma
- mediatek,mt8195-disp-gamma
- enum:
- mediatek,mt8183-disp-gamma
- const: mediatek,mt8183-disp-gamma
reg:
maxItems: 1

25
Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
View File

@ -23,21 +23,16 @@ description: |
properties:
compatible:
oneOf:
- items:
- const: mediatek,mt2701-disp-mutex
- items:
- const: mediatek,mt2712-disp-mutex
- items:
- const: mediatek,mt8167-disp-mutex
- items:
- const: mediatek,mt8173-disp-mutex
- items:
- const: mediatek,mt8183-disp-mutex
- items:
- const: mediatek,mt8192-disp-mutex
- items:
- const: mediatek,mt8195-disp-mutex
enum:
- mediatek,mt2701-disp-mutex
- mediatek,mt2712-disp-mutex
- mediatek,mt8167-disp-mutex
- mediatek,mt8173-disp-mutex
- mediatek,mt8183-disp-mutex
- mediatek,mt8186-disp-mutex
- mediatek,mt8192-disp-mutex
- mediatek,mt8195-disp-mutex
reg:
maxItems: 1

4
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml
View File

@ -25,6 +25,10 @@ properties:
- const: mediatek,mt8183-disp-ovl-2l
- items:
- const: mediatek,mt8192-disp-ovl-2l
- items:
- enum:
- mediatek,mt8186-disp-ovl-2l
- const: mediatek,mt8192-disp-ovl-2l
reg:
maxItems: 1

8
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
View File

@ -33,13 +33,15 @@ properties:
- enum:
- mediatek,mt7623-disp-ovl
- mediatek,mt2712-disp-ovl
- enum:
- mediatek,mt2701-disp-ovl
- const: mediatek,mt2701-disp-ovl
- items:
- enum:
- mediatek,mt8195-disp-ovl
- const: mediatek,mt8183-disp-ovl
- items:
- enum:
- mediatek,mt8183-disp-ovl
- mediatek,mt8186-disp-ovl
- const: mediatek,mt8192-disp-ovl
reg:
maxItems: 1

4
Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml
View File

@ -23,6 +23,10 @@ properties:
oneOf:
- items:
- const: mediatek,mt8192-disp-postmask
- items:
- enum:
- mediatek,mt8186-disp-postmask
- const: mediatek,mt8192-disp-postmask
reg:
maxItems: 1

7
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
View File

@ -35,13 +35,12 @@ properties:
- enum:
- mediatek,mt7623-disp-rdma
- mediatek,mt2712-disp-rdma
- enum:
- mediatek,mt2701-disp-rdma
- const: mediatek,mt2701-disp-rdma
- items:
- enum:
- mediatek,mt8186-disp-rdma
- mediatek,mt8192-disp-rdma
- enum:
- mediatek,mt8183-disp-rdma
- const: mediatek,mt8183-disp-rdma
reg:
maxItems: 1

2
drivers/gpu/drm/mediatek/mtk_cec.c
View File

@ -85,7 +85,7 @@ static void mtk_cec_mask(struct mtk_cec *cec, unsigned int offset,
u32 tmp = readl(cec->regs + offset) & ~mask;
tmp |= val & mask;
writel(val, cec->regs + offset);
writel(tmp, cec->regs + offset);
}
void mtk_cec_set_hpd_event(struct device *dev,

2
drivers/gpu/drm/mediatek/mtk_disp_aal.c
View File

@ -66,7 +66,7 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
struct mtk_disp_aal *aal = dev_get_drvdata(dev);
if (aal->data && aal->data->has_gamma)
mtk_gamma_set_common(aal->regs, state);
mtk_gamma_set_common(aal->regs, state, false);
}
void mtk_aal_start(struct device *dev)

18
drivers/gpu/drm/mediatek/mtk_disp_drv.h
View File

@ -51,7 +51,7 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
@ -76,9 +76,11 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
void mtk_ovl_start(struct device *dev);
void mtk_ovl_stop(struct device *dev);
unsigned int mtk_ovl_supported_rotations(struct device *dev);
void mtk_ovl_enable_vblank(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void mtk_ovl_register_vblank_cb(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void mtk_ovl_unregister_vblank_cb(struct device *dev);
void mtk_ovl_enable_vblank(struct device *dev);
void mtk_ovl_disable_vblank(struct device *dev);
void mtk_rdma_bypass_shadow(struct device *dev);
@ -93,9 +95,11 @@ void mtk_rdma_layer_config(struct device *dev, unsigned int idx,
struct cmdq_pkt *cmdq_pkt);
void mtk_rdma_start(struct device *dev);
void mtk_rdma_stop(struct device *dev);
void mtk_rdma_enable_vblank(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void mtk_rdma_register_vblank_cb(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void mtk_rdma_unregister_vblank_cb(struct device *dev);
void mtk_rdma_enable_vblank(struct device *dev);
void mtk_rdma_disable_vblank(struct device *dev);
#endif

34
drivers/gpu/drm/mediatek/mtk_disp_gamma.c
View File

@ -27,6 +27,7 @@
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
};
/*
@ -53,12 +54,13 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff)
{
unsigned int i, reg;
struct drm_color_lut *lut;
void __iomem *lut_base;
u32 word;
u32 diff[3] = {0};
if (state->gamma_lut) {
reg = readl(regs + DISP_GAMMA_CFG);
@ -67,9 +69,20 @@ void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < MTK_LUT_SIZE; i++) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
((lut[i].blue >> 6) & LUT_10BIT_MASK);
if (!lut_diff || (i % 2 == 0)) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
((lut[i].blue >> 6) & LUT_10BIT_MASK);
} else {
diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
word = ((diff[0] & LUT_10BIT_MASK) << 20) +
((diff[1] & LUT_10BIT_MASK) << 10) +
(diff[2] & LUT_10BIT_MASK);
}
writel(word, (lut_base + i * 4));
}
}
@ -78,8 +91,12 @@ void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
bool lut_diff = false;
mtk_gamma_set_common(gamma->regs, state);
if (gamma->data)
lut_diff = gamma->data->lut_diff;
mtk_gamma_set_common(gamma->regs, state, lut_diff);
}
void mtk_gamma_config(struct device *dev, unsigned int w,
@ -176,10 +193,15 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_diff = true,
};
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
{ .compatible = "mediatek,mt8173-disp-gamma",
.data = &mt8173_gamma_driver_data},
{ .compatible = "mediatek,mt8183-disp-gamma"},
{ .compatible = "mediatek,mt8183-disp-gamma",
.data = &mt8183_gamma_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);

22
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
View File

@ -97,14 +97,28 @@ static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
void mtk_ovl_enable_vblank(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data)
void mtk_ovl_register_vblank_cb(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data)
{
struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
ovl->vblank_cb = vblank_cb;
ovl->vblank_cb_data = vblank_cb_data;
}
void mtk_ovl_unregister_vblank_cb(struct device *dev)
{
struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
ovl->vblank_cb = NULL;
ovl->vblank_cb_data = NULL;
}
void mtk_ovl_enable_vblank(struct device *dev)
{
struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA);
writel_relaxed(OVL_FME_CPL_INT, ovl->regs + DISP_REG_OVL_INTEN);
}
@ -113,8 +127,6 @@ void mtk_ovl_disable_vblank(struct device *dev)
{
struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
ovl->vblank_cb = NULL;
ovl->vblank_cb_data = NULL;
writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
}

22
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
View File

@ -95,24 +95,32 @@ static void rdma_update_bits(struct device *dev, unsigned int reg,
writel(tmp, rdma->regs + reg);
}
void mtk_rdma_enable_vblank(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data)
void mtk_rdma_register_vblank_cb(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data)
{
struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
rdma->vblank_cb = vblank_cb;
rdma->vblank_cb_data = vblank_cb_data;
}
void mtk_rdma_unregister_vblank_cb(struct device *dev)
{
struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
rdma->vblank_cb = NULL;
rdma->vblank_cb_data = NULL;
}
void mtk_rdma_enable_vblank(struct device *dev)
{
rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,
RDMA_FRAME_END_INT);
}
void mtk_rdma_disable_vblank(struct device *dev)
{
struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
rdma->vblank_cb = NULL;
rdma->vblank_cb_data = NULL;
rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);
}

4
drivers/gpu/drm/mediatek/mtk_dpi.c
View File

@ -819,8 +819,8 @@ static const struct mtk_dpi_conf mt8192_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 150000,
.output_fmts = mt8173_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
.output_fmts = mt8183_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
};
static int mtk_dpi_probe(struct platform_device *pdev)

17
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
View File

@ -152,6 +152,7 @@ static void mtk_drm_cmdq_pkt_destroy(struct cmdq_pkt *pkt)
static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)
{
struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
int i;
mtk_mutex_put(mtk_crtc->mutex);
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
@ -162,6 +163,14 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)
mtk_crtc->cmdq_client.chan = NULL;
}
#endif
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
struct mtk_ddp_comp *comp;
comp = mtk_crtc->ddp_comp[i];
mtk_ddp_comp_unregister_vblank_cb(comp);
}
drm_crtc_cleanup(crtc);
}
@ -184,7 +193,7 @@ static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc
{
struct mtk_crtc_state *state;
state = kzalloc(sizeof(*state), GFP_KERNEL);
state = kmalloc(sizeof(*state), GFP_KERNEL);
if (!state)
return NULL;
@ -192,6 +201,7 @@ static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc
WARN_ON(state->base.crtc != crtc);
state->base.crtc = crtc;
state->pending_config = false;
return &state->base;
}
@ -617,7 +627,7 @@ static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)
struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
mtk_ddp_comp_enable_vblank(comp, mtk_crtc_ddp_irq, &mtk_crtc->base);
mtk_ddp_comp_enable_vblank(comp);
return 0;
}
@ -926,6 +936,9 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
if (comp->funcs->ctm_set)
has_ctm = true;
}
mtk_ddp_comp_register_vblank_cb(comp, mtk_crtc_ddp_irq,
&mtk_crtc->base);
}
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)

4
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
View File

@ -297,6 +297,8 @@ static const struct mtk_ddp_comp_funcs ddp_ovl = {
.config = mtk_ovl_config,
.start = mtk_ovl_start,
.stop = mtk_ovl_stop,
.register_vblank_cb = mtk_ovl_register_vblank_cb,
.unregister_vblank_cb = mtk_ovl_unregister_vblank_cb,
.enable_vblank = mtk_ovl_enable_vblank,
.disable_vblank = mtk_ovl_disable_vblank,
.supported_rotations = mtk_ovl_supported_rotations,
@ -321,6 +323,8 @@ static const struct mtk_ddp_comp_funcs ddp_rdma = {
.config = mtk_rdma_config,
.start = mtk_rdma_start,
.stop = mtk_rdma_stop,
.register_vblank_cb = mtk_rdma_register_vblank_cb,
.unregister_vblank_cb = mtk_rdma_unregister_vblank_cb,
.enable_vblank = mtk_rdma_enable_vblank,
.disable_vblank = mtk_rdma_disable_vblank,
.layer_nr = mtk_rdma_layer_nr,

29
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
View File

@ -48,9 +48,11 @@ struct mtk_ddp_comp_funcs {
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void (*start)(struct device *dev);
void (*stop)(struct device *dev);
void (*enable_vblank)(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void (*register_vblank_cb)(struct device *dev,
void (*vblank_cb)(void *),
void *vblank_cb_data);
void (*unregister_vblank_cb)(struct device *dev);
void (*enable_vblank)(struct device *dev);
void (*disable_vblank)(struct device *dev);
unsigned int (*supported_rotations)(struct device *dev);
unsigned int (*layer_nr)(struct device *dev);
@ -110,12 +112,25 @@ static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp)
comp->funcs->stop(comp->dev);
}
static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp,
void (*vblank_cb)(void *),
void *vblank_cb_data)
static inline void mtk_ddp_comp_register_vblank_cb(struct mtk_ddp_comp *comp,
void (*vblank_cb)(void *),
void *vblank_cb_data)
{
if (comp->funcs && comp->funcs->register_vblank_cb)
comp->funcs->register_vblank_cb(comp->dev, vblank_cb,
vblank_cb_data);
}
static inline void mtk_ddp_comp_unregister_vblank_cb(struct mtk_ddp_comp *comp)
{
if (comp->funcs && comp->funcs->unregister_vblank_cb)
comp->funcs->unregister_vblank_cb(comp->dev);
}
static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp)
{
if (comp->funcs && comp->funcs->enable_vblank)
comp->funcs->enable_vblank(comp->dev, vblank_cb, vblank_cb_data);
comp->funcs->enable_vblank(comp->dev);
}
static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp)

31
drivers/gpu/drm/mediatek/mtk_drm_drv.c
View File

@ -158,6 +158,24 @@ static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
DDP_COMPONENT_DPI0,
};
static const enum mtk_ddp_comp_id mt8186_mtk_ddp_main[] = {
DDP_COMPONENT_OVL0,
DDP_COMPONENT_RDMA0,
DDP_COMPONENT_COLOR0,
DDP_COMPONENT_CCORR,
DDP_COMPONENT_AAL0,
DDP_COMPONENT_GAMMA,
DDP_COMPONENT_POSTMASK0,
DDP_COMPONENT_DITHER,
DDP_COMPONENT_DSI0,
};
static const enum mtk_ddp_comp_id mt8186_mtk_ddp_ext[] = {
DDP_COMPONENT_OVL_2L0,
DDP_COMPONENT_RDMA1,
DDP_COMPONENT_DPI0,
};
static const enum mtk_ddp_comp_id mt8192_mtk_ddp_main[] = {
DDP_COMPONENT_OVL0,
DDP_COMPONENT_OVL_2L0,
@ -221,6 +239,13 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
};
static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
.main_path = mt8186_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt8186_mtk_ddp_main),
.ext_path = mt8186_mtk_ddp_ext,
.ext_len = ARRAY_SIZE(mt8186_mtk_ddp_ext),
};
static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
.main_path = mt8192_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt8192_mtk_ddp_main),
@ -461,6 +486,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8183-disp-mutex",
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8186-disp-mutex",
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8192-disp-mutex",
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8173-disp-od",
@ -509,6 +536,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8183-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8192-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt2701-dsi",
.data = (void *)MTK_DSI },
{ .compatible = "mediatek,mt8173-dsi",
@ -531,6 +560,8 @@ static const struct of_device_id mtk_drm_of_ids[] = {
.data = &mt8173_mmsys_driver_data},
{ .compatible = "mediatek,mt8183-mmsys",
.data = &mt8183_mmsys_driver_data},
{ .compatible = "mediatek,mt8186-mmsys",
.data = &mt8186_mmsys_driver_data},
{ .compatible = "mediatek,mt8192-mmsys",
.data = &mt8192_mmsys_driver_data},
{ }

2
drivers/gpu/drm/mediatek/mtk_drm_plane.c
View File

@ -57,7 +57,7 @@ static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane
struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state);
struct mtk_plane_state *state;
state = kzalloc(sizeof(*state), GFP_KERNEL);
state = kmalloc(sizeof(*state), GFP_KERNEL);
if (!state)
return NULL;

1
drivers/gpu/drm/mediatek/mtk_dsi.c
View File

@ -1116,7 +1116,6 @@ static int mtk_dsi_probe(struct platform_device *pdev)
irq_num = platform_get_irq(pdev, 0);
if (irq_num < 0) {
dev_err(&pdev->dev, "failed to get dsi irq_num: %d\n", irq_num);
ret = irq_num;
goto err_unregister_host;
}