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parisc: optimize mtsp(0,sr) inline assembly

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If the value which should be moved into a space register is zero, we can
optimize the inline assembly to become "mtsp %r0,%srX".

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # 3.10
This commit is contained in:
Helge Deller 2013-06-29 22:08:03 +02:00
parent 594174d810
commit 92b5992982
1 changed files with 6 additions and 3 deletions
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9
arch/parisc/include/asm/special_insns.h
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@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val)
cr; \
})
#define mtsp(gr, cr) \
__asm__ __volatile__("mtsp %0,%1" \
#define mtsp(val, cr) \
{ if (__builtin_constant_p(val) && ((val) == 0)) \
__asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
else \
__asm__ __volatile__("mtsp %0,%1" \
: /* no outputs */ \
: "r" (gr), "i" (cr) : "memory")
: "r" (val), "i" (cr) : "memory"); }
#endif /* __PARISC_SPECIAL_INSNS_H */