PCI/ASPM: Return 0 or -ETIMEDOUT from pcie_retrain_link()
[ Upstream commit f5297a01ee805d7fa569d288ed65fc0f9ac9b03d ] "pcie_retrain_link" is not a question with a true/false answer, so "bool" isn't quite the right return type. Return 0 for success or -ETIMEDOUT if the retrain failed. No functional change intended. [bhelgaas: based on Ilpo's patch below] Link: https://lore.kernel.org/r/20230502083923.34562-1-ilpo.jarvinen@linux.intel.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Stable-dep-of: e7e39756363a ("PCI/ASPM: Avoid link retraining race") Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -193,7 +193,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
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link->clkpm_disable = blacklist ? 1 : 0;
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link->clkpm_disable = blacklist ? 1 : 0;
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}
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}
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static bool pcie_retrain_link(struct pcie_link_state *link)
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static int pcie_retrain_link(struct pcie_link_state *link)
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{
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{
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struct pci_dev *parent = link->pdev;
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struct pci_dev *parent = link->pdev;
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unsigned long end_jiffies;
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unsigned long end_jiffies;
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@ -220,7 +220,9 @@ static bool pcie_retrain_link(struct pcie_link_state *link)
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break;
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break;
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msleep(1);
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msleep(1);
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} while (time_before(jiffies, end_jiffies));
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} while (time_before(jiffies, end_jiffies));
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return !(reg16 & PCI_EXP_LNKSTA_LT);
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if (reg16 & PCI_EXP_LNKSTA_LT)
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return -ETIMEDOUT;
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return 0;
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}
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}
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/*
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/*
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@ -289,15 +291,15 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
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reg16 &= ~PCI_EXP_LNKCTL_CCC;
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reg16 &= ~PCI_EXP_LNKCTL_CCC;
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pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
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pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
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if (pcie_retrain_link(link))
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if (pcie_retrain_link(link)) {
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return;
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/* Training failed. Restore common clock configurations */
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/* Training failed. Restore common clock configurations */
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pci_err(parent, "ASPM: Could not configure common clock\n");
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pci_err(parent, "ASPM: Could not configure common clock\n");
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list_for_each_entry(child, &linkbus->devices, bus_list)
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list_for_each_entry(child, &linkbus->devices, bus_list)
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pcie_capability_write_word(child, PCI_EXP_LNKCTL,
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pcie_capability_write_word(child, PCI_EXP_LNKCTL,
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child_reg[PCI_FUNC(child->devfn)]);
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child_reg[PCI_FUNC(child->devfn)]);
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pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
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pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
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}
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}
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}
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/* Convert L0s latency encoding to ns */
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/* Convert L0s latency encoding to ns */
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