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PCI: qcom: Use lower case for hex

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[ Upstream commit 94ebd232dbc84dfdfbf0c406137a8b2aa8b37a01 ]

To maintain uniformity, let's use lower case for representing hexadecimal
numbers.

Link: https://lore.kernel.org/r/20230316081117.14288-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Stable-dep-of: 60f0072d7fb7 ("PCI: qcom: Use DWC helpers for modifying the read-only DBI registers")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2023-03-16 13:41:04 +05:30 committed by Greg Kroah-Hartman
parent a350f10777
commit 8640e941fd
1 changed files with 7 additions and 7 deletions
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14
drivers/pci/controller/dwc/pcie-qcom.c
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@ -37,17 +37,17 @@
#define PARF_PCS_DEEMPH 0x34
#define PARF_PCS_SWING 0x38
#define PARF_PHY_CTRL 0x40
#define PARF_PHY_REFCLK 0x4C
#define PARF_PHY_REFCLK 0x4c
#define PARF_CONFIG_BITS 0x50
#define PARF_DBI_BASE_ADDR 0x168
#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16C /* Register offset specific to IP ver 2.3.3 */
#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
#define PARF_MHI_CLOCK_RESET_CTRL 0x174
#define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1A8
#define PARF_Q2A_FLUSH 0x1AC
#define PARF_LTSSM 0x1B0
#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
#define PARF_Q2A_FLUSH 0x1ac
#define PARF_LTSSM 0x1b0
#define PARF_SID_OFFSET 0x234
#define PARF_BDF_TRANSLATE_CFG 0x24C
#define PARF_BDF_TRANSLATE_CFG 0x24c
#define PARF_SLV_ADDR_SPACE_SIZE 0x358
#define PARF_DEVICE_TYPE 0x1000
#define PARF_BDF_TO_SID_TABLE_N 0x2000
@ -58,7 +58,7 @@
/* DBI registers */
#define AXI_MSTR_RESP_COMP_CTRL0 0x818
#define AXI_MSTR_RESP_COMP_CTRL1 0x81c
#define MISC_CONTROL_1_REG 0x8BC
#define MISC_CONTROL_1_REG 0x8bc
/* PARF_SYS_CTRL register fields */
#define MST_WAKEUP_EN BIT(13)