ASoC: Convert WM9081 to direct regmap API usage
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Mark Brown
parent
bd132ec585
commit
7cfa467b74
@ -19,6 +19,7 @@
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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@ -30,69 +31,61 @@
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#include <sound/wm9081.h>
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#include "wm9081.h"
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static u16 wm9081_reg_defaults[] = {
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0x0000, /* R0 - Software Reset */
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0x0000, /* R1 */
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0x00B9, /* R2 - Analogue Lineout */
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0x00B9, /* R3 - Analogue Speaker PGA */
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0x0001, /* R4 - VMID Control */
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0x0068, /* R5 - Bias Control 1 */
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0x0000, /* R6 */
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0x0000, /* R7 - Analogue Mixer */
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0x0000, /* R8 - Anti Pop Control */
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0x01DB, /* R9 - Analogue Speaker 1 */
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0x0018, /* R10 - Analogue Speaker 2 */
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0x0180, /* R11 - Power Management */
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0x0000, /* R12 - Clock Control 1 */
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0x0038, /* R13 - Clock Control 2 */
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0x4000, /* R14 - Clock Control 3 */
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0x0000, /* R15 */
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0x0000, /* R16 - FLL Control 1 */
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0x0200, /* R17 - FLL Control 2 */
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0x0000, /* R18 - FLL Control 3 */
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0x0204, /* R19 - FLL Control 4 */
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0x0000, /* R20 - FLL Control 5 */
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0x0000, /* R21 */
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0x0000, /* R22 - Audio Interface 1 */
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0x0002, /* R23 - Audio Interface 2 */
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0x0008, /* R24 - Audio Interface 3 */
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0x0022, /* R25 - Audio Interface 4 */
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0x0000, /* R26 - Interrupt Status */
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0x0006, /* R27 - Interrupt Status Mask */
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0x0000, /* R28 - Interrupt Polarity */
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0x0000, /* R29 - Interrupt Control */
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0x00C0, /* R30 - DAC Digital 1 */
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0x0008, /* R31 - DAC Digital 2 */
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0x09AF, /* R32 - DRC 1 */
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0x4201, /* R33 - DRC 2 */
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0x0000, /* R34 - DRC 3 */
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0x0000, /* R35 - DRC 4 */
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0x0000, /* R36 */
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0x0000, /* R37 */
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0x0000, /* R38 - Write Sequencer 1 */
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0x0000, /* R39 - Write Sequencer 2 */
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0x0002, /* R40 - MW Slave 1 */
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0x0000, /* R41 */
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0x0000, /* R42 - EQ 1 */
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0x0000, /* R43 - EQ 2 */
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0x0FCA, /* R44 - EQ 3 */
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0x0400, /* R45 - EQ 4 */
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0x00B8, /* R46 - EQ 5 */
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0x1EB5, /* R47 - EQ 6 */
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0xF145, /* R48 - EQ 7 */
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0x0B75, /* R49 - EQ 8 */
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0x01C5, /* R50 - EQ 9 */
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0x169E, /* R51 - EQ 10 */
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0xF829, /* R52 - EQ 11 */
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0x07AD, /* R53 - EQ 12 */
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0x1103, /* R54 - EQ 13 */
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0x1C58, /* R55 - EQ 14 */
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0xF373, /* R56 - EQ 15 */
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0x0A54, /* R57 - EQ 16 */
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0x0558, /* R58 - EQ 17 */
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0x0564, /* R59 - EQ 18 */
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0x0559, /* R60 - EQ 19 */
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0x4000, /* R61 - EQ 20 */
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static struct reg_default wm9081_reg[] = {
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{ 0, 0x9081 }, /* R0 - Software Reset */
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{ 2, 0x00B9 }, /* R2 - Analogue Lineout */
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{ 3, 0x00B9 }, /* R3 - Analogue Speaker PGA */
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{ 4, 0x0001 }, /* R4 - VMID Control */
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{ 5, 0x0068 }, /* R5 - Bias Control 1 */
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{ 7, 0x0000 }, /* R7 - Analogue Mixer */
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{ 8, 0x0000 }, /* R8 - Anti Pop Control */
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{ 9, 0x01DB }, /* R9 - Analogue Speaker 1 */
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{ 10, 0x0018 }, /* R10 - Analogue Speaker 2 */
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{ 11, 0x0180 }, /* R11 - Power Management */
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{ 12, 0x0000 }, /* R12 - Clock Control 1 */
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{ 13, 0x0038 }, /* R13 - Clock Control 2 */
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{ 14, 0x4000 }, /* R14 - Clock Control 3 */
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{ 16, 0x0000 }, /* R16 - FLL Control 1 */
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{ 17, 0x0200 }, /* R17 - FLL Control 2 */
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{ 18, 0x0000 }, /* R18 - FLL Control 3 */
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{ 19, 0x0204 }, /* R19 - FLL Control 4 */
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{ 20, 0x0000 }, /* R20 - FLL Control 5 */
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{ 22, 0x0000 }, /* R22 - Audio Interface 1 */
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{ 23, 0x0002 }, /* R23 - Audio Interface 2 */
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{ 24, 0x0008 }, /* R24 - Audio Interface 3 */
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{ 25, 0x0022 }, /* R25 - Audio Interface 4 */
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{ 27, 0x0006 }, /* R27 - Interrupt Status Mask */
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{ 28, 0x0000 }, /* R28 - Interrupt Polarity */
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{ 29, 0x0000 }, /* R29 - Interrupt Control */
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{ 30, 0x00C0 }, /* R30 - DAC Digital 1 */
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{ 31, 0x0008 }, /* R31 - DAC Digital 2 */
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{ 32, 0x09AF }, /* R32 - DRC 1 */
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{ 33, 0x4201 }, /* R33 - DRC 2 */
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{ 34, 0x0000 }, /* R34 - DRC 3 */
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{ 35, 0x0000 }, /* R35 - DRC 4 */
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{ 38, 0x0000 }, /* R38 - Write Sequencer 1 */
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{ 39, 0x0000 }, /* R39 - Write Sequencer 2 */
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{ 40, 0x0002 }, /* R40 - MW Slave 1 */
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{ 42, 0x0000 }, /* R42 - EQ 1 */
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{ 43, 0x0000 }, /* R43 - EQ 2 */
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{ 44, 0x0FCA }, /* R44 - EQ 3 */
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{ 45, 0x0400 }, /* R45 - EQ 4 */
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{ 46, 0x00B8 }, /* R46 - EQ 5 */
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{ 47, 0x1EB5 }, /* R47 - EQ 6 */
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{ 48, 0xF145 }, /* R48 - EQ 7 */
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{ 49, 0x0B75 }, /* R49 - EQ 8 */
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{ 50, 0x01C5 }, /* R50 - EQ 9 */
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{ 51, 0x169E }, /* R51 - EQ 10 */
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{ 52, 0xF829 }, /* R52 - EQ 11 */
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{ 53, 0x07AD }, /* R53 - EQ 12 */
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{ 54, 0x1103 }, /* R54 - EQ 13 */
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{ 55, 0x1C58 }, /* R55 - EQ 14 */
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{ 56, 0xF373 }, /* R56 - EQ 15 */
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{ 57, 0x0A54 }, /* R57 - EQ 16 */
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{ 58, 0x0558 }, /* R58 - EQ 17 */
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{ 59, 0x0564 }, /* R59 - EQ 18 */
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{ 60, 0x0559 }, /* R60 - EQ 19 */
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{ 61, 0x4000 }, /* R61 - EQ 20 */
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};
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static struct {
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@ -156,7 +149,7 @@ static struct {
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};
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struct wm9081_priv {
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enum snd_soc_control_type control_type;
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struct regmap *regmap;
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int sysclk_source;
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int mclk_rate;
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int sysclk_rate;
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@ -169,20 +162,84 @@ struct wm9081_priv {
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struct wm9081_pdata pdata;
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};
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static int wm9081_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
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static bool wm9081_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM9081_SOFTWARE_RESET:
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case WM9081_INTERRUPT_STATUS:
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return 1;
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return true;
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default:
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return 0;
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return false;
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}
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}
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static int wm9081_reset(struct snd_soc_codec *codec)
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static bool wm9081_readable_register(struct device *dev, unsigned int reg)
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{
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return snd_soc_write(codec, WM9081_SOFTWARE_RESET, 0);
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switch (reg) {
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case WM9081_SOFTWARE_RESET:
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case WM9081_ANALOGUE_LINEOUT:
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case WM9081_ANALOGUE_SPEAKER_PGA:
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case WM9081_VMID_CONTROL:
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case WM9081_BIAS_CONTROL_1:
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case WM9081_ANALOGUE_MIXER:
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case WM9081_ANTI_POP_CONTROL:
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case WM9081_ANALOGUE_SPEAKER_1:
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case WM9081_ANALOGUE_SPEAKER_2:
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case WM9081_POWER_MANAGEMENT:
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case WM9081_CLOCK_CONTROL_1:
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case WM9081_CLOCK_CONTROL_2:
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case WM9081_CLOCK_CONTROL_3:
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case WM9081_FLL_CONTROL_1:
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case WM9081_FLL_CONTROL_2:
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case WM9081_FLL_CONTROL_3:
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case WM9081_FLL_CONTROL_4:
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case WM9081_FLL_CONTROL_5:
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case WM9081_AUDIO_INTERFACE_1:
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case WM9081_AUDIO_INTERFACE_2:
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case WM9081_AUDIO_INTERFACE_3:
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case WM9081_AUDIO_INTERFACE_4:
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case WM9081_INTERRUPT_STATUS:
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case WM9081_INTERRUPT_STATUS_MASK:
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case WM9081_INTERRUPT_POLARITY:
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case WM9081_INTERRUPT_CONTROL:
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case WM9081_DAC_DIGITAL_1:
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case WM9081_DAC_DIGITAL_2:
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case WM9081_DRC_1:
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case WM9081_DRC_2:
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case WM9081_DRC_3:
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case WM9081_DRC_4:
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case WM9081_WRITE_SEQUENCER_1:
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case WM9081_WRITE_SEQUENCER_2:
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case WM9081_MW_SLAVE_1:
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case WM9081_EQ_1:
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case WM9081_EQ_2:
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case WM9081_EQ_3:
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case WM9081_EQ_4:
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case WM9081_EQ_5:
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case WM9081_EQ_6:
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case WM9081_EQ_7:
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case WM9081_EQ_8:
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case WM9081_EQ_9:
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case WM9081_EQ_10:
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case WM9081_EQ_11:
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case WM9081_EQ_12:
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case WM9081_EQ_13:
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case WM9081_EQ_14:
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case WM9081_EQ_15:
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case WM9081_EQ_16:
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case WM9081_EQ_17:
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case WM9081_EQ_18:
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case WM9081_EQ_19:
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case WM9081_EQ_20:
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return true;
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default:
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return false;
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}
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}
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static int wm9081_reset(struct regmap *map)
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{
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return regmap_write(map, WM9081_SOFTWARE_RESET, 0x9081);
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}
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static const DECLARE_TLV_DB_SCALE(drc_in_tlv, -4500, 75, 0);
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@ -1215,25 +1272,14 @@ static int wm9081_probe(struct snd_soc_codec *codec)
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int ret;
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u16 reg;
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm9081->control_type);
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codec->control_data = wm9081->regmap;
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
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return ret;
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}
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reg = snd_soc_read(codec, WM9081_SOFTWARE_RESET);
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if (reg != 0x9081) {
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dev_err(codec->dev, "Device is not a WM9081: ID=0x%x\n", reg);
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ret = -EINVAL;
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return ret;
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}
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ret = wm9081_reset(codec);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to issue reset\n");
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return ret;
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}
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reg = 0;
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if (wm9081->pdata.irq_high)
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reg |= WM9081_IRQ_POL;
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@ -1277,15 +1323,9 @@ static int wm9081_suspend(struct snd_soc_codec *codec, pm_message_t state)
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static int wm9081_resume(struct snd_soc_codec *codec)
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{
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u16 *reg_cache = codec->reg_cache;
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int i;
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struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec);
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for (i = 0; i < codec->driver->reg_cache_size; i++) {
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if (i == WM9081_SOFTWARE_RESET)
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continue;
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snd_soc_write(codec, i, reg_cache[i]);
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}
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regcache_sync(wm9081->regmap);
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wm9081_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
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@ -1305,11 +1345,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9081 = {
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.set_sysclk = wm9081_set_sysclk,
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.set_bias_level = wm9081_set_bias_level,
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.reg_cache_size = ARRAY_SIZE(wm9081_reg_defaults),
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.reg_word_size = sizeof(u16),
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.reg_cache_default = wm9081_reg_defaults,
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.volatile_register = wm9081_volatile_register,
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.controls = wm9081_snd_controls,
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.num_controls = ARRAY_SIZE(wm9081_snd_controls),
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.dapm_widgets = wm9081_dapm_widgets,
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@ -1318,11 +1353,24 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9081 = {
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.num_dapm_routes = ARRAY_SIZE(wm9081_audio_paths),
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};
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static const struct regmap_config wm9081_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = WM9081_MAX_REGISTER,
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.reg_defaults = wm9081_reg,
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.num_reg_defaults = ARRAY_SIZE(wm9081_reg),
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.volatile_reg = wm9081_volatile_register,
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.readable_reg = wm9081_readable_register,
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.cache_type = REGCACHE_RBTREE,
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};
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#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
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static __devinit int wm9081_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct wm9081_priv *wm9081;
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unsigned int reg;
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int ret;
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wm9081 = kzalloc(sizeof(struct wm9081_priv), GFP_KERNEL);
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@ -1330,7 +1378,30 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c,
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return -ENOMEM;
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i2c_set_clientdata(i2c, wm9081);
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wm9081->control_type = SND_SOC_I2C;
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wm9081->regmap = regmap_init_i2c(i2c, &wm9081_regmap);
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if (IS_ERR(wm9081->regmap)) {
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ret = PTR_ERR(wm9081->regmap);
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dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
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goto err;
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}
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ret = regmap_read(wm9081->regmap, WM9081_SOFTWARE_RESET, ®);
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if (ret != 0) {
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dev_err(&i2c->dev, "Failed to read chip ID: %d\n", ret);
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goto err_regmap;
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}
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if (reg != 0x9081) {
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dev_err(&i2c->dev, "Device is not a WM9081: ID=0x%x\n", reg);
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ret = -EINVAL;
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goto err_regmap;
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}
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ret = wm9081_reset(wm9081->regmap);
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if (ret < 0) {
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dev_err(&i2c->dev, "Failed to issue reset\n");
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goto err_regmap;
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}
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if (dev_get_platdata(&i2c->dev))
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memcpy(&wm9081->pdata, dev_get_platdata(&i2c->dev),
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@ -1339,13 +1410,24 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c,
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ret = snd_soc_register_codec(&i2c->dev,
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&soc_codec_dev_wm9081, &wm9081_dai, 1);
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if (ret < 0)
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goto err_regmap;
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return 0;
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err_regmap:
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regmap_exit(wm9081->regmap);
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err:
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kfree(wm9081);
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return ret;
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}
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static __devexit int wm9081_i2c_remove(struct i2c_client *client)
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{
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struct wm9081_priv *wm9081 = i2c_get_clientdata(client);
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snd_soc_unregister_codec(&client->dev);
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regmap_exit(wm9081->regmap);
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kfree(i2c_get_clientdata(client));
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return 0;
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}
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