[IA64] beautify vmlinux.lds.h

Use the same style as used for C code in vmlinux.lds.h.

This is the same format as have been gradually introduced
for other architectures in the kernel.

This patch do not introduce any functional changes.

Note: Use "git diff -w" to supress whitespace noise.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Sam Ravnborg
2010-06-19 17:19:25 +02:00
committed by Tony Luck
parent 7e27d6e778
commit 7b313fdf23

View File

@ -6,204 +6,209 @@
#include <asm-generic/vmlinux.lds.h> #include <asm-generic/vmlinux.lds.h>
#define IVT_TEXT \
VMLINUX_SYMBOL(__start_ivt_text) = .; \
*(.text..ivt) \
VMLINUX_SYMBOL(__end_ivt_text) = .;
OUTPUT_FORMAT("elf64-ia64-little") OUTPUT_FORMAT("elf64-ia64-little")
OUTPUT_ARCH(ia64) OUTPUT_ARCH(ia64)
ENTRY(phys_start) ENTRY(phys_start)
jiffies = jiffies_64; jiffies = jiffies_64;
PHDRS { PHDRS {
code PT_LOAD; code PT_LOAD;
percpu PT_LOAD; percpu PT_LOAD;
data PT_LOAD; data PT_LOAD;
note PT_NOTE; note PT_NOTE;
unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */ unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
} }
SECTIONS
{
/* unwind exit sections must be discarded before the rest of the
sections get included. */
/DISCARD/ : {
*(.IA_64.unwind.exit.text)
*(.IA_64.unwind_info.exit.text)
*(.comment)
*(.note)
}
v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */ SECTIONS {
phys_start = _start - LOAD_OFFSET; /*
* unwind exit sections must be discarded before
* the rest of the sections get included.
*/
/DISCARD/ : {
*(.IA_64.unwind.exit.text)
*(.IA_64.unwind_info.exit.text)
*(.comment)
*(.note)
}
code : { } :code v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
. = KERNEL_START; phys_start = _start - LOAD_OFFSET;
_text = .; code : {
_stext = .; } :code
. = KERNEL_START;
_text = .;
_stext = .;
.text : AT(ADDR(.text) - LOAD_OFFSET) {
__start_ivt_text = .;
*(.text..ivt)
__end_ivt_text = .;
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
KPROBES_TEXT
*(.gnu.linkonce.t*)
}
.text2 : AT(ADDR(.text2) - LOAD_OFFSET) {
*(.text2)
}
.text : AT(ADDR(.text) - LOAD_OFFSET)
{
IVT_TEXT
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
KPROBES_TEXT
*(.gnu.linkonce.t*)
}
.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
{ *(.text2) }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
.text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) {
{ *(.text..lock) } *(.text..lock)
}
#endif #endif
_etext = .; _etext = .;
/* Read-only data */ /*
* Read-only data
*/
NOTES :code :note /* put .notes in text and mark in PT_NOTE */
code_continues : {
} : code /* switch back to regular program... */
NOTES :code :note /* put .notes in text and mark in PT_NOTE */ EXCEPTION_TABLE(16)
code_continues : {} :code /* switch back to regular program... */
EXCEPTION_TABLE(16) /* MCA table */
. = ALIGN(16);
/* MCA table */ __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) {
. = ALIGN(16); __start___mca_table = .;
__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) *(__mca_table)
{ __stop___mca_table = .;
__start___mca_table = .;
*(__mca_table)
__stop___mca_table = .;
} }
.data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) {
{ __start___phys_stack_reg_patchlist = .;
__start___phys_stack_reg_patchlist = .; *(.data..patch.phys_stack_reg)
*(.data..patch.phys_stack_reg) __end___phys_stack_reg_patchlist = .;
__end___phys_stack_reg_patchlist = .;
} }
/* Global data */ /*
_data = .; * Global data
*/
_data = .;
/* Unwind info & table: */ /* Unwind info & table: */
. = ALIGN(8); . = ALIGN(8);
.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) {
{ *(.IA_64.unwind_info*) } *(.IA_64.unwind_info*)
.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) }
{ .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) {
__start_unwind = .; __start_unwind = .;
*(.IA_64.unwind*) *(.IA_64.unwind*)
__end_unwind = .; __end_unwind = .;
} :code :unwind } :code :unwind
code_continues2 : {} : code code_continues2 : {
} : code
RODATA RODATA
.opd : AT(ADDR(.opd) - LOAD_OFFSET) .opd : AT(ADDR(.opd) - LOAD_OFFSET) {
{ *(.opd) } *(.opd)
/* Initialization code and data: */
. = ALIGN(PAGE_SIZE);
__init_begin = .;
INIT_TEXT_SECTION(PAGE_SIZE)
INIT_DATA_SECTION(16)
.data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET)
{
__start___vtop_patchlist = .;
*(.data..patch.vtop)
__end___vtop_patchlist = .;
} }
.data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) /*
{ * Initialization code and data:
__start___rse_patchlist = .; */
*(.data..patch.rse) . = ALIGN(PAGE_SIZE);
__end___rse_patchlist = .; __init_begin = .;
INIT_TEXT_SECTION(PAGE_SIZE)
INIT_DATA_SECTION(16)
.data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) {
__start___vtop_patchlist = .;
*(.data..patch.vtop)
__end___vtop_patchlist = .;
} }
.data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) {
{ __start___rse_patchlist = .;
__start___mckinley_e9_bundles = .; *(.data..patch.rse)
*(.data..patch.mckinley_e9) __end___rse_patchlist = .;
__end___mckinley_e9_bundles = .; }
.data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) {
__start___mckinley_e9_bundles = .;
*(.data..patch.mckinley_e9)
__end___mckinley_e9_bundles = .;
} }
#if defined(CONFIG_PARAVIRT) #if defined(CONFIG_PARAVIRT)
. = ALIGN(16); . = ALIGN(16);
.paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET) .paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET) {
{ __start_paravirt_bundles = .;
__start_paravirt_bundles = .; *(.paravirt_bundles)
*(.paravirt_bundles) __stop_paravirt_bundles = .;
__stop_paravirt_bundles = .;
} }
. = ALIGN(16); . = ALIGN(16);
.paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET) .paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET) {
{ __start_paravirt_insts = .;
__start_paravirt_insts = .; *(.paravirt_insts)
*(.paravirt_insts) __stop_paravirt_insts = .;
__stop_paravirt_insts = .;
} }
. = ALIGN(16); . = ALIGN(16);
.paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET) .paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET) {
{ __start_paravirt_branches = .;
__start_paravirt_branches = .; *(.paravirt_branches)
*(.paravirt_branches) __stop_paravirt_branches = .;
__stop_paravirt_branches = .;
} }
#endif #endif
#if defined(CONFIG_IA64_GENERIC) #if defined(CONFIG_IA64_GENERIC)
/* Machine Vector */ /* Machine Vector */
. = ALIGN(16); . = ALIGN(16);
.machvec : AT(ADDR(.machvec) - LOAD_OFFSET) .machvec : AT(ADDR(.machvec) - LOAD_OFFSET) {
{ machvec_start = .;
machvec_start = .; *(.machvec)
*(.machvec) machvec_end = .;
machvec_end = .;
} }
#endif #endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
. = ALIGN(PERCPU_PAGE_SIZE); . = ALIGN(PERCPU_PAGE_SIZE);
__cpu0_per_cpu = .; __cpu0_per_cpu = .;
. = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */
#endif #endif
. = ALIGN(PAGE_SIZE); . = ALIGN(PAGE_SIZE);
__init_end = .; __init_end = .;
.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
{ PAGE_ALIGNED_DATA(PAGE_SIZE)
PAGE_ALIGNED_DATA(PAGE_SIZE) . = ALIGN(PAGE_SIZE);
. = ALIGN(PAGE_SIZE); __start_gate_section = .;
__start_gate_section = .; *(.data..gate)
*(.data..gate) __stop_gate_section = .;
__stop_gate_section = .;
#ifdef CONFIG_XEN #ifdef CONFIG_XEN
. = ALIGN(PAGE_SIZE); . = ALIGN(PAGE_SIZE);
__xen_start_gate_section = .; __xen_start_gate_section = .;
*(.data..gate.xen) *(.data..gate.xen)
__xen_stop_gate_section = .; __xen_stop_gate_section = .;
#endif #endif
} }
. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose /*
* kernel data * make sure the gate page doesn't expose
*/ * kernel data
*/
. = ALIGN(PAGE_SIZE);
/* Per-cpu data: */ /* Per-cpu data: */
. = ALIGN(PERCPU_PAGE_SIZE); . = ALIGN(PERCPU_PAGE_SIZE);
PERCPU_VADDR(PERCPU_ADDR, :percpu) PERCPU_VADDR(PERCPU_ADDR, :percpu)
__phys_per_cpu_start = __per_cpu_load; __phys_per_cpu_start = __per_cpu_load;
. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits /*
* into percpu page size * ensure percpu data fits
*/ * into percpu page size
*/
. = __phys_per_cpu_start + PERCPU_PAGE_SIZE;
data : { } :data data : {
.data : AT(ADDR(.data) - LOAD_OFFSET) } :data
{ .data : AT(ADDR(.data) - LOAD_OFFSET) {
INIT_TASK_DATA(PAGE_SIZE) INIT_TASK_DATA(PAGE_SIZE)
CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES) CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
READ_MOSTLY_DATA(SMP_CACHE_BYTES) READ_MOSTLY_DATA(SMP_CACHE_BYTES)
@ -213,26 +218,37 @@ SECTIONS
CONSTRUCTORS CONSTRUCTORS
} }
. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */ . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
.got : AT(ADDR(.got) - LOAD_OFFSET) .got : AT(ADDR(.got) - LOAD_OFFSET) {
{ *(.got.plt) *(.got) } *(.got.plt)
__gp = ADDR(.got) + 0x200000; *(.got)
/* We want the small data sections together, so single-instruction offsets }
can access them all, and initialized data all before uninitialized, so __gp = ADDR(.got) + 0x200000;
we can shorten the on-disk segment size. */
.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
{ *(.sdata) *(.sdata1) *(.srdata) }
_edata = .;
BSS_SECTION(0, 0, 0) /*
* We want the small data sections together,
* so single-instruction offsets can access
* them all, and initialized data all before
* uninitialized, so we can shorten the
* on-disk segment size.
*/
.sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
*(.sdata)
*(.sdata1)
*(.srdata)
}
_edata = .;
_end = .; BSS_SECTION(0, 0, 0)
code : { } :code _end = .;
STABS_DEBUG code : {
DWARF_DEBUG } :code
/* Default discards */ STABS_DEBUG
DISCARDS DWARF_DEBUG
/* Default discards */
DISCARDS
} }