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irda: w83977af_ir: fix damaged whitespace

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As David Miller pointed out for for the previous patch, the whitespace
in some functions looks rather odd. This was caused by commit 6329da5f258a
("obsolete config in kernel source: USE_INTERNAL_TIMER"), which removed
some conditions but did not reindent the code.

This fixes the indentation in the file and removes extraneous whitespace
at the end of the lines and before tabs.

There are many other minor coding style problems in the driver, but I'm
not touching those here.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Arnd Bergmann
2016-11-28 15:19:43 +01:00
committed by David S. Miller
parent c6c60dae81
commit 7b2024fdec
1 changed files with 202 additions and 202 deletions
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136
drivers/net/irda/w83977af_ir.c
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@ -108,7 +108,7 @@ static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd
*/ */
static int __init w83977af_init(void) static int __init w83977af_init(void)
{ {
int i; int i;
for (i=0; i < ARRAY_SIZE(dev_self) && io[i] < 2000; i++) { for (i=0; i < ARRAY_SIZE(dev_self) && io[i] < 2000; i++) {
if (w83977af_open(i, io[i], irq[i], dma[i]) == 0) if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
@ -150,7 +150,7 @@ static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
unsigned int dma) unsigned int dma)
{ {
struct net_device *dev; struct net_device *dev;
struct w83977af_ir *self; struct w83977af_ir *self;
int err; int err;
/* Lock the port that we need */ /* Lock the port that we need */
@ -180,11 +180,11 @@ static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
/* Initialize IO */ /* Initialize IO */
self->io.fir_base = iobase; self->io.fir_base = iobase;
self->io.irq = irq; self->io.irq = irq;
self->io.fir_ext = CHIP_IO_EXTENT; self->io.fir_ext = CHIP_IO_EXTENT;
self->io.dma = dma; self->io.dma = dma;
self->io.fifo_size = 32; self->io.fifo_size = 32;
/* Initialize QoS for this device */ /* Initialize QoS for this device */
irda_init_max_qos_capabilies(&self->qos); irda_init_max_qos_capabilies(&self->qos);
@ -300,72 +300,72 @@ static int w83977af_close(struct w83977af_ir *self)
static int w83977af_probe(int iobase, int irq, int dma) static int w83977af_probe(int iobase, int irq, int dma)
{ {
int version; int version;
int i; int i;
for (i=0; i < 2; i++) { for (i=0; i < 2; i++) {
#ifdef CONFIG_USE_W977_PNP #ifdef CONFIG_USE_W977_PNP
/* Enter PnP configuration mode */ /* Enter PnP configuration mode */
w977_efm_enter(efbase[i]); w977_efm_enter(efbase[i]);
w977_select_device(W977_DEVICE_IR, efbase[i]); w977_select_device(W977_DEVICE_IR, efbase[i]);
/* Configure PnP port, IRQ, and DMA channel */ /* Configure PnP port, IRQ, and DMA channel */
w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]); w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
w977_write_reg(0x61, (iobase) & 0xff, efbase[i]); w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
w977_write_reg(0x70, irq, efbase[i]); w977_write_reg(0x70, irq, efbase[i]);
#ifdef CONFIG_ARCH_NETWINDER #ifdef CONFIG_ARCH_NETWINDER
/* Netwinder uses 1 higher than Linux */ /* Netwinder uses 1 higher than Linux */
w977_write_reg(0x74, dma+1, efbase[i]); w977_write_reg(0x74, dma+1, efbase[i]);
#else #else
w977_write_reg(0x74, dma, efbase[i]); w977_write_reg(0x74, dma, efbase[i]);
#endif /* CONFIG_ARCH_NETWINDER */ #endif /* CONFIG_ARCH_NETWINDER */
w977_write_reg(0x75, 0x04, efbase[i]); /* Disable Tx DMA */ w977_write_reg(0x75, 0x04, efbase[i]);/* Disable Tx DMA */
/* Set append hardware CRC, enable IR bank selection */ /* Set append hardware CRC, enable IR bank selection */
w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]); w977_write_reg(0xf0, APEDCRC | ENBNKSEL, efbase[i]);
/* Activate device */ /* Activate device */
w977_write_reg(0x30, 0x01, efbase[i]); w977_write_reg(0x30, 0x01, efbase[i]);
w977_efm_exit(efbase[i]); w977_efm_exit(efbase[i]);
#endif /* CONFIG_USE_W977_PNP */ #endif /* CONFIG_USE_W977_PNP */
/* Disable Advanced mode */ /* Disable Advanced mode */
switch_bank(iobase, SET2); switch_bank(iobase, SET2);
outb(iobase+2, 0x00); outb(iobase+2, 0x00);
/* Turn on UART (global) interrupts */ /* Turn on UART (global) interrupts */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
outb(HCR_EN_IRQ, iobase+HCR); outb(HCR_EN_IRQ, iobase+HCR);
/* Switch to advanced mode */ /* Switch to advanced mode */
switch_bank(iobase, SET2); switch_bank(iobase, SET2);
outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1); outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
/* Set default IR-mode */ /* Set default IR-mode */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
outb(HCR_SIR, iobase+HCR); outb(HCR_SIR, iobase+HCR);
/* Read the Advanced IR ID */ /* Read the Advanced IR ID */
switch_bank(iobase, SET3); switch_bank(iobase, SET3);
version = inb(iobase+AUID); version = inb(iobase+AUID);
/* Should be 0x1? */ /* Should be 0x1? */
if (0x10 == (version & 0xf0)) { if (0x10 == (version & 0xf0)) {
efio = efbase[i]; efio = efbase[i];
/* Set FIFO size to 32 */ /* Set FIFO size to 32 */
switch_bank(iobase, SET2); switch_bank(iobase, SET2);
outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2); outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
/* Set FIFO threshold to TX17, RX16 */ /* Set FIFO threshold to TX17, RX16 */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST| outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
UFR_EN_FIFO,iobase+UFR); UFR_EN_FIFO,iobase+UFR);
/* Receiver frame length */ /* Receiver frame length */
switch_bank(iobase, SET4); switch_bank(iobase, SET4);
outb(2048 & 0xff, iobase+6); outb(2048 & 0xff, iobase+6);
outb((2048 >> 8) & 0x1f, iobase+7); outb((2048 >> 8) & 0x1f, iobase+7);
@ -392,7 +392,7 @@ static int w83977af_probe(int iobase, int irq, int dma)
/* Try next extented function register address */ /* Try next extented function register address */
pr_debug("%s(), Wrong chip version", __func__); pr_debug("%s(), Wrong chip version", __func__);
} }
} }
return -1; return -1;
} }
@ -518,15 +518,15 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
mtt = irda_get_mtt(skb); mtt = irda_get_mtt(skb);
pr_debug("%s(%ld), mtt=%d\n", __func__ , jiffies, mtt); pr_debug("%s(%ld), mtt=%d\n", __func__ , jiffies, mtt);
if (mtt > 1000) if (mtt > 1000)
mdelay(mtt/1000); mdelay(mtt/1000);
else if (mtt) else if (mtt)
udelay(mtt); udelay(mtt);
/* Enable DMA interrupt */ /* Enable DMA interrupt */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
outb(ICR_EDMAI, iobase+ICR); outb(ICR_EDMAI, iobase+ICR);
w83977af_dma_write(self, iobase); w83977af_dma_write(self, iobase);
} else { } else {
self->tx_buff.data = self->tx_buff.head; self->tx_buff.data = self->tx_buff.head;
self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
@ -570,7 +570,7 @@ static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
self->io.direction = IO_XMIT; self->io.direction = IO_XMIT;
/* Enable DMA */ /* Enable DMA */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR); outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
/* Restore set register */ /* Restore set register */
@ -995,7 +995,7 @@ static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
/* Clear timer event */ /* Clear timer event */
/* switch_bank(iobase, SET0); */ /* switch_bank(iobase, SET0); */
/* outb(ASCR_CTE, iobase+ASCR); */ /* outb(ASCR_CTE, iobase+ASCR); */
/* Check if this is a TX timer interrupt */ /* Check if this is a TX timer interrupt */
if (self->io.direction == IO_XMIT) { if (self->io.direction == IO_XMIT) {
@ -1022,7 +1022,7 @@ static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
*/ */
w83977af_dma_receive(self); w83977af_dma_receive(self);
new_icr = ICR_EFSFI; new_icr = ICR_EFSFI;
/* } */ /* } */
} }
/* Restore set */ /* Restore set */
@ -1138,13 +1138,13 @@ static int w83977af_net_open(struct net_device *dev)
/* Save current set */ /* Save current set */
set = inb(iobase+SSR); set = inb(iobase+SSR);
/* Enable some interrupts so we can receive frames again */ /* Enable some interrupts so we can receive frames again */
switch_bank(iobase, SET0); switch_bank(iobase, SET0);
if (self->io.speed > 115200) { if (self->io.speed > 115200) {
outb(ICR_EFSFI, iobase+ICR); outb(ICR_EFSFI, iobase+ICR);
w83977af_dma_receive(self); w83977af_dma_receive(self);
} else } else
outb(ICR_ERBRI, iobase+ICR); outb(ICR_ERBRI, iobase+ICR);
/* Restore bank register */ /* Restore bank register */
outb(set, iobase+SSR); outb(set, iobase+SSR);