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drm/amd: Use amdgpu_ucode_* helpers for MES

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commit 11e0b0067ec0707e8e598a5f9a547ab618ae7982 upstream.

The `amdgpu_ucode_request` helper will ensure that the return code for
missing firmware is -ENODEV so that early_init can fail.

The `amdgpu_ucode_release` helper provides symmetry for releasing firmware.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mario Limonciello 2023-01-03 14:12:37 -06:00 committed by Greg Kroah-Hartman
parent a3e3a640d4
commit 7a07311304
3 changed files with 4 additions and 26 deletions
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10
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
View File

@ -1438,11 +1438,7 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mes%s.bin",
ucode_prefix,
pipe == AMDGPU_MES_SCHED_PIPE ? "" : "1");
r = request_firmware(&adev->mes.fw[pipe], fw_name, adev->dev);
if (r)
goto out;
r = amdgpu_ucode_validate(adev->mes.fw[pipe]);
r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], fw_name);
if (r)
goto out;
@ -1482,9 +1478,7 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)
}
return 0;
out:
release_firmware(adev->mes.fw[pipe]);
adev->mes.fw[pipe] = NULL;
amdgpu_ucode_release(&adev->mes.fw[pipe]);
return r;
}

10
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
View File

@ -375,13 +375,6 @@ static const struct amdgpu_mes_funcs mes_v10_1_funcs = {
.resume_gang = mes_v10_1_resume_gang,
};
static void mes_v10_1_free_microcode(struct amdgpu_device *adev,
enum admgpu_mes_pipe pipe)
{
release_firmware(adev->mes.fw[pipe]);
adev->mes.fw[pipe] = NULL;
}
static int mes_v10_1_allocate_ucode_buffer(struct amdgpu_device *adev,
enum admgpu_mes_pipe pipe)
{
@ -975,8 +968,7 @@ static int mes_v10_1_sw_fini(void *handle)
amdgpu_bo_free_kernel(&adev->mes.eop_gpu_obj[pipe],
&adev->mes.eop_gpu_addr[pipe],
NULL);
mes_v10_1_free_microcode(adev, pipe);
amdgpu_ucode_release(&adev->mes.fw[pipe]);
}
amdgpu_bo_free_kernel(&adev->gfx.kiq.ring.mqd_obj,

10
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
View File

@ -453,13 +453,6 @@ static const struct amdgpu_mes_funcs mes_v11_0_funcs = {
.misc_op = mes_v11_0_misc_op,
};
static void mes_v11_0_free_microcode(struct amdgpu_device *adev,
enum admgpu_mes_pipe pipe)
{
release_firmware(adev->mes.fw[pipe]);
adev->mes.fw[pipe] = NULL;
}
static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
enum admgpu_mes_pipe pipe)
{
@ -1063,8 +1056,7 @@ static int mes_v11_0_sw_fini(void *handle)
amdgpu_bo_free_kernel(&adev->mes.eop_gpu_obj[pipe],
&adev->mes.eop_gpu_addr[pipe],
NULL);
mes_v11_0_free_microcode(adev, pipe);
amdgpu_ucode_release(&adev->mes.fw[pipe]);
}
amdgpu_bo_free_kernel(&adev->gfx.kiq.ring.mqd_obj,