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Merge changes Ib5bb4a55,I5ad48ff8,I2b41b3ba,Ib36deff9,Ib271c569, ... into android14-6.1-lts

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* changes:
  ANDROID: GKI: update .stg due to internal zswap and tracing changes
  ANDROID: GKI: db845c: add pcie_capability_clear_and_set_word to the symbol list
  ANDROID: GKI: sched: put back the cpu_capacity_inverted variable
  Revert "ipv4: fix data-races around inet->inet_id"
  Revert "usb: typec: bus: verify partner exists in typec_altmode_attention"
  Revert "scsi: core: Use 32-bit hostnum in scsi_host_lookup()"
  Revert "media: cec: core: add adap_nb_transmit_canceled() callback"
  Revert "media: cec: core: add adap_unconfigured() callback"
  Revert "tracing: Introduce pipe_cpumask to avoid race on trace_pipes"
  Revert "tracing: Zero the pipe cpumask on alloc to avoid spurious -EBUSY"
  Revert "PCI: Allow drivers to request exclusive config regions"
  Revert "PCI: Add locking to RMW PCI Express Capability Register accessors"
  Revert "crypto: api - Use work queue in crypto_destroy_instance"
  Revert "media: uapi: HEVC: Add num_delta_pocs_of_ref_rps_idx field"
  ANDROID: GKI: Fix firmware: smccc build error
  ANDROID: GKI: fix up merge issue in drivers/scsi/storvsc_drv.c
  Merge 6.1.53 into android14-6.1-lts
  Merge 6.1.52 into android14-6.1-lts
  Merge 6.1.51 into android14-6.1-lts
  Merge 6.1.50 into android14-6.1-lts
  Merge 6.1.49 into android14-6.1-lts
  Merge 6.1.48 into android14-6.1-lts
  Merge 6.1.47 into android14-6.1-lts
  Merge 6.1.46 into android14-6.1-lts
  Merge 6.1.45 into android14-6.1-lts
  Merge 6.1.44 into android14-6.1-lts
This commit is contained in:
Matthias Männich 2023-10-17 09:02:16 +00:00
commit 7732c16f40
1434 changed files with 14017 additions and 7155 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo
View File

@ -5,6 +5,6 @@ Description:
Indicates whether or not this SBE device has experienced a
timeout; i.e. the SBE did not respond within the time allotted
by the driver. A value of 1 indicates that a timeout has
ocurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has ocurred, or if one
has, more recent transfers have completed successful.
occurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has occurred, or if one
has, more recent transfers have completed successfully.

15
Documentation/ABI/testing/sysfs-devices-system-cpu
View File

@ -513,17 +513,18 @@ Description: information about CPUs heterogeneity.
cpu_capacity: capacity of cpuX.
What: /sys/devices/system/cpu/vulnerabilities
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/l1tf
/sys/devices/system/cpu/vulnerabilities/mds
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
/sys/devices/system/cpu/vulnerabilities/retbleed
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
Date: January 2018
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Information about CPU vulnerabilities

2
Documentation/ABI/testing/sysfs-driver-chromeos-acpi
View File

@ -134,4 +134,4 @@ KernelVersion: 5.19
Description:
Returns the verified boot data block shared between the
firmware verification step and the kernel verification step
(binary).
(hex dump).

109
Documentation/admin-guide/hw-vuln/gather_data_sampling.rst Normal file
View File

@ -0,0 +1,109 @@
.. SPDX-License-Identifier: GPL-2.0
GDS - Gather Data Sampling
==========================
Gather Data Sampling is a hardware vulnerability which allows unprivileged
speculative access to data which was previously stored in vector registers.
Problem
-------
When a gather instruction performs loads from memory, different data elements
are merged into the destination vector register. However, when a gather
instruction that is transiently executed encounters a fault, stale data from
architectural or internal vector registers may get transiently forwarded to the
destination vector register instead. This will allow a malicious attacker to
infer stale data using typical side channel techniques like cache timing
attacks. GDS is a purely sampling-based attack.
The attacker uses gather instructions to infer the stale vector register data.
The victim does not need to do anything special other than use the vector
registers. The victim does not need to use gather instructions to be
vulnerable.
Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
are possible.
Attack scenarios
----------------
Without mitigation, GDS can infer stale data across virtually all
permission boundaries:
Non-enclaves can infer SGX enclave data
Userspace can infer kernel data
Guests can infer data from hosts
Guest can infer guest from other guests
Users can infer data from other users
Because of this, it is important to ensure that the mitigation stays enabled in
lower-privilege contexts like guests and when running outside SGX enclaves.
The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
that guests are not allowed to disable the GDS mitigation. If a host erred and
allowed this, a guest could theoretically disable GDS mitigation, mount an
attack, and re-enable it.
Mitigation mechanism
--------------------
This issue is mitigated in microcode. The microcode defines the following new
bits:
================================ === ============================
IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
and mitigation support.
IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
0 by default.
IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
to GDS_MITG_DIS are ignored
Can't be cleared once set.
================================ === ============================
GDS can also be mitigated on systems that don't have updated microcode by
disabling AVX. This can be done by setting gather_data_sampling="force" or
"clearcpuid=avx" on the kernel command-line.
If used, these options will disable AVX use by turning off XSAVE YMM support.
However, the processor will still enumerate AVX support. Userspace that
does not follow proper AVX enumeration to check both AVX *and* XSAVE YMM
support will break.
Mitigation control on the kernel command line
---------------------------------------------
The mitigation can be disabled by setting "gather_data_sampling=off" or
"mitigations=off" on the kernel command line. Not specifying either will default
to the mitigation being enabled. Specifying "gather_data_sampling=force" will
use the microcode mitigation when available or disable AVX on affected systems
where the microcode hasn't been updated to include the mitigation.
GDS System Information
------------------------
The kernel provides vulnerability status information through sysfs. For
GDS this can be accessed by the following sysfs file:
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
The possible values contained in this file are:
============================== =============================================
Not affected Processor not vulnerable.
Vulnerable Processor vulnerable and mitigation disabled.
Vulnerable: No microcode Processor vulnerable and microcode is missing
mitigation.
Mitigation: AVX disabled,
no microcode Processor is vulnerable and microcode is missing
mitigation. AVX disabled as mitigation.
Mitigation: Microcode Processor is vulnerable and mitigation is in
effect.
Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
effect and cannot be disabled.
Unknown: Dependent on
hypervisor status Running on a virtual guest processor that is
affected but with no way to know if host
processor is mitigated or vulnerable.
============================== =============================================
GDS Default mitigation
----------------------
The updated microcode will enable the mitigation by default. The kernel's
default action is to leave the mitigation enabled.

2
Documentation/admin-guide/hw-vuln/index.rst
View File

@ -19,3 +19,5 @@ are configurable at compile, boot or run time.
l1d_flush.rst
processor_mmio_stale_data.rst
cross-thread-rsb.rst
gather_data_sampling.rst
srso

133
Documentation/admin-guide/hw-vuln/srso.rst Normal file
View File

@ -0,0 +1,133 @@
.. SPDX-License-Identifier: GPL-2.0
Speculative Return Stack Overflow (SRSO)
========================================
This is a mitigation for the speculative return stack overflow (SRSO)
vulnerability found on AMD processors. The mechanism is by now the well
known scenario of poisoning CPU functional units - the Branch Target
Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
tricking the elevated privilege domain (the kernel) into leaking
sensitive data.
AMD CPUs predict RET instructions using a Return Address Predictor (aka
Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
CALL instruction (i.e., an instruction predicted to be a CALL but is
not actually a CALL) can create an entry in the RAP which may be used
to predict the target of a subsequent RET instruction.
The specific circumstances that lead to this varies by microarchitecture
but the concern is that an attacker can mis-train the CPU BTB to predict
non-architectural CALL instructions in kernel space and use this to
control the speculative target of a subsequent kernel RET, potentially
leading to information disclosure via a speculative side-channel.
The issue is tracked under CVE-2023-20569.
Affected processors
-------------------
AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
processors have not been investigated.
System information and options
------------------------------
First of all, it is required that the latest microcode be loaded for
mitigations to be effective.
The sysfs file showing SRSO mitigation status is:
/sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
The possible values in this file are:
- 'Not affected' The processor is not vulnerable
- 'Vulnerable: no microcode' The processor is vulnerable, no
microcode extending IBPB functionality
to address the vulnerability has been
applied.
- 'Mitigation: microcode' Extended IBPB functionality microcode
patch has been applied. It does not
address User->Kernel and Guest->Host
transitions protection but it does
address User->User and VM->VM attack
vectors.
(spec_rstack_overflow=microcode)
- 'Mitigation: safe RET' Software-only mitigation. It complements
the extended IBPB microcode patch
functionality by addressing User->Kernel
and Guest->Host transitions protection.
Selected by default or by
spec_rstack_overflow=safe-ret
- 'Mitigation: IBPB' Similar protection as "safe RET" above
but employs an IBPB barrier on privilege
domain crossings (User->Kernel,
Guest->Host).
(spec_rstack_overflow=ibpb)
- 'Mitigation: IBPB on VMEXIT' Mitigation addressing the cloud provider
scenario - the Guest->Host transitions
only.
(spec_rstack_overflow=ibpb-vmexit)
In order to exploit vulnerability, an attacker needs to:
- gain local access on the machine
- break kASLR
- find gadgets in the running kernel in order to use them in the exploit
- potentially create and pin an additional workload on the sibling
thread, depending on the microarchitecture (not necessary on fam 0x19)
- run the exploit
Considering the performance implications of each mitigation type, the
default one is 'Mitigation: safe RET' which should take care of most
attack vectors, including the local User->Kernel one.
As always, the user is advised to keep her/his system up-to-date by
applying software updates regularly.
The default setting will be reevaluated when needed and especially when
new attack vectors appear.
As one can surmise, 'Mitigation: safe RET' does come at the cost of some
performance depending on the workload. If one trusts her/his userspace
and does not want to suffer the performance impact, one can always
disable the mitigation with spec_rstack_overflow=off.
Similarly, 'Mitigation: IBPB' is another full mitigation type employing
an indrect branch prediction barrier after having applied the required
microcode patch for one's system. This mitigation comes also at
a performance cost.
Mitigation: safe RET
--------------------
The mitigation works by ensuring all RET instructions speculate to
a controlled location, similar to how speculation is controlled in the
retpoline sequence. To accomplish this, the __x86_return_thunk forces
the CPU to mispredict every function return using a 'safe return'
sequence.
To ensure the safety of this mitigation, the kernel must ensure that the
safe return sequence is itself free from attacker interference. In Zen3
and Zen4, this is accomplished by creating a BTB alias between the
untraining function srso_alias_untrain_ret() and the safe return
function srso_alias_safe_ret() which results in evicting a potentially
poisoned BTB entry and using that safe one for all function returns.
In older Zen1 and Zen2, this is accomplished using a reinterpretation
technique similar to Retbleed one: srso_untrain_ret() and
srso_safe_ret().

63
Documentation/admin-guide/kernel-parameters.txt
View File

@ -323,6 +323,7 @@
option with care.
pgtbl_v1 - Use v1 page table for DMA-API (Default).
pgtbl_v2 - Use v2 page table for DMA-API.
irtcachedis - Disable Interrupt Remapping Table (IRT) caching.
amd_iommu_dump= [HW,X86-64]
Enable AMD IOMMU driver option to dump the ACPI table
@ -1597,6 +1598,26 @@
Format: off | on
default: on
gather_data_sampling=
[X86,INTEL] Control the Gather Data Sampling (GDS)
mitigation.
Gather Data Sampling is a hardware vulnerability which
allows unprivileged speculative access to data which was
previously stored in vector registers.
This issue is mitigated by default in updated microcode.
The mitigation may have a performance impact but can be
disabled. On systems without the microcode mitigation
disabling AVX serves as a mitigation.
force: Disable AVX to mitigate systems without
microcode mitigation. No effect if the microcode
mitigation is present. Known to cause crashes in
userspace with buggy AVX enumeration.
off: Disable GDS mitigation.
gcov_persist= [GCOV] When non-zero (default), profiling data for
kernel modules is saved and remains accessible via
debugfs, even when the module is unloaded/reloaded.
@ -3265,24 +3286,25 @@
Disable all optional CPU mitigations. This
improves system performance, but it may also
expose users to several CPU vulnerabilities.
Equivalent to: nopti [X86,PPC]
if nokaslr then kpti=0 [ARM64]
nospectre_v1 [X86,PPC]
nobp=0 [S390]
nospectre_v2 [X86,PPC,S390,ARM64]
spectre_v2_user=off [X86]
spec_store_bypass_disable=off [X86,PPC]
ssbd=force-off [ARM64]
nospectre_bhb [ARM64]
Equivalent to: if nokaslr then kpti=0 [ARM64]
gather_data_sampling=off [X86]
kvm.nx_huge_pages=off [X86]
l1tf=off [X86]
mds=off [X86]
tsx_async_abort=off [X86]
kvm.nx_huge_pages=off [X86]
srbds=off [X86,INTEL]
mmio_stale_data=off [X86]
no_entry_flush [PPC]
no_uaccess_flush [PPC]
mmio_stale_data=off [X86]
nobp=0 [S390]
nopti [X86,PPC]
nospectre_bhb [ARM64]
nospectre_v1 [X86,PPC]
nospectre_v2 [X86,PPC,S390,ARM64]
retbleed=off [X86]
spec_store_bypass_disable=off [X86,PPC]
spectre_v2_user=off [X86]
srbds=off [X86,INTEL]
ssbd=force-off [ARM64]
tsx_async_abort=off [X86]
Exceptions:
This does not have any effect on
@ -5801,6 +5823,17 @@
Not specifying this option is equivalent to
spectre_v2_user=auto.
spec_rstack_overflow=
[X86] Control RAS overflow mitigation on AMD Zen CPUs
off - Disable mitigation
microcode - Enable microcode mitigation only
safe-ret - Enable sw-only safe RET mitigation (default)
ibpb - Enable mitigation by issuing IBPB on
kernel entry
ibpb-vmexit - Issue IBPB only on VMEXIT
(cloud-specific mitigation)
spec_store_bypass_disable=
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
(Speculative Store Bypass vulnerability)
@ -6168,10 +6201,6 @@
-1: disable all critical trip points in all thermal zones
<degrees C>: override all critical trip points
thermal.nocrt= [HW,ACPI]
Set to disable actions on ACPI thermal zone
critical and hot trip points.
thermal.off= [HW,ACPI]
1: disable ACPI thermal control

4
Documentation/arm64/silicon-errata.rst
View File

@ -138,6 +138,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-500 | #841119,826419 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-600 | #1076982,1209401| N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-700 | #2268618,2812531| N/A |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
+----------------+-----------------+-----------------+-----------------------------+

1
Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
View File

@ -23,6 +23,7 @@ properties:
connector:
$ref: /schemas/connector/usb-connector.yaml#
unevaluatedProperties: false
ports:
$ref: /schemas/graph.yaml#/properties/ports

46
Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt
View File

@ -23,6 +23,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@51 {
@ -35,6 +38,26 @@ Example:
#gpio-cells = <2>;
};
sc16is752: sc16is752@53 {
compatible = "nxp,sc16is752";
reg = <0x53>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@54 {
compatible = "nxp,sc16is752";
reg = <0x54>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};
* spi as bus
Required properties:
@ -59,6 +82,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@0 {
@ -70,3 +96,23 @@ Example:
gpio-controller;
#gpio-cells = <2>;
};
sc16is752: sc16is752@1 {
compatible = "nxp,sc16is752";
reg = <1>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@2 {
compatible = "nxp,sc16is752";
reg = <2>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};

4
Documentation/scsi/scsi_mid_low_api.rst
View File

@ -1190,11 +1190,11 @@ Members of interest:
- pointer to scsi_device object that this command is
associated with.
resid
- an LLD should set this signed integer to the requested
- an LLD should set this unsigned integer to the requested
transfer length (i.e. 'request_bufflen') less the number
of bytes that are actually transferred. 'resid' is
preset to 0 so an LLD can ignore it if it cannot detect
underruns (overruns should be rare). If possible an LLD
underruns (overruns should not be reported). An LLD
should set 'resid' prior to invoking 'done'. The most
interesting case is data transfers from a SCSI target
device (e.g. READs) that underrun.

2
MAINTAINERS
View File

@ -6034,7 +6034,7 @@ S: Supported
F: Documentation/networking/devlink
F: include/net/devlink.h
F: include/uapi/linux/devlink.h
F: net/core/devlink.c
F: net/devlink/
DH ELECTRONICS IMX6 DHCOM BOARD SUPPORT
M: Christoph Niedermaier <cniedermaier@dh-electronics.com>

6
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 43
SUBLEVEL = 53
EXTRAVERSION =
NAME = Curry Ramen
@ -1356,7 +1356,7 @@ prepare0: archprepare
# All the preparing..
prepare: prepare0
ifdef CONFIG_RUST
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
$(Q)$(MAKE) $(build)=rust
endif
@ -1858,7 +1858,7 @@ $(DOC_TARGETS):
# "Is Rust available?" target
PHONY += rustavailable
rustavailable:
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v && echo "Rust is available!"
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh && echo "Rust is available!"
# Documentation target
#

82
android/abi_gki_aarch64.stg
View File

@ -62522,6 +62522,12 @@ member {
type_id: 0x6720d32f
offset: 11712
}
member {
id: 0x9ad71760
name: "compaction_in_progress"
type_id: 0x74d29cf1
offset: 17568
}
member {
id: 0x583d51cc
name: "companion_ports"
@ -91948,10 +91954,9 @@ member {
offset: 712
}
member {
id: 0xf667d80f
id: 0xf667dcee
name: "fullness_list"
type_id: 0xb8bf135c
offset: 64
}
member {
id: 0xfeb50ea0
@ -103779,12 +103784,6 @@ member {
type_id: 0x4585663f
offset: 320
}
member {
id: 0xad7c8a98
name: "index"
type_id: 0x4585663f
offset: 672
}
member {
id: 0xad7c8ba4
name: "index"
@ -103797,6 +103796,12 @@ member {
type_id: 0x4585663f
offset: 480
}
member {
id: 0xad7c8d2b
name: "index"
type_id: 0x4585663f
offset: 608
}
member {
id: 0xad7c8d72
name: "index"
@ -115578,6 +115583,12 @@ member {
type_id: 0xf313e71a
offset: 768
}
member {
id: 0x2d1fe43b
name: "lock"
type_id: 0xf313e71a
offset: 17536
}
member {
id: 0x2d1fe44c
name: "lock"
@ -123438,12 +123449,6 @@ member {
type_id: 0x2c8b0a9f
offset: 768
}
member {
id: 0xdb33fcdf
name: "migrate_lock"
type_id: 0xf4933b90
offset: 17536
}
member {
id: 0x8edaa968
name: "migrate_page"
@ -136400,10 +136405,10 @@ member {
type_id: 0xad7c0a89
}
member {
id: 0x7a226550
id: 0x7a226b7d
name: "objs_per_zspage"
type_id: 0x6720d32f
offset: 608
offset: 544
}
member {
id: 0x33953b25
@ -141342,10 +141347,10 @@ member {
bitsize: 1
}
member {
id: 0x338646f2
id: 0x338649f9
name: "pages_per_zspage"
type_id: 0x6720d32f
offset: 640
offset: 576
}
member {
id: 0xf9521fd2
@ -162158,6 +162163,12 @@ member {
type_id: 0x03913382
offset: 64
}
member {
id: 0x9a2ccf59
name: "resizing"
type_id: 0x74d29cf1
offset: 96
}
member {
id: 0x7f319b20
name: "resolution"
@ -173982,18 +173993,18 @@ member {
type_id: 0x6720d32f
offset: 96
}
member {
id: 0xd91935d3
name: "size"
type_id: 0x6720d32f
offset: 576
}
member {
id: 0xd9193607
name: "size"
type_id: 0x6720d32f
offset: 896
}
member {
id: 0xd91937b9
name: "size"
type_id: 0x6720d32f
offset: 512
}
member {
id: 0xd9193b66
name: "size"
@ -179931,10 +179942,10 @@ member {
offset: 896
}
member {
id: 0xb91e0d04
id: 0xb91e0940
name: "stats"
type_id: 0x6b61371d
offset: 704
offset: 640
}
member {
id: 0xb920e0d3
@ -249070,14 +249081,13 @@ struct_union {
kind: STRUCT
name: "size_class"
definition {
bytesize: 136
member_id: 0x2d1fec85
member_id: 0xf667d80f
member_id: 0xd91935d3
member_id: 0x7a226550
member_id: 0x338646f2
member_id: 0xad7c8a98
member_id: 0xb91e0d04
bytesize: 128
member_id: 0xf667dcee
member_id: 0xd91937b9
member_id: 0x7a226b7d
member_id: 0x338649f9
member_id: 0xad7c8d2b
member_id: 0xb91e0940
}
}
struct_union {
@ -255002,6 +255012,7 @@ struct_union {
member_id: 0x2d2d0138
member_id: 0xe7102ce7
member_id: 0x9fc7d460
member_id: 0x9a2ccf59
member_id: 0x3dac837e
member_id: 0xaa1570ba
member_id: 0xad8983a9
@ -265101,7 +265112,8 @@ struct_union {
member_id: 0xb9089225
member_id: 0x868caa9e
member_id: 0x8a67a9e5
member_id: 0xdb33fcdf
member_id: 0x2d1fe43b
member_id: 0x9ad71760
}
}
struct_union {

1
android/abi_gki_aarch64_db845c
View File

@ -523,6 +523,7 @@
param_ops_uint
pci_clear_master
pci_disable_device
pcie_capability_clear_and_set_word
pcie_capability_read_word
pcie_capability_write_word
pci_enable_device

3
arch/Kconfig
View File

@ -285,6 +285,9 @@ config ARCH_HAS_DMA_SET_UNCACHED
config ARCH_HAS_DMA_CLEAR_UNCACHED
bool
config ARCH_HAS_CPU_FINALIZE_INIT
bool
# Select if arch init_task must go in the __init_task_data section
config ARCH_TASK_STRUCT_ON_STACK
bool

20
arch/alpha/include/asm/bugs.h
View File

@ -1,20 +0,0 @@
/*
* include/asm-alpha/bugs.h
*
* Copyright (C) 1994 Linus Torvalds
*/
/*
* This is included by init/main.c to check for architecture-dependent bugs.
*
* Needs:
* void check_bugs(void);
*/
/*
* I don't know of any alpha bugs yet.. Nice chip
*/
static void check_bugs(void)
{
}

3
arch/alpha/kernel/setup.c
View File

@ -385,8 +385,7 @@ setup_memory(void *kernel_end)
#endif /* CONFIG_BLK_DEV_INITRD */
}
int __init
page_is_ram(unsigned long pfn)
int page_is_ram(unsigned long pfn)
{
struct memclust_struct * cluster;
struct memdesc_struct * memdesc;

1
arch/arm/Kconfig
View File

@ -5,6 +5,7 @@ config ARM
select ARCH_32BIT_OFF_T
select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE if HAVE_KRETPROBES && FRAME_POINTER && !ARM_UNWIND
select ARCH_HAS_BINFMT_FLAT
select ARCH_HAS_CPU_FINALIZE_INIT if MMU
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_HAS_DEBUG_VIRTUAL if MMU
select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE

8
arch/arm/boot/dts/Makefile
View File

@ -331,6 +331,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-iconnect.dtb \
kirkwood-iomega_ix2_200.dtb \
kirkwood-is2.dtb \
kirkwood-km_fixedeth.dtb \
kirkwood-km_kirkwood.dtb \
kirkwood-l-50.dtb \
kirkwood-laplug.dtb \
@ -861,7 +862,10 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
am3517-craneboard.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
logicpd-torpedo-35xx-devkit.dtb \
logicpd-torpedo-37xx-devkit.dtb \
logicpd-torpedo-37xx-devkit-28.dtb \
logicpd-som-lv-35xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
@ -1527,6 +1531,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-388-helios4.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_39X) += \
armada-390-db.dtb \
armada-395-gp.dtb \
armada-398-db.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
@ -1556,6 +1562,7 @@ dtb-$(CONFIG_MACH_DOVE) += \
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt2701-evb.dtb \
mt6580-evbp1.dtb \
mt6582-prestigio-pmt5008-3g.dtb \
mt6589-aquaris5.dtb \
mt6589-fairphone-fp1.dtb \
mt6592-evb.dtb \
@ -1608,6 +1615,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
aspeed-bmc-inspur-on5263m5.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \

13
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
View File

@ -46,3 +46,16 @@ button-restart {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

13
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
View File

@ -83,3 +83,16 @@ pcie0_chipcommon: chipcommon@0 {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

4
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View File

@ -135,8 +135,8 @@ port@4 {
label = "lan4";
};
port@5 {
reg = <5>;
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac0>;
};

5
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -127,6 +127,9 @@ uart0: serial@300 {
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
usb2: usb2@4000 {
@ -156,8 +159,6 @@ ehci_port2: port@2 {
};
ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

6
arch/arm/boot/dts/bcm947189acdbmr.dts
View File

@ -60,9 +60,9 @@ button-wps {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 21 0>;
gpio-miso = <&chipcommon 22 0>;
gpio-mosi = <&chipcommon 23 0>;
sck-gpios = <&chipcommon 21 0>;
miso-gpios = <&chipcommon 22 0>;
mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

2
arch/arm/boot/dts/imx50-kobo-aura.dts
View File

@ -26,7 +26,7 @@ gpio-leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
on {
led-on {
label = "kobo_aura:orange:on";
gpios = <&gpio6 24 GPIO_ACTIVE_LOW>;
panic-indicator;

10
arch/arm/boot/dts/imx53-cx9020.dts
View File

@ -86,27 +86,27 @@ tfp410_out: endpoint {
leds {
compatible = "gpio-leds";
pwr-r {
led-pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
led-pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
led-pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
led-sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
led-sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -52,13 +52,13 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&led_pin_gpio>;
user1 {
led-user1 {
label = "user1";
gpios = <&gpio2 8 0>;
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "user2";
gpios = <&gpio2 9 0>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx53-m53menlo.dts
View File

@ -34,19 +34,19 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "TestLed601";
gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
user2 {
led-user2 {
label = "TestLed602";
gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
eth {
led-eth {
label = "EthLedYe";
gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "netdev";

2
arch/arm/boot/dts/imx53-tx53.dtsi
View File

@ -94,7 +94,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stk5led>;
user {
led-user {
label = "Heartbeat";
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx53-usbarmory.dts
View File

@ -67,7 +67,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "LED";
gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi
View File

@ -211,17 +211,17 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_q7_gpio1 &pinctrl_q7_gpio3 &pinctrl_q7_gpio5>;
alarm1 {
led-alarm1 {
label = "alarm:red";
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
};
alarm2 {
led-alarm2 {
label = "alarm:yellow";
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
};
alarm3 {
led-alarm3 {
label = "alarm:blue";
gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx6dl-prtrvt.dts
View File

@ -124,6 +124,10 @@ &usbh1 {
status = "disabled";
};
&usbotg {
disable-over-current;
};
&vpu {
status = "disabled";
};

4
arch/arm/boot/dts/imx6dl-riotboard.dts
View File

@ -25,14 +25,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

6
arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
View File

@ -274,7 +274,7 @@ leds: led-controller@30 {
#address-cells = <1>;
#size-cells = <0>;
chan@0 {
led@0 {
chan-name = "R";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -282,7 +282,7 @@ chan@0 {
color = <LED_COLOR_ID_RED>;
};
chan@1 {
led@1 {
chan-name = "G";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -290,7 +290,7 @@ chan@1 {
color = <LED_COLOR_ID_GREEN>;
};
chan@2 {
led@2 {
chan-name = "B";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;

6
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -34,20 +34,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6q-h100.dts
View File

@ -76,19 +76,19 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_h100_leds>;
led0: power {
led0: led-power {
label = "power";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
led1: stream {
led1: led-stream {
label = "stream";
gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led2: rec {
led2: led-rec {
label = "rec";
gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
default-state = "off";

4
arch/arm/boot/dts/imx6q-kp.dtsi
View File

@ -66,14 +66,14 @@ lcd_panel_in: endpoint {
leds {
compatible = "gpio-leds";
green {
led-green {
label = "led1";
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
red {
led-red {
label = "led0";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";

4
arch/arm/boot/dts/imx6q-marsboard.dts
View File

@ -73,14 +73,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "imx6:green:user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "imx6:green:user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6q-tbs2910.dts
View File

@ -49,7 +49,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
blue {
led-blue {
label = "blue_status_led";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-emcon.dtsi
View File

@ -46,14 +46,14 @@ som_leds: leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_som_leds>;
green {
led-green {
label = "som:green";
gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
red {
led-red {
label = "som:red";
gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -80,20 +80,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
View File

@ -80,20 +80,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View File

@ -81,20 +81,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw551x.dtsi
View File

@ -115,7 +115,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
default-state = "on";

6
arch/arm/boot/dts/imx6qdl-gw552x.dtsi
View File

@ -72,20 +72,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw553x.dtsi
View File

@ -113,14 +113,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw560x.dtsi
View File

@ -139,20 +139,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw5903.dtsi
View File

@ -123,7 +123,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View File

@ -120,20 +120,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5907.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5910.dtsi
View File

@ -74,20 +74,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5912.dtsi
View File

@ -72,20 +72,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5913.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

10
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View File

@ -85,31 +85,31 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
j14-pin1 {
led-j14-pin1 {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pin3 {
led-j14-pin3 {
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pins8-9 {
led-j14-pins8-9 {
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin2 {
led-j46-pin2 {
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin3 {
led-j46-pin3 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View File

@ -181,13 +181,13 @@ i2c3mux@1 {
leds {
compatible = "gpio-leds";
speaker-enable {
led-speaker-enable {
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "off";
};
ttymxc4-rs232 {
led-ttymxc4-rs232 {
gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "on";

8
arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi
View File

@ -25,17 +25,17 @@ gpio_leds: leds {
pinctrl-0 = <&pinctrl_gpioleds>;
status = "disabled";
red {
led-red {
label = "phyboard-mira:red";
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
};
green {
led-green {
label = "phyboard-mira:green";
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
};
blue {
led-blue {
label = "phyboard-mira:blue";
gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
@ -182,7 +182,7 @@ i2c_rtc: rtc@68 {
pinctrl-0 = <&pinctrl_rtc_int>;
reg = <0x68>;
interrupt-parent = <&gpio7>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
status = "disabled";
};
};

4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -47,12 +47,12 @@ gpio_leds: leds {
pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
led_green: green {
led_green: led-green {
label = "phyflex:green";
gpios = <&gpio1 30 0>;
};
led_red: red {
led_red: led-red {
label = "phyflex:red";
gpios = <&gpio2 31 0>;
};

11
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
View File

@ -69,6 +69,7 @@ &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -78,10 +79,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6qdl-rex.dtsi
View File

@ -55,7 +55,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: usr {
led0: led-usr {
label = "usr";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View File

@ -21,7 +21,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
user {
led-user {
label = "debug";
gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
};

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -130,7 +130,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
red {
led-red {
gpios = <&gpio1 2 0>;
default-state = "on";
};

4
arch/arm/boot/dts/imx6qdl-ts7970.dtsi
View File

@ -73,13 +73,13 @@ blue-led {
default-state = "off";
};
en-usb-5v {
en-usb-5v-led {
label = "en-usb-5v";
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
sel_dc_usb {
sel-dc-usb-led {
label = "sel_dc_usb";
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View File

@ -92,7 +92,7 @@ power {
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_user_led>;

2
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -33,7 +33,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll-evk.dts
View File

@ -37,7 +37,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll.dtsi
View File

@ -552,7 +552,7 @@ usbphy2: usb-phy@20ca000 {
reg = <0x020ca000 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USBPHY2>;
phy-reg_3p0-supply = <&reg_3p0>;
phy-3p0-supply = <&reg_3p0>;
fsl,anatop = <&anatop>;
};

2
arch/arm/boot/dts/imx6sx-sabreauto.dts
View File

@ -20,7 +20,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

4
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
View File

@ -15,14 +15,14 @@ chosen {
leds {
compatible = "gpio-leds";
red {
led-red {
label = "udoo-neo:red:mmc";
gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
orange {
led-orange {
label = "udoo-neo:orange:user";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
default-state = "keep";

6
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -981,6 +981,8 @@ usdhc1: mmc@2190000 {
<&clks IMX6SX_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -993,6 +995,8 @@ usdhc2: mmc@2194000 {
<&clks IMX6SX_CLK_USDHC2>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -1005,6 +1009,8 @@ usdhc3: mmc@2198000 {
<&clks IMX6SX_CLK_USDHC3>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};

2
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
View File

@ -30,7 +30,7 @@ gpio_leds_som: leds {
pinctrl-0 = <&pinctrl_gpioleds_som>;
compatible = "gpio-leds";
phycore-green {
led-phycore-green {
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};

2
arch/arm/boot/dts/imx6ul-tx6ul.dtsi
View File

@ -131,7 +131,7 @@ ds1339: rtc@68 {
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;

6
arch/arm/boot/dts/imx7s.dtsi
View File

@ -1184,6 +1184,8 @@ usdhc1: mmc@30b40000 {
<&clks IMX7D_USDHC1_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1196,6 +1198,8 @@ usdhc2: mmc@30b50000 {
<&clks IMX7D_USDHC2_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1208,6 +1212,8 @@ usdhc3: mmc@30b60000 {
<&clks IMX7D_USDHC3_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};

9
arch/arm/boot/dts/qcom-ipq4019.dtsi
View File

@ -228,9 +228,12 @@ sdhci: mmc@7824900 {
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
bus-width = <8>;
clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_DCD_XO_CLK>;
clock-names = "iface", "core", "xo";
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo>;
clock-names = "iface",
"core",
"xo";
status = "disabled";
};

2
arch/arm/boot/dts/s3c6410-mini6410.dts
View File

@ -51,7 +51,7 @@ srom-cs1-bus@18000000 {
ethernet@18000000 {
compatible = "davicom,dm9000";
reg = <0x18000000 0x2 0x18000004 0x2>;
reg = <0x18000000 0x2>, <0x18000004 0x2>;
interrupt-parent = <&gpn>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
davicom,no-eeprom;

10
arch/arm/boot/dts/s5pv210-smdkv210.dts
View File

@ -41,7 +41,7 @@ pmic_ap_clk: clock-0 {
ethernet@a8000000 {
compatible = "davicom,dm9000";
reg = <0xA8000000 0x2 0xA8000002 0x2>;
reg = <0xa8000000 0x2>, <0xa8000002 0x2>;
interrupt-parent = <&gph1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
local-mac-address = [00 00 de ad be ef];
@ -55,6 +55,14 @@ backlight {
default-brightness-level = <6>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_out>;
power-supply = <&dc5v_reg>;
};
dc5v_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "DC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};

21
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
View File

@ -68,11 +68,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@dc000000 {
reg = <0xdc000000 0x4000000>;
no-map;
};
};
led: gpio_leds {
@ -102,9 +97,11 @@ &adc {
adc1: adc@0 {
pinctrl-names = "default";
pinctrl-0 = <&adc1_in6_pins_a>;
st,min-sample-time-nsecs = <5000>;
st,adc-channels = <6>;
status = "disabled";
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
};
};
adc2: adc@100 {
@ -173,7 +170,7 @@ &ethernet0 {
phy-handle = <&phy0>;
st,eth-ref-clk-sel;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
@ -183,10 +180,6 @@ phy0: ethernet-phy@0 {
};
};
&gpu {
contiguous-area = <&gpu_reserved>;
};
&hash1 {
status = "okay";
};
@ -375,8 +368,8 @@ &iwdg2 {
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
interrupt-names = "wdg";

2
arch/arm/boot/dts/stm32mp157c-ev1.dts
View File

@ -144,7 +144,7 @@ &ethernet0 {
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

2
arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
View File

@ -112,7 +112,7 @@ &ethernet0 {
phy-handle = <&ethphy>;
status = "okay";
mdio0 {
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

14
arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
View File

@ -62,11 +62,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@d4000000 {
reg = <0xd4000000 0x4000000>;
no-map;
};
};
led {
@ -80,11 +75,6 @@ led-blue {
};
};
&gpu {
contiguous-area = <&gpu_reserved>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
@ -240,8 +230,8 @@ &iwdg2 {
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";

2
arch/arm/boot/dts/stm32mp157c-odyssey.dts
View File

@ -41,7 +41,7 @@ &ethernet0 {
assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
st,eth-clk-sel;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

24
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@ -80,17 +80,19 @@ &adc {
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
};
adc1: adc@0 {
st,min-sample-time-nsecs = <5000>;
st,adc-channels = <0>;
status = "okay";
&adc1 {
channel@0 {
reg = <0>;
st,min-sample-time-ns = <5000>;
};
};
adc2: adc@100 {
st,adc-channels = <1>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
&adc2 {
channel@1 {
reg = <1>;
st,min-sample-time-ns = <5000>;
};
};
@ -125,7 +127,7 @@ &ethernet0 {
max-speed = <100>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
@ -414,8 +416,8 @@ &iwdg2 {
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";

40
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
View File

@ -112,17 +112,39 @@ &adc {
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
};
adc1: adc@0 {
st,adc-channels = <0 1 6>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
&adc1 {
channel@0 {
reg = <0>;
st,min-sample-time-ns = <5000>;
};
adc2: adc@100 {
st,adc-channels = <0 1 2>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
channel@1 {
reg = <1>;
st,min-sample-time-ns = <5000>;
};
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
};
};
&adc2 {
channel@0 {
reg = <0>;
st,min-sample-time-ns = <5000>;
};
channel@1 {
reg = <1>;
st,min-sample-time-ns = <5000>;
};
channel@2 {
reg = <2>;
st,min-sample-time-ns = <5000>;
};
};
@ -151,7 +173,7 @@ &ethernet0 {
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

2
arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi
View File

@ -78,7 +78,7 @@ &ethernet0 {
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

2
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@ -141,7 +141,7 @@ &ethernet0 {
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

4
arch/arm/include/asm/bugs.h
View File

@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* arch/arm/include/asm/bugs.h
*
* Copyright (C) 1995-2003 Russell King
*/
#ifndef __ASM_BUGS_H
@ -10,10 +8,8 @@
extern void check_writebuffer_bugs(void);
#ifdef CONFIG_MMU
extern void check_bugs(void);
extern void check_other_bugs(void);
#else
#define check_bugs() do { } while (0)
#define check_other_bugs() do { } while (0)
#endif

3
arch/arm/include/asm/syscall.h
View File

@ -25,6 +25,9 @@ static inline int syscall_get_nr(struct task_struct *task,
if (IS_ENABLED(CONFIG_AEABI) && !IS_ENABLED(CONFIG_OABI_COMPAT))
return task_thread_info(task)->abi_syscall;
if (task_thread_info(task)->abi_syscall == -1)
return -1;
return task_thread_info(task)->abi_syscall & __NR_SYSCALL_MASK;
}

3
arch/arm/kernel/bugs.c
View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/init.h>
#include <linux/cpu.h>
#include <asm/bugs.h>
#include <asm/proc-fns.h>
@ -11,7 +12,7 @@ void check_other_bugs(void)
#endif
}
void __init check_bugs(void)
void __init arch_cpu_finalize_init(void)
{
check_writebuffer_bugs();
check_other_bugs();

1
arch/arm/kernel/entry-common.S
View File

@ -103,6 +103,7 @@ slow_work_pending:
cmp r0, #0
beq no_work_pending
movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE)
str scno, [tsk, #TI_ABI_SYSCALL] @ make sure tracers see update
ldmia sp, {r0 - r6} @ have to reload r0 - r6
b local_restart @ ... and off we go
ENDPROC(ret_fast_syscall)

2
arch/arm/kernel/module-plts.c
View File

@ -256,7 +256,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
/* sort by type and symbol index */
sort(rels, numrels, sizeof(Elf32_Rel), cmp_rel, NULL);
if (strncmp(secstrings + dstsec->sh_name, ".init", 5) != 0)
if (!module_init_layout_section(secstrings + dstsec->sh_name))
core_plts += count_plts(syms, dstsec->sh_addr, rels,
numrels, s->sh_info);
else

5
arch/arm/kernel/ptrace.c
View File

@ -785,8 +785,9 @@ long arch_ptrace(struct task_struct *child, long request,
break;
case PTRACE_SET_SYSCALL:
task_thread_info(child)->abi_syscall = data &
__NR_SYSCALL_MASK;
if (data != -1)
data &= __NR_SYSCALL_MASK;
task_thread_info(child)->abi_syscall = data;
ret = 0;
break;

2
arch/arm/mach-omap2/powerdomain.c
View File

@ -174,7 +174,7 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
break;
case PWRDM_STATE_PREV:
prev = pwrdm_read_prev_pwrst(pwrdm);
if (pwrdm->state != prev)
if (prev >= 0 && pwrdm->state != prev)
pwrdm->state_counter[prev]++;
if (prev == PWRDM_POWER_RET)
_update_logic_membank_counters(pwrdm);

2
arch/arm/mach-pxa/sharpsl_pm.c
View File

@ -220,8 +220,6 @@ void sharpsl_battery_kick(void)
{
schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
}
EXPORT_SYMBOL(sharpsl_battery_kick);
static void sharpsl_battery_thread(struct work_struct *private_)
{

14
arch/arm/mach-pxa/spitz.c
View File

@ -9,7 +9,6 @@
*/
#include <linux/kernel.h>
#include <linux/module.h> /* symbol_get ; symbol_put */
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio_keys.h>
@ -510,17 +509,6 @@ static struct ads7846_platform_data spitz_ads7846_info = {
.wait_for_sync = spitz_ads7846_wait_for_hsync,
};
static void spitz_bl_kick_battery(void)
{
void (*kick_batt)(void);
kick_batt = symbol_get(sharpsl_battery_kick);
if (kick_batt) {
kick_batt();
symbol_put(sharpsl_battery_kick);
}
}
static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
@ -548,7 +536,7 @@ static struct corgi_lcd_platform_data spitz_lcdcon_info = {
.max_intensity = 0x2f,
.default_intensity = 0x1f,
.limit_mask = 0x0b,
.kick_battery = spitz_bl_kick_battery,
.kick_battery = sharpsl_battery_kick,
};
static struct spi_board_info spitz_spi_devices[] = {

2
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -128,7 +128,7 @@ &i2c1 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";

2
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
View File

@ -141,7 +141,7 @@ &i2c2 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";

2
arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
View File

@ -141,7 +141,7 @@ can0: can@0 {
};
&gpio1 {
gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT",
gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT",
"", "", "", "RESET_ETHPHY",
"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";

4
arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
View File

@ -111,7 +111,7 @@ som_flash: flash@0 {
};
&gpio1 {
gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",
gpio-line-names = "", "", "WDOG_INT", "X_RTC_INT",
"", "", "", "RESET_ETHPHY",
"", "", "nENABLE_FLATLINK";
};
@ -210,7 +210,7 @@ regulator-state-mem {
};
};
reg_vdd_gpu: buck3 {
reg_vdd_vpu: buck3 {
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <1000000>;

4
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
View File

@ -559,6 +559,10 @@ &pcie0 {
status = "okay";
};
&disp_blk_ctrl {
status = "disabled";
};
&pgc_mipi {
status = "disabled";
};

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