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drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix

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[ Upstream commit cd2e31a9ab93d13c412a36c6e26811e0f830985b ]

The same parade TCON issue can potentially happen on Phoenix, and the same
PSR resilience changes have been ported into the DMUB firmware.

Don't allow running PSR-SU unless on the newer firmware.

Cc: stable@vger.kernel.org
Cc: Sean Wang <sean.ns.wang@amd.com>
Cc: Marc Rossi <Marc.Rossi@amd.com>
Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com>
Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Mario Limonciello 2023-06-23 10:05:21 -05:00 committed by Greg Kroah-Hartman
parent f8b61a2c29
commit 76fcfc6ae3
3 changed files with 8 additions and 0 deletions
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5
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c
View File

@ -60,3 +60,8 @@ const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs = {
{ DMUB_DCN31_FIELDS() }, { DMUB_DCN31_FIELDS() },
#undef DMUB_SF #undef DMUB_SF
}; };
bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub)
{
return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16);
}

2
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h
View File

@ -30,4 +30,6 @@
extern const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs; extern const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs;
bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub);
#endif /* _DMUB_DCN314_H_ */ #endif /* _DMUB_DCN314_H_ */

1
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
View File

@ -229,6 +229,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
case DMUB_ASIC_DCN316: case DMUB_ASIC_DCN316:
if (asic == DMUB_ASIC_DCN314) { if (asic == DMUB_ASIC_DCN314) {
dmub->regs_dcn31 = &dmub_srv_dcn314_regs; dmub->regs_dcn31 = &dmub_srv_dcn314_regs;
funcs->is_psrsu_supported = dmub_dcn314_is_psrsu_supported;
} else if (asic == DMUB_ASIC_DCN315) { } else if (asic == DMUB_ASIC_DCN315) {
dmub->regs_dcn31 = &dmub_srv_dcn315_regs; dmub->regs_dcn31 = &dmub_srv_dcn315_regs;
} else if (asic == DMUB_ASIC_DCN316) { } else if (asic == DMUB_ASIC_DCN316) {