spi: spi-msm-geni: Add SPI GENI driver snapshot for pineapple

This is a snapshot of SPI GENI driver and associated files
as of msm-5.15 'commit 086bf6b97b ("msm: spi: spi-msm-geni:
update icc bw voting values")'.

Change-Id: Idf37d8716d9619384bbb9de550b77f71645fa25f
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>

drivers/spi/Kconfig

@@ -815,6 +815,18 @@ config SPI_QCOM_GENI
 	  This driver can also be built as a module.  If so, the module
 	  will be called spi-geni-qcom.
 
+config SPI_MSM_GENI
+	tristate "Qualcomm Technologies Inc.'s GENI based SPI controller"
+	depends on QCOM_GENI_SE
+	help
+	  This driver supports GENI serial engine based SPI controller in
+	  master mode on the Qualcomm Technologies Inc.'s SoCs. If you say
+	  yes to this option, support will be included for the built-in SPI
+	  interface on the Qualcomm Technologies Inc.'s SoCs.
+
+	  This driver can also be built as a module.  If so, the module
+	  will be called spi-msm-geni.
+
 config SPI_S3C24XX
 	tristate "Samsung S3C24XX series SPI"
 	depends on ARCH_S3C24XX

drivers/spi/Makefile

@@ -101,6 +101,7 @@ spi-pxa2xx-platform-objs		:= spi-pxa2xx.o spi-pxa2xx-dma.o
 obj-$(CONFIG_SPI_PXA2XX)		+= spi-pxa2xx-platform.o
 obj-$(CONFIG_SPI_PXA2XX_PCI)		+= spi-pxa2xx-pci.o
 obj-$(CONFIG_SPI_QCOM_GENI)		+= spi-geni-qcom.o
+obj-$(CONFIG_SPI_MSM_GENI)		+= spi-msm-geni.o
 obj-$(CONFIG_SPI_QCOM_QSPI)		+= spi-qcom-qspi.o
 obj-$(CONFIG_SPI_QUP)			+= spi-qup.o
 obj-$(CONFIG_SPI_ROCKCHIP)		+= spi-rockchip.o

drivers/spi/spi-qup-trace.h

@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM qup_spi_trace
+
+#if !defined(_TRACE_SPI_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_SPI_TRACE_H
+
+#include <linux/ktime.h>
+#include <linux/tracepoint.h>
+
+#define MAX_MSG_LEN 256
+
+TRACE_EVENT(spi_log_info,
+
+		TP_PROTO(const char *name, struct va_format *vaf),
+
+		TP_ARGS(name, vaf),
+
+		TP_STRUCT__entry(
+				__string(name, name)
+				__dynamic_array(char, msg, MAX_MSG_LEN)
+		),
+
+		TP_fast_assign(
+			__assign_str(name, name);
+			WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+									MAX_MSG_LEN, vaf->fmt,
+									*vaf->va) >= MAX_MSG_LEN);
+		),
+
+		TP_printk("%s: %s", __get_str(name), __get_str(msg))
+);
+
+#endif /* _TRACE_SPI_TRACE_H */
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#define TRACE_INCLUDE_FILE spi-qup-trace
+#include <trace/define_trace.h>
+

include/linux/qcom-geni-se-common.h

@@ -39,6 +39,17 @@ if (print) { \
 } \
 } while (0)
 
+#define DEFAULT_BUS_WIDTH	(4)
+
+/* In KHz */
+#define DEFAULT_SE_CLK	19200
+#define SPI_CORE2X_VOTE	100000
+#define I2C_CORE2X_VOTE	19200
+#define I3C_CORE2X_VOTE	19200
+#define UART_CORE2X_VOTE	100000
+#define UART_CONSOLE_CORE2X_VOTE	19200
+#define APPS_PROC_TO_QUP_VOTE	76800
+/* SE_DMA_GENERAL_CFG */
 #define SE_DMA_DEBUG_REG0		(0xE40)
 
 #define SE_DMA_TX_PTR_L			(0xC30)

include/linux/qcom-geni-se.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef _LINUX_QCOM_GENI_SE
@@ -35,6 +36,7 @@ enum geni_se_protocol_type {
 	GENI_SE_UART,
 	GENI_SE_I2C,
 	GENI_SE_I3C,
+	GENI_SE_SPI_SLAVE,
 };
 
 struct geni_wrapper;
@@ -73,6 +75,7 @@ struct geni_se {
 
 /* Common SE registers */
 #define GENI_FORCE_DEFAULT_REG		0x20
+#define GENI_OUTPUT_CTRL		0x24
 #define SE_GENI_STATUS			0x40
 #define GENI_SER_M_CLK_CFG		0x48
 #define GENI_SER_S_CLK_CFG		0x4c
@@ -106,6 +109,7 @@ struct geni_se {
 #define SE_DMA_RX_FSM_RST		0xd58
 #define SE_HW_PARAM_0			0xe24
 #define SE_HW_PARAM_1			0xe28
+#define START_TRIGGER			(BIT(0))
 
 /* GENI_FORCE_DEFAULT_REG fields */
 #define FORCE_DEFAULT	BIT(0)