diff --git a/Readme.md b/Readme.md
index f9ee01abc5d5..aac10fc00b5b 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,7 +1,7 @@
 # Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
-Release Date: 22 Dec 2022
+Release Date: 09 May 2023
 
-Release Version: V_01-00-58 : Limited-tested version
+Release Version: V_01-00-59 : Limited-tested version
 
 TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
 
@@ -284,12 +284,13 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
 
 18. Use the below command to insert the kernel module for SW reset during link down.
 
-	#insmod tc956x_pcie_eth.ko mac0_link_down_macrst=x mac1_link_down_macrst=x
+	#insmod tc956x_pcie_eth.ko mac0_link_down_macrst=x mac1_link_down_macrst=y
 
 	argument info:
 		mac0_link_down_macrst: For PORT0
+		x = [0: DISABLE, 1: ENABLE (default)]
 		mac1_link_down_macrst: For PORT1
-		x = [0: DISABLE (default), 1: ENABLE]
+		y = [0: DISABLE (default), 1: ENABLE]
 
 	If invalid values are passed as kernel module parameter, the default value will be selected.
 
@@ -561,3 +562,6 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
 ## TC956X_Host_Driver_20221222_V_01-00-58:
 1. Support for SW reset during link down.
 2. Module parameters introduced for the control of SW reset and by default SW reset is disabled.
+
+## TC956X_Host_Driver_20230509_V_01-00-59:
+1. Module parameters for SW reset (during link change) enabled by default for Port0.
diff --git a/tc956x_pci.c b/tc956x_pci.c
index 70a72f6fb411..a846b24d16b2 100644
--- a/tc956x_pci.c
+++ b/tc956x_pci.c
@@ -177,8 +177,11 @@
  *  09 Nov 2022 : 1. Version update 
  *  VERSION     : 01-00-57
  *  22 Dec 2022 : 1. Version update
-                  2. Module parameters introduced for the control of SW reset and by default SW reset is disabled.
+ *                2. Module parameters introduced for the control of SW reset and by default SW reset is disabled.
  *  VERSION     : 01-00-58
+ *  09 May 2023 : 1. Version update
+ *                2. Module parameters to control SW reset (during link change) enabled by default for Port0.
+ *  VERSION     : 01-00-59
  */
 
 #include <linux/clk-provider.h>
@@ -239,7 +242,7 @@ static unsigned int mac1_rxq1_rfd = 24;
 static unsigned int mac1_rxq1_rfa = 24;
 static unsigned int mac1_txq0_size = TX_QUEUE0_SIZE;
 static unsigned int mac1_txq1_size = TX_QUEUE1_SIZE;
-unsigned int mac0_link_down_macrst = DISABLE;
+unsigned int mac0_link_down_macrst = ENABLE;
 unsigned int mac1_link_down_macrst = DISABLE;
 
 unsigned int mac0_en_lp_pause_frame_cnt = DISABLE;
@@ -247,7 +250,7 @@ unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
 
 unsigned int mac_power_save_at_link_down = DISABLE;
 
-static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5,8};
+static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5, 9};
 
 static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
 struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
@@ -3700,7 +3703,7 @@ MODULE_PARM_DESC(mac_power_save_at_link_down,
 
 module_param(mac0_link_down_macrst, uint, 0444);
 MODULE_PARM_DESC(mac0_link_down_macrst,
-		 "MAC0 reset for PHY Clock loss during Link Down - default is 0,\
+		 "MAC0 reset for PHY Clock loss during Link Down - default is 1,\
 		 [0: DISABLE, 1: ENABLE]");
 
 module_param(mac1_link_down_macrst, uint, 0444);
diff --git a/tc956xmac.h b/tc956xmac.h
index 50f58f28204b..123c92cb8eec 100644
--- a/tc956xmac.h
+++ b/tc956xmac.h
@@ -168,8 +168,10 @@
  *  09 Nov 2022 : 1. Version update 
  *  VERSION     : 01-00-57
  *  22 Dec 2022 : 1. Support for SW reset during link down.
-                  2. Version update
+ *                2. Version update
  *  VERSION     : 01-00-58
+ *  09 May 2023 : 1. Version update 
+ *  VERSION     : 01-00-59
  */
 
 #ifndef __TC956XMAC_H__
@@ -225,7 +227,7 @@
 #define IRQ_DEV_NAME(x)		(((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
 #define WOL_IRQ_DEV_NAME(x)	(((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
 
-#define DRV_MODULE_VERSION	"V_01-00-58"
+#define DRV_MODULE_VERSION	"V_01-00-59"
 #define TC956X_FW_MAX_SIZE	(64*1024)
 
 #define ATR_AXI4_SLV_BASE		0x0800