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drivers: perf: qcom_llcc_pmu: Use physical CPU ID to access LLCC PMU

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There can be cases where logical to physical CPUs may not be 1:1 mapping.
Use physical CPU IDs instead of logical to read/write LLCC PMU registers.

Change-Id: I2fe549826bdbfa33055d176b2763617a6b775986
Signed-off-by: Vandana Gupta <quic_vandgupt@quicinc.com>
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
This commit is contained in:
Vandana Gupta 2023-06-30 22:13:19 +05:30 committed by Shivnandan Kumar
parent 118ddfb391
commit 639b46f69e
1 changed files with 23 additions and 2 deletions
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25
drivers/perf/qcom_llcc_pmu.c
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@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/of.h>
@ -16,6 +16,7 @@
#include <linux/spinlock.h>
#include <linux/ktime.h>
#include <soc/qcom/qcom_llcc_pmu.h>
static uint32_t phys_cpu[NR_CPUS];
enum llcc_pmu_version {
LLCC_PMU_VER1 = 1,
@ -64,6 +65,7 @@ EXPORT_SYMBOL(qcom_llcc_pmu_hw_type);
static void mon_disable(int cpu)
{
u32 reg;
cpu = phys_cpu[cpu];
if (!llccpmu->ver) {
pr_err("LLCCPMU version not correct\n");
@ -84,9 +86,12 @@ static void mon_disable(int cpu)
static void mon_clear(int cpu)
{
int clear_bit = CLEAR_POS + cpu;
int clear_bit;
u32 reg;
cpu = phys_cpu[cpu];
clear_bit = CLEAR_POS + cpu;
if (!llccpmu->ver) {
pr_err("LLCCPMU version not correct\n");
return;
@ -109,6 +114,7 @@ static void mon_clear(int cpu)
static void mon_enable(int cpu)
{
u32 reg;
cpu = phys_cpu[cpu];
if (!llccpmu->ver) {
pr_err("LLCCPMU version not correct\n");
@ -130,6 +136,7 @@ static void mon_enable(int cpu)
static unsigned long read_cnt(int cpu)
{
unsigned long value;
cpu = phys_cpu[cpu];
if (!llccpmu->ver) {
pr_err("LLCCPMU version not correct\n");
@ -254,10 +261,18 @@ static void qcom_llcc_event_del(struct perf_event *event, int flags)
raw_spin_unlock(&users_lock);
}
static void get_mpidr_cpu(void *cpu)
{
u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
*((uint32_t *)cpu) = MPIDR_AFFINITY_LEVEL(mpidr, 1);
}
static int qcom_llcc_pmu_probe(struct platform_device *pdev)
{
struct resource *res;
int ret;
uint32_t cpu, pcpu;
if (llccpmu) {
dev_err(&pdev->dev, "Only one LLCC PMU allowed!\n");
@ -300,6 +315,12 @@ static int qcom_llcc_pmu_probe(struct platform_device *pdev)
if (ret < 0)
dev_err(&pdev->dev, "Failed to register LLCC PMU (%d)\n", ret);
for_each_possible_cpu(cpu) {
smp_call_function_single(cpu, get_mpidr_cpu,
&pcpu, true);
phys_cpu[cpu] = pcpu;
}
dev_info(&pdev->dev, "Registered llcc_pmu, type: %d\n",
llccpmu->pmu.type);