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icc: dt-bindings: Add apps_noc, cnoc_data, pimem, gic master IDs for VOLCANO

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Added qnm_apps_noc, xm_gic, qxm_pimem and qnm_cnoc_data master
IDs to topolgy for programming qos.

Change-Id: Ib3ad7576c7f7c3522e7a61c96e1c5141204aa816
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
This commit is contained in:
Raviteja Laggyshetty 2024-03-29 18:15:53 +05:30
parent d9bcd54a00
commit 62a00731eb
1 changed files with 70 additions and 64 deletions
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134
include/dt-bindings/interconnect/qcom,volcano.h
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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_VOLCANO_H #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_VOLCANO_H
@ -16,40 +16,45 @@
#define MASTER_QUP_1 7 #define MASTER_QUP_1 7
#define MASTER_A1NOC_SNOC 8 #define MASTER_A1NOC_SNOC 8
#define MASTER_A2NOC_SNOC 9 #define MASTER_A2NOC_SNOC 9
#define MASTER_CAMNOC_HF 10 #define MASTER_APSS_NOC 10
#define MASTER_CAMNOC_ICP 11 #define MASTER_CAMNOC_HF 11
#define MASTER_CAMNOC_SF 12 #define MASTER_CAMNOC_ICP 12
#define MASTER_GEM_NOC_CNOC 13 #define MASTER_CAMNOC_SF 13
#define MASTER_GEM_NOC_PCIE_SNOC 14 #define MASTER_CNOC_SNOC 14
#define MASTER_GFX3D 15 #define MASTER_GEM_NOC_CNOC 15
#define MASTER_LPASS_GEM_NOC 16 #define MASTER_GEM_NOC_PCIE_SNOC 16
#define MASTER_MDP 17 #define MASTER_GFX3D 17
#define MASTER_MSS_PROC 18 #define MASTER_LPASS_GEM_NOC 18
#define MASTER_MNOC_HF_MEM_NOC 19 #define MASTER_MDP 19
#define MASTER_MNOC_SF_MEM_NOC 20 #define MASTER_MSS_PROC 20
#define MASTER_COMPUTE_NOC 21 #define MASTER_MNOC_HF_MEM_NOC 21
#define MASTER_ANOC_PCIE_GEM_NOC 22 #define MASTER_MNOC_SF_MEM_NOC 22
#define MASTER_SNOC_SF_MEM_NOC 23 #define MASTER_COMPUTE_NOC 23
#define MASTER_VIDEO 24 #define MASTER_ANOC_PCIE_GEM_NOC 24
#define MASTER_CNOC_CFG 25 #define MASTER_SNOC_GC_MEM_NOC 25
#define MASTER_CNOC_MNOC_HF_CFG 26 #define MASTER_SNOC_SF_MEM_NOC 26
#define MASTER_PCIE_ANOC_CFG 27 #define MASTER_VIDEO 27
#define MASTER_CNOC_MNOC_SF_CFG 28 #define MASTER_CNOC_CFG 28
#define MASTER_QUP_CORE_0 29 #define MASTER_CNOC_MNOC_HF_CFG 29
#define MASTER_QUP_CORE_1 30 #define MASTER_PCIE_ANOC_CFG 30
#define MASTER_CRYPTO 31 #define MASTER_CNOC_MNOC_SF_CFG 31
#define MASTER_IPA 32 #define MASTER_QUP_CORE_0 32
#define MASTER_LPASS_PROC 33 #define MASTER_QUP_CORE_1 33
#define MASTER_CDSP_PROC 34 #define MASTER_CRYPTO 34
#define MASTER_WLAN_Q6 35 #define MASTER_IPA 35
#define MASTER_PCIE_0 36 #define MASTER_LPASS_PROC 36
#define MASTER_PCIE_1 37 #define MASTER_CDSP_PROC 37
#define MASTER_QDSS_ETR 38 #define MASTER_PIMEM 38
#define MASTER_QDSS_ETR_1 39 #define MASTER_WLAN_Q6 39
#define MASTER_SDCC_1 40 #define MASTER_GIC 40
#define MASTER_SDCC_2 41 #define MASTER_PCIE_0 41
#define MASTER_UFS_MEM 42 #define MASTER_PCIE_1 42
#define MASTER_USB3_0 43 #define MASTER_QDSS_ETR 43
#define MASTER_QDSS_ETR_1 44
#define MASTER_SDCC_1 45
#define MASTER_SDCC_2 46
#define MASTER_UFS_MEM 47
#define MASTER_USB3_0 48
#define SLAVE_EBI1 512 #define SLAVE_EBI1 512
#define SLAVE_AHB2PHY_SOUTH 513 #define SLAVE_AHB2PHY_SOUTH 513
#define SLAVE_AHB2PHY_NORTH 514 #define SLAVE_AHB2PHY_NORTH 514
@ -89,35 +94,36 @@
#define SLAVE_A1NOC_SNOC 548 #define SLAVE_A1NOC_SNOC 548
#define SLAVE_A2NOC_SNOC 549 #define SLAVE_A2NOC_SNOC 549
#define SLAVE_GEM_NOC_CNOC 550 #define SLAVE_GEM_NOC_CNOC 550
#define SLAVE_SNOC_GEM_NOC_SF 551 #define SLAVE_SNOC_GEM_NOC_GC 551
#define SLAVE_LLCC 552 #define SLAVE_SNOC_GEM_NOC_SF 552
#define SLAVE_LPASS_GEM_NOC 553 #define SLAVE_LLCC 553
#define SLAVE_MNOC_HF_MEM_NOC 554 #define SLAVE_LPASS_GEM_NOC 554
#define SLAVE_MNOC_SF_MEM_NOC 555 #define SLAVE_MNOC_HF_MEM_NOC 555
#define SLAVE_CDSP_MEM_NOC 556 #define SLAVE_MNOC_SF_MEM_NOC 556
#define SLAVE_MEM_NOC_PCIE_SNOC 557 #define SLAVE_CDSP_MEM_NOC 557
#define SLAVE_ANOC_PCIE_GEM_NOC 558 #define SLAVE_MEM_NOC_PCIE_SNOC 558
#define SLAVE_APPSS 559 #define SLAVE_ANOC_PCIE_GEM_NOC 559
#define SLAVE_CNOC_CFG 560 #define SLAVE_APPSS 560
#define SLAVE_DDRSS_CFG 561 #define SLAVE_CNOC_CFG 561
#define SLAVE_CNOC_MNOC_HF_CFG 562 #define SLAVE_DDRSS_CFG 562
#define SLAVE_CNOC_MNOC_SF_CFG 563 #define SLAVE_CNOC_MNOC_HF_CFG 563
#define SLAVE_NSP_QTB_CFG 564 #define SLAVE_CNOC_MNOC_SF_CFG 564
#define SLAVE_PCIE_ANOC_CFG 565 #define SLAVE_NSP_QTB_CFG 565
#define SLAVE_WLAN_Q6_THROTTLE_CFG 566 #define SLAVE_PCIE_ANOC_CFG 566
#define SLAVE_QUP_CORE_0 567 #define SLAVE_WLAN_Q6_THROTTLE_CFG 567
#define SLAVE_QUP_CORE_1 568 #define SLAVE_QUP_CORE_0 568
#define SLAVE_IMEM 569 #define SLAVE_QUP_CORE_1 569
#define SLAVE_PIMEM 570 #define SLAVE_IMEM 570
#define SLAVE_SERVICE_CNOC_CFG 571 #define SLAVE_PIMEM 571
#define SLAVE_SERVICE_CNOC 572 #define SLAVE_SERVICE_CNOC_CFG 572
#define SLAVE_SERVICE_MNOC_HF 573 #define SLAVE_SERVICE_CNOC 573
#define SLAVE_SERVICE_MNOC_SF 574 #define SLAVE_SERVICE_MNOC_HF 574
#define SLAVE_SERVICE_PCIE_ANOC 575 #define SLAVE_SERVICE_MNOC_SF 575
#define SLAVE_PCIE_0 576 #define SLAVE_SERVICE_PCIE_ANOC 576
#define SLAVE_PCIE_1 577 #define SLAVE_PCIE_0 577
#define SLAVE_QDSS_STM 578 #define SLAVE_PCIE_1 578
#define SLAVE_TCU 579 #define SLAVE_QDSS_STM 579
#define SLAVE_TCU 580
#define MASTER_LLCC_DISP 1000 #define MASTER_LLCC_DISP 1000
#define MASTER_MDP_DISP 1001 #define MASTER_MDP_DISP 1001
#define MASTER_MNOC_HF_MEM_NOC_DISP 1002 #define MASTER_MNOC_HF_MEM_NOC_DISP 1002