arm64: Fix compat register mappings
For reasons not entirely apparent, but now enshrined in history, the architectural mapping of AArch32 banked registers to AArch64 registers actually orders SP_<mode> and LR_<mode> backwards compared to the intuitive r13/r14 order, for all modes except FIQ. Fix the compat_<reg>_<mode> macros accordingly, in the hope of avoiding subtle bugs with KVM and AArch32 guests. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -83,14 +83,14 @@
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#define compat_sp regs[13]
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#define compat_lr regs[14]
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#define compat_sp_hyp regs[15]
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#define compat_sp_irq regs[16]
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#define compat_lr_irq regs[17]
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#define compat_sp_svc regs[18]
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#define compat_lr_svc regs[19]
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#define compat_sp_abt regs[20]
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#define compat_lr_abt regs[21]
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#define compat_sp_und regs[22]
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#define compat_lr_und regs[23]
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#define compat_lr_irq regs[16]
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#define compat_sp_irq regs[17]
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#define compat_lr_svc regs[18]
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#define compat_sp_svc regs[19]
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#define compat_lr_abt regs[20]
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#define compat_sp_abt regs[21]
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#define compat_lr_und regs[22]
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#define compat_sp_und regs[23]
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#define compat_r8_fiq regs[24]
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#define compat_r9_fiq regs[25]
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#define compat_r10_fiq regs[26]
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