drm/qxl: fix qxl can't use in arm64
qxl use ioremap to map ram_header and rom, in the arm64 implementation, the device is mapped as DEVICE_nGnRE, it can not support unaligned access. and qxl is a virtual device, it can be treated more like RAM than actual MMIO registers. use ioremap_wc() replace it. Signed-off-by: Cong Liu <liucong2@kylinos.cn> Acked-by: Christian König <christian.koenig@amd.com> Link: http://patchwork.freedesktop.org/patch/msgid/20220324104928.2959545-1-liucong2@kylinos.cn Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -165,7 +165,7 @@ int qxl_device_init(struct qxl_device *qdev,
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(int)qdev->surfaceram_size / 1024,
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(sb == 4) ? "64bit" : "32bit");
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qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
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qdev->rom = ioremap_wc(qdev->rom_base, qdev->rom_size);
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if (!qdev->rom) {
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pr_err("Unable to ioremap ROM\n");
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r = -ENOMEM;
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@ -183,7 +183,7 @@ int qxl_device_init(struct qxl_device *qdev,
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goto rom_unmap;
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}
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qdev->ram_header = ioremap(qdev->vram_base +
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qdev->ram_header = ioremap_wc(qdev->vram_base +
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qdev->rom->ram_header_offset,
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sizeof(*qdev->ram_header));
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if (!qdev->ram_header) {
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@ -82,13 +82,13 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev,
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case TTM_PL_VRAM:
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mem->bus.is_iomem = true;
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mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base;
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mem->bus.caching = ttm_cached;
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mem->bus.caching = ttm_write_combined;
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break;
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case TTM_PL_PRIV:
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mem->bus.is_iomem = true;
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mem->bus.offset = (mem->start << PAGE_SHIFT) +
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qdev->surfaceram_base;
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mem->bus.caching = ttm_cached;
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mem->bus.caching = ttm_write_combined;
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break;
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default:
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return -EINVAL;
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