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i2c: i2c-msm-geni: Add error bits to handle error inside ISR

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Right now ISR is handling the respective Error bits but it's missing
to handle primary check to enter into the condition before handling
the error.

This change adds the error bit check and then handles those error
interrupts. Also remove GP_IRQ_0_EN which is not of use for i2c.

Change-Id: Ided8b80cf8456cc0452422f587abeac9bcd76563
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: blingala <quic_blingala@quicinc.com>
This commit is contained in:
blingala 2022-06-20 17:45:33 +05:30 committed by Gerrit - the friendly Code Review server
parent 92edb0ce6a
commit 42eec26134
1 changed files with 6 additions and 5 deletions
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11
drivers/i2c/busses/i2c-msm-geni.c
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@ -465,9 +465,12 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev)
}
if ((m_stat & M_CMD_FAILURE_EN) ||
(dm_rx_st & (DM_I2C_CB_ERR)) ||
(m_stat & M_CMD_CANCEL_EN) ||
(m_stat & M_CMD_ABORT_EN)) {
(dm_rx_st & (DM_I2C_CB_ERR)) ||
(m_stat & M_CMD_CANCEL_EN) ||
(m_stat & M_CMD_ABORT_EN) ||
(m_stat & M_GP_IRQ_1_EN) ||
(m_stat & M_GP_IRQ_3_EN) ||
(m_stat & M_GP_IRQ_4_EN)) {
if (m_stat & M_GP_IRQ_1_EN)
geni_i2c_err(gi2c, I2C_NACK);
@ -481,8 +484,6 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev)
geni_i2c_err(gi2c, GENI_ILLEGAL_CMD);
if (m_stat & M_CMD_ABORT_EN)
geni_i2c_err(gi2c, GENI_ABORT_DONE);
if (m_stat & M_GP_IRQ_0_EN)
geni_i2c_err(gi2c, GP_IRQ0);
if (!dma)
writel_relaxed(0, (gi2c->base +