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igc: enable Qbv configuration for 2nd GCL

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commit 5ac1231ac14d1b8a1098048e51cad45f11b85c0a upstream.

Make reset task only executes for i225 and Qbv disabling to allow
i226 configure for 2nd GCL without resetting the adapter.

In i226, Tx won't hang if there is a GCL is already running, so in
this case we don't need to set FutScdDis bit.

Signed-off-by: Tan Tee Min <tee.min.tan@linux.intel.com>
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tan Tee Min 2022-12-15 00:29:08 +08:00 committed by Greg Kroah-Hartman
parent 8420fe4dd2
commit 3c3418a586
3 changed files with 15 additions and 9 deletions
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9
drivers/net/ethernet/intel/igc/igc_main.c
View File

@ -6097,7 +6097,7 @@ static int igc_tsn_enable_launchtime(struct igc_adapter *adapter,
if (err)
return err;
return igc_tsn_offload_apply(adapter);
return igc_tsn_offload_apply(adapter, qopt->enable);
}
static int igc_tsn_clear_schedule(struct igc_adapter *adapter)
@ -6121,6 +6121,7 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter,
struct tc_taprio_qopt_offload *qopt)
{
bool queue_configured[IGC_MAX_TX_QUEUES] = { };
struct igc_hw *hw = &adapter->hw;
u32 start_time = 0, end_time = 0;
size_t n;
int i;
@ -6133,7 +6134,7 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter,
if (qopt->base_time < 0)
return -ERANGE;
if (adapter->base_time)
if (igc_is_device_id_i225(hw) && adapter->base_time)
return -EALREADY;
if (!validate_schedule(adapter, qopt))
@ -6210,7 +6211,7 @@ static int igc_tsn_enable_qbv_scheduling(struct igc_adapter *adapter,
if (err)
return err;
return igc_tsn_offload_apply(adapter);
return igc_tsn_offload_apply(adapter, qopt->enable);
}
static int igc_save_cbs_params(struct igc_adapter *adapter, int queue,
@ -6278,7 +6279,7 @@ static int igc_tsn_enable_cbs(struct igc_adapter *adapter,
if (err)
return err;
return igc_tsn_offload_apply(adapter);
return igc_tsn_offload_apply(adapter, qopt->enable);
}
static int igc_setup_tc(struct net_device *dev, enum tc_setup_type type,

13
drivers/net/ethernet/intel/igc/igc_tsn.c
View File

@ -195,7 +195,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter)
wr32(IGC_TXQCTL(i), txqctl);
}
tqavctrl = rd32(IGC_TQAVCTRL);
tqavctrl = rd32(IGC_TQAVCTRL) & ~IGC_TQAVCTRL_FUTSCDDIS;
tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV;
cycle = adapter->cycle_time;
@ -212,8 +212,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter)
} else {
/* According to datasheet section 7.5.2.9.3.3, FutScdDis bit
* has to be configured before the cycle time and base time.
* Tx won't hang if there is a GCL is already running,
* so in this case we don't need to set FutScdDis.
*/
if (igc_is_device_id_i226(hw))
if (igc_is_device_id_i226(hw) &&
!(rd32(IGC_BASET_H) || rd32(IGC_BASET_L)))
tqavctrl |= IGC_TQAVCTRL_FUTSCDDIS;
}
@ -256,11 +259,13 @@ int igc_tsn_reset(struct igc_adapter *adapter)
return err;
}
int igc_tsn_offload_apply(struct igc_adapter *adapter)
int igc_tsn_offload_apply(struct igc_adapter *adapter, bool enable)
{
struct igc_hw *hw = &adapter->hw;
int err;
if (netif_running(adapter->netdev)) {
if (netif_running(adapter->netdev) &&
(igc_is_device_id_i225(hw) || !enable)) {
schedule_work(&adapter->reset_task);
return 0;
}

2
drivers/net/ethernet/intel/igc/igc_tsn.h
View File

@ -4,7 +4,7 @@
#ifndef _IGC_TSN_H_
#define _IGC_TSN_H_
int igc_tsn_offload_apply(struct igc_adapter *adapter);
int igc_tsn_offload_apply(struct igc_adapter *adapter, bool enable);
int igc_tsn_reset(struct igc_adapter *adapter);
#endif /* _IGC_BASE_H */