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Merge "Merge tag 'android14-6.1.43_r00' into android14-6.1" into android14-6.1

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This commit is contained in:
Treehugger Robot 2023-10-26 21:35:43 +00:00
commit 35361bdac2
2816 changed files with 37426 additions and 21529 deletions
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4
.gitignore vendored
View File

@ -168,3 +168,7 @@ sphinx_*/
# Rust analyzer configuration
/rust-project.json
# Android ABI build files
abi_gki_protected_exports
all_kmi_symbols

2
Documentation/ABI/testing/sysfs-driver-eud
View File

@ -1,4 +1,4 @@
What: /sys/bus/platform/drivers/eud/.../enable
What: /sys/bus/platform/drivers/qcom_eud/.../enable
Date: February 2022
Contact: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Description:

11
Documentation/ABI/testing/sysfs-module
View File

@ -60,3 +60,14 @@ Description: Module taint flags:
C staging driver module
E unsigned module
== =====================
What: /sys/module/grant_table/parameters/free_per_iteration
Date: July 2023
KernelVersion: 6.5 but backported to all supported stable branches
Contact: Xen developer discussion <xen-devel@lists.xenproject.org>
Description: Read and write number of grant entries to attempt to free per iteration.
Note: Future versions of Xen and Linux may provide a better
interface for controlling the rate of deferred grant reclaim
or may not need it at all.
Users: Qubes OS (https://www.qubes-os.org)

8
Documentation/admin-guide/device-mapper/dm-init.rst
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@ -123,3 +123,11 @@ Other examples (per target):
0 1638400 verity 1 8:1 8:2 4096 4096 204800 1 sha256
fb1a5a0f00deb908d8b53cb270858975e76cf64105d412ce764225d53b8f3cfd
51934789604d1b92399c52e7cb149d1b3a1b74bbbcb103b2a0aaacbed5c08584
For setups using device-mapper on top of asynchronously probed block
devices (MMC, USB, ..), it may be necessary to tell dm-init to
explicitly wait for them to become available before setting up the
device-mapper tables. This can be done with the "dm-mod.waitfor="
module parameter, which takes a list of devices to wait for::
dm-mod.waitfor=<device1>[,..,<deviceN>]

37
Documentation/admin-guide/security-bugs.rst
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@ -63,31 +63,28 @@ information submitted to the security list and any followup discussions
of the report are treated confidentially even after the embargo has been
lifted, in perpetuity.
Coordination
------------
Coordination with other groups
------------------------------
Fixes for sensitive bugs, such as those that might lead to privilege
escalations, may need to be coordinated with the private
<linux-distros@vs.openwall.org> mailing list so that distribution vendors
are well prepared to issue a fixed kernel upon public disclosure of the
upstream fix. Distros will need some time to test the proposed patch and
will generally request at least a few days of embargo, and vendor update
publication prefers to happen Tuesday through Thursday. When appropriate,
the security team can assist with this coordination, or the reporter can
include linux-distros from the start. In this case, remember to prefix
the email Subject line with "[vs]" as described in the linux-distros wiki:
<http://oss-security.openwall.org/wiki/mailing-lists/distros#how-to-use-the-lists>
The kernel security team strongly recommends that reporters of potential
security issues NEVER contact the "linux-distros" mailing list until
AFTER discussing it with the kernel security team. Do not Cc: both
lists at once. You may contact the linux-distros mailing list after a
fix has been agreed on and you fully understand the requirements that
doing so will impose on you and the kernel community.
The different lists have different goals and the linux-distros rules do
not contribute to actually fixing any potential security problems.
CVE assignment
--------------
The security team does not normally assign CVEs, nor do we require them
for reports or fixes, as this can needlessly complicate the process and
may delay the bug handling. If a reporter wishes to have a CVE identifier
assigned ahead of public disclosure, they will need to contact the private
linux-distros list, described above. When such a CVE identifier is known
before a patch is provided, it is desirable to mention it in the commit
message if the reporter agrees.
The security team does not assign CVEs, nor do we require them for
reports or fixes, as this can needlessly complicate the process and may
delay the bug handling. If a reporter wishes to have a CVE identifier
assigned, they should find one by themselves, for example by contacting
MITRE directly. However under no circumstances will a patch inclusion
be delayed to wait for a CVE identifier to arrive.
Non-disclosure agreements
-------------------------

2
Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
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@ -32,7 +32,7 @@ properties:
maxItems: 1
iommus:
maxItems: 1
maxItems: 4
power-domains:
maxItems: 1

12
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
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@ -65,6 +65,18 @@ properties:
Indicates if the DSI controller is driving a panel which needs
2 DSI links.
qcom,master-dsi:
type: boolean
description: |
Indicates if the DSI controller is the master DSI controller when
qcom,dual-dsi-mode enabled.
qcom,sync-dual-dsi:
type: boolean
description: |
Indicates if the DSI controller needs to sync the other DSI controller
with MIPI DCS commands when qcom,dual-dsi-mode enabled.
assigned-clocks:
maxItems: 2
description: |

2
Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
View File

@ -86,7 +86,7 @@ patternProperties:
of the MAX chips to the GyroADC, while MISO line of each Maxim
ADC connects to a shared input pin of the GyroADC.
enum:
- adi,7476
- adi,ad7476
- fujitsu,mb88101a
- maxim,max1162
- maxim,max11100

4
Documentation/devicetree/bindings/power/reset/qcom,pon.yaml
View File

@ -56,7 +56,6 @@ required:
unevaluatedProperties: false
allOf:
- $ref: reboot-mode.yaml#
- if:
properties:
compatible:
@ -66,6 +65,9 @@ allOf:
- qcom,pms405-pon
- qcom,pm8998-pon
then:
allOf:
- $ref: reboot-mode.yaml#
properties:
reg:
maxItems: 1

1
Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml
View File

@ -27,6 +27,7 @@ properties:
const: 0
clocks:
minItems: 3
maxItems: 5
clock-names:

6
Documentation/devicetree/bindings/sound/tas2562.yaml
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@ -52,7 +52,9 @@ properties:
description: TDM TX current sense time slot.
'#sound-dai-cells':
const: 1
# The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward
# compatibility but is deprecated.
enum: [0, 1]
required:
- compatible
@ -69,7 +71,7 @@ examples:
codec: codec@4c {
compatible = "ti,tas2562";
reg = <0x4c>;
#sound-dai-cells = <1>;
#sound-dai-cells = <0>;
interrupt-parent = <&gpio1>;
interrupts = <14>;
shutdown-gpios = <&gpio1 15 0>;

6
Documentation/devicetree/bindings/sound/tas2770.yaml
View File

@ -54,7 +54,9 @@ properties:
- 1 # Falling edge
'#sound-dai-cells':
const: 1
# The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward
# compatibility but is deprecated.
enum: [0, 1]
required:
- compatible
@ -71,7 +73,7 @@ examples:
codec: codec@41 {
compatible = "ti,tas2770";
reg = <0x41>;
#sound-dai-cells = <1>;
#sound-dai-cells = <0>;
interrupt-parent = <&gpio1>;
interrupts = <14>;
reset-gpio = <&gpio1 15 0>;

6
Documentation/devicetree/bindings/sound/tas27xx.yaml
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@ -47,7 +47,9 @@ properties:
description: TDM TX voltage sense time slot.
'#sound-dai-cells':
const: 1
# The codec has a single DAI, the #sound-dai-cells=<1>; case is left in for backward
# compatibility but is deprecated.
enum: [0, 1]
required:
- compatible
@ -64,7 +66,7 @@ examples:
codec: codec@38 {
compatible = "ti,tas2764";
reg = <0x38>;
#sound-dai-cells = <1>;
#sound-dai-cells = <0>;
interrupt-parent = <&gpio1>;
interrupts = <14>;
reset-gpios = <&gpio1 15 0>;

2
Documentation/devicetree/bindings/usb/cdns,usb3.yaml
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@ -64,7 +64,7 @@ properties:
description:
size of memory intended as internal memory for endpoints
buffers expressed in KB
$ref: /schemas/types.yaml#/definitions/uint32
$ref: /schemas/types.yaml#/definitions/uint16
cdns,phyrst-a-enable:
description: Enable resetting of PHY if Rx fail is detected

2
Documentation/devicetree/bindings/usb/snps,dwc3.yaml
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@ -260,7 +260,7 @@ properties:
description:
High-Speed PHY interface selection between UTMI+ and ULPI when the
DWC_USB3_HSPHY_INTERFACE has value 3.
$ref: /schemas/types.yaml#/definitions/uint8
$ref: /schemas/types.yaml#/definitions/string
enum: [utmi, ulpi]
snps,quirk-frame-length-adjustment:

2
Documentation/fault-injection/provoke-crashes.rst
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@ -29,7 +29,7 @@ recur_count
cpoint_name
Where in the kernel to trigger the action. It can be
one of INT_HARDWARE_ENTRY, INT_HW_IRQ_EN, INT_TASKLET_ENTRY,
FS_DEVRW, MEM_SWAPOUT, TIMERADD, SCSI_QUEUE_RQ, or DIRECT.
FS_SUBMIT_BH, MEM_SWAPOUT, TIMERADD, SCSI_QUEUE_RQ, or DIRECT.
cpoint_type
Indicates the action to be taken on hitting the crash point.

2
Documentation/filesystems/autofs-mount-control.rst
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@ -196,7 +196,7 @@ information and return operation results::
struct args_ismountpoint ismountpoint;
};
char path[0];
char path[];
};
The ioctlfd field is a mount point file descriptor of an autofs mount

2
Documentation/filesystems/autofs.rst
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@ -467,7 +467,7 @@ Each ioctl is passed a pointer to an `autofs_dev_ioctl` structure::
struct args_ismountpoint ismountpoint;
};
char path[0];
char path[];
};
For the **OPEN_MOUNT** and **IS_MOUNTPOINT** commands, the target

26
Documentation/filesystems/directory-locking.rst
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@ -22,12 +22,11 @@ exclusive.
3) object removal. Locking rules: caller locks parent, finds victim,
locks victim and calls the method. Locks are exclusive.
4) rename() that is _not_ cross-directory. Locking rules: caller locks
the parent and finds source and target. In case of exchange (with
RENAME_EXCHANGE in flags argument) lock both. In any case,
if the target already exists, lock it. If the source is a non-directory,
lock it. If we need to lock both, lock them in inode pointer order.
Then call the method. All locks are exclusive.
4) rename() that is _not_ cross-directory. Locking rules: caller locks the
parent and finds source and target. We lock both (provided they exist). If we
need to lock two inodes of different type (dir vs non-dir), we lock directory
first. If we need to lock two inodes of the same type, lock them in inode
pointer order. Then call the method. All locks are exclusive.
NB: we might get away with locking the source (and target in exchange
case) shared.
@ -44,15 +43,17 @@ All locks are exclusive.
rules:
* lock the filesystem
* lock parents in "ancestors first" order.
* lock parents in "ancestors first" order. If one is not ancestor of
the other, lock them in inode pointer order.
* find source and target.
* if old parent is equal to or is a descendent of target
fail with -ENOTEMPTY
* if new parent is equal to or is a descendent of source
fail with -ELOOP
* If it's an exchange, lock both the source and the target.
* If the target exists, lock it. If the source is a non-directory,
lock it. If we need to lock both, do so in inode pointer order.
* Lock both the source and the target provided they exist. If we
need to lock two inodes of different type (dir vs non-dir), we lock
the directory first. If we need to lock two inodes of the same type,
lock them in inode pointer order.
* call the method.
All ->i_rwsem are taken exclusive. Again, we might get away with locking
@ -66,8 +67,9 @@ If no directory is its own ancestor, the scheme above is deadlock-free.
Proof:
First of all, at any moment we have a partial ordering of the
objects - A < B iff A is an ancestor of B.
First of all, at any moment we have a linear ordering of the
objects - A < B iff (A is an ancestor of B) or (B is not an ancestor
of A and ptr(A) < ptr(B)).
That ordering can change. However, the following is true:

19
Documentation/mm/page_table_check.rst
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@ -54,3 +54,22 @@ Build kernel with:
Optionally, build kernel with PAGE_TABLE_CHECK_ENFORCED in order to have page
table support without extra kernel parameter.
Implementation notes
====================
We specifically decided not to use VMA information in order to avoid relying on
MM states (except for limited "struct page" info). The page table check is a
separate from Linux-MM state machine that verifies that the user accessible
pages are not falsely shared.
PAGE_TABLE_CHECK depends on EXCLUSIVE_SYSTEM_RAM. The reason is that without
EXCLUSIVE_SYSTEM_RAM, users are allowed to map arbitrary physical memory
regions into the userspace via /dev/mem. At the same time, pages may change
their properties (e.g., from anonymous pages to named pages) while they are
still being mapped in the userspace, leading to "corruption" detected by the
page table check.
Even with EXCLUSIVE_SYSTEM_RAM, I/O pages may be still allowed to be mapped via
/dev/mem. However, these pages are always considered as named pages, so they
won't break the logic used in the page table check.

9
Documentation/networking/af_xdp.rst
View File

@ -433,6 +433,15 @@ start N bytes into the buffer leaving the first N bytes for the
application to use. The final option is the flags field, but it will
be dealt with in separate sections for each UMEM flag.
SO_BINDTODEVICE setsockopt
--------------------------
This is a generic SOL_SOCKET option that can be used to tie AF_XDP
socket to a particular network interface. It is useful when a socket
is created by a privileged process and passed to a non-privileged one.
Once the option is set, kernel will refuse attempts to bind that socket
to a different interface. Updating the value requires CAP_NET_RAW.
XDP_STATISTICS getsockopt
-------------------------

4
Documentation/networking/ip-sysctl.rst
View File

@ -1247,8 +1247,8 @@ ping_group_range - 2 INTEGERS
Restrict ICMP_PROTO datagram sockets to users in the group range.
The default is "1 0", meaning, that nobody (not even root) may
create ping sockets. Setting it to "100 100" would grant permissions
to the single group. "0 4294967295" would enable it for the world, "100
4294967295" would enable it for the users, but not daemons.
to the single group. "0 4294967294" would enable it for the world, "100
4294967294" would enable it for the users, but not daemons.
tcp_early_demux - BOOLEAN
Enable early demux for established TCP sockets.

7
Documentation/process/changes.rst
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@ -60,6 +60,7 @@ openssl & libcrypto 1.0.0 openssl version
bc 1.06.95 bc --version
Sphinx\ [#f1]_ 1.7 sphinx-build --version
cpio any cpio --version
gtags (optional) 6.6.5 gtags --version
====================== =============== ========================================
.. [#f1] Sphinx is needed only to build the Kernel documentation
@ -174,6 +175,12 @@ You will need openssl to build kernels 3.7 and higher if module signing is
enabled. You will also need openssl development packages to build kernels 4.3
and higher.
gtags / GNU GLOBAL (optional)
-----------------------------
The kernel build requires GNU GLOBAL version 6.6.5 or later to generate
tag files through ``make gtags``. This is due to its use of the gtags
``-C (--directory)`` flag.
System utilities
****************

4
Documentation/riscv/vm-layout.rst
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@ -47,7 +47,7 @@ RISC-V Linux Kernel SV39
| Kernel-space virtual memory, shared between all processes:
____________________________________________________________|___________________________________________________________
| | | |
ffffffc6fee00000 | -228 GB | ffffffc6feffffff | 2 MB | fixmap
ffffffc6fea00000 | -228 GB | ffffffc6feffffff | 6 MB | fixmap
ffffffc6ff000000 | -228 GB | ffffffc6ffffffff | 16 MB | PCI io
ffffffc700000000 | -228 GB | ffffffc7ffffffff | 4 GB | vmemmap
ffffffc800000000 | -224 GB | ffffffd7ffffffff | 64 GB | vmalloc/ioremap space
@ -83,7 +83,7 @@ RISC-V Linux Kernel SV48
| Kernel-space virtual memory, shared between all processes:
____________________________________________________________|___________________________________________________________
| | | |
ffff8d7ffee00000 | -114.5 TB | ffff8d7ffeffffff | 2 MB | fixmap
ffff8d7ffea00000 | -114.5 TB | ffff8d7ffeffffff | 6 MB | fixmap
ffff8d7fff000000 | -114.5 TB | ffff8d7fffffffff | 16 MB | PCI io
ffff8d8000000000 | -114.5 TB | ffff8f7fffffffff | 2 TB | vmemmap
ffff8f8000000000 | -112.5 TB | ffffaf7fffffffff | 32 TB | vmalloc/ioremap space

8
Documentation/trace/kprobetrace.rst
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@ -58,8 +58,8 @@ Synopsis of kprobe_events
NAME=FETCHARG : Set NAME as the argument name of FETCHARG.
FETCHARG:TYPE : Set TYPE as the type of FETCHARG. Currently, basic types
(u8/u16/u32/u64/s8/s16/s32/s64), hexadecimal types
(x8/x16/x32/x64), "string", "ustring" and bitfield
are supported.
(x8/x16/x32/x64), "string", "ustring", "symbol", "symstr"
and bitfield are supported.
(\*1) only for the probe on function entry (offs == 0).
(\*2) only for return probe.
@ -96,6 +96,10 @@ offset, and container-size (usually 32). The syntax is::
Symbol type('symbol') is an alias of u32 or u64 type (depends on BITS_PER_LONG)
which shows given pointer in "symbol+offset" style.
On the other hand, symbol-string type ('symstr') converts the given address to
"symbol+offset/symbolsize" style and stores it as a null-terminated string.
With 'symstr' type, you can filter the event with wildcard pattern of the
symbols, and you don't need to solve symbol name by yourself.
For $comm, the default type is "string"; any other type is invalid.
.. _user_mem_access:

12
MAINTAINERS
View File

@ -5190,8 +5190,8 @@ S: Supported
W: https://wiki.samba.org/index.php/LinuxCIFS
T: git git://git.samba.org/sfrench/cifs-2.6.git
F: Documentation/admin-guide/cifs/
F: fs/cifs/
F: fs/smbfs_common/
F: fs/smb/client/
F: fs/smb/common/
F: include/uapi/linux/cifs
COMPACTPCI HOTPLUG CORE
@ -9397,7 +9397,7 @@ F: drivers/net/wireless/intersil/hostap/
HP COMPAQ TC1100 TABLET WMI EXTRAS DRIVER
L: platform-driver-x86@vger.kernel.org
S: Orphan
F: drivers/platform/x86/tc1100-wmi.c
F: drivers/platform/x86/hp/tc1100-wmi.c
HPET: High Precision Event Timers driver
M: Clemens Ladisch <clemens@ladisch.de>
@ -11210,8 +11210,8 @@ L: linux-cifs@vger.kernel.org
S: Maintained
T: git git://git.samba.org/ksmbd.git
F: Documentation/filesystems/cifs/ksmbd.rst
F: fs/ksmbd/
F: fs/smbfs_common/
F: fs/smb/common/
F: fs/smb/server/
KERNEL UNIT TESTING FRAMEWORK (KUnit)
M: Brendan Higgins <brendanhiggins@google.com>
@ -11900,7 +11900,7 @@ M: Eric Piel <eric.piel@tremplin-utc.net>
S: Maintained
F: Documentation/misc-devices/lis3lv02d.rst
F: drivers/misc/lis3lv02d/
F: drivers/platform/x86/hp_accel.c
F: drivers/platform/x86/hp/hp_accel.c
LIST KUNIT TEST
M: David Gow <davidgow@google.com>

4
Makefile
View File

@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 25
SUBLEVEL = 43
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth
NAME = Curry Ramen
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"

1
android/abi_gki_aarch64_db845c
View File

@ -437,6 +437,7 @@
memmove
memremap
memset
memset32
__memset_io
memstart_addr
memunmap

1
android/abi_gki_aarch64_virtual_device
View File

@ -410,6 +410,7 @@
skb_copy_expand
skb_dequeue
skb_pull
skb_pull_data
skb_push
skb_put
skb_queue_head

8
arch/arc/include/asm/linkage.h
View File

@ -8,6 +8,10 @@
#include <asm/dwarf.h>
#define ASM_NL ` /* use '`' to mark new line in macro */
#define __ALIGN .align 4
#define __ALIGN_STR __stringify(__ALIGN)
#ifdef __ASSEMBLY__
.macro ST2 e, o, off
@ -28,10 +32,6 @@
#endif
.endm
#define ASM_NL ` /* use '`' to mark new line in macro */
#define __ALIGN .align 4
#define __ALIGN_STR __stringify(__ALIGN)
/* annotation for data we want in DCCM - if enabled in .config */
.macro ARCFP_DATA nm
#ifdef CONFIG_ARC_HAS_DCCM

2
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
View File

@ -527,7 +527,7 @@ touchscreen@1 {
interrupt-parent = <&gpio1>;
interrupts = <31 0>;
pendown-gpio = <&gpio1 31 0>;
pendown-gpio = <&gpio1 31 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;

2
arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
View File

@ -63,7 +63,7 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <100000000>; /* 100 MHz */
spi-max-frequency = <50000000>; /* 50 MHz */
#include "openbmc-flash-layout.dtsi"
};
};

4
arch/arm/boot/dts/aspeed-bmc-asrock-romed8hm3.dts
View File

@ -31,7 +31,7 @@ heartbeat {
};
system-fault {
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
panic-indicator;
};
};
@ -51,7 +51,7 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <100000000>; /* 100 MHz */
spi-max-frequency = <50000000>; /* 50 MHz */
#include "openbmc-flash-layout-64.dtsi"
};
};

2
arch/arm/boot/dts/at91-sama7g5ek.dts
View File

@ -789,7 +789,7 @@ &sdmmc2 {
};
&shdwc {
atmel,shdwc-debouncer = <976>;
debounce-delay-us = <976>;
status = "okay";
input@0 {

2
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -156,7 +156,7 @@ tsc2046@2 {
compatible = "ti,ads7843";
interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
spi-max-frequency = <3000000>;
pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&pioC 2 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <150>;
ti,x-max = /bits/ 16 <3830>;

2
arch/arm/boot/dts/bcm53015-meraki-mr26.dts
View File

@ -128,7 +128,7 @@ port@5 {
fixed-link {
speed = <1000>;
duplex-full;
full-duplex;
};
};
};

2
arch/arm/boot/dts/bcm53016-meraki-mr32.dts
View File

@ -187,7 +187,7 @@ port@5 {
fixed-link {
speed = <1000>;
duplex-full;
full-duplex;
};
};
};

1
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -542,7 +542,6 @@ spi@18029200 {
"spi_lr_session_done",
"spi_lr_overread";
clocks = <&iprocmed>;
clock-names = "iprocmed";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;

2
arch/arm/boot/dts/exynos4412-itop-elite.dts
View File

@ -182,7 +182,7 @@ codec: audio-codec@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
clock-names = "MCLK1";
clock-names = "mclk";
wlf,shared-lrclk;
#sound-dai-cells = <0>;
};

1
arch/arm/boot/dts/imx6qdl-mba6.dtsi
View File

@ -209,6 +209,7 @@ &pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie>;
status = "okay";
};

2
arch/arm/boot/dts/imx7d-pico-hobbit.dts
View File

@ -64,7 +64,7 @@ ads7846@0 {
interrupt-parent = <&gpio2>;
interrupts = <7 0>;
spi-max-frequency = <1000000>;
pendown-gpio = <&gpio2 7 0>;
pendown-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
vcc-supply = <&reg_3p3v>;
ti,x-min = /bits/ 16 <0>;
ti,x-max = /bits/ 16 <4095>;

2
arch/arm/boot/dts/imx7d-sdb.dts
View File

@ -205,7 +205,7 @@ tsc2046@0 {
pinctrl-0 = <&pinctrl_tsc2046_pendown>;
interrupt-parent = <&gpio2>;
interrupts = <29 0>;
pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>;
touchscreen-max-pressure = <255>;
wakeup-source;
};

2
arch/arm/boot/dts/iwg20d-q7-common.dtsi
View File

@ -49,7 +49,7 @@ audio_clock: audio_clock {
lcd_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000 0>;
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
enable-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;

16
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
View File

@ -18,6 +18,8 @@ chosen {
gpio-restart {
compatible = "gpio-restart";
pinctrl-0 = <&reset_pins>;
pinctrl-names = "default";
gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
priority = <200>;
};
@ -39,7 +41,7 @@ &flx3 {
status = "okay";
spi3: spi@400 {
pinctrl-0 = <&fc3_b_pins>;
pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
@ -59,6 +61,12 @@ miim_c_pins: miim-c-pins {
function = "miim_c";
};
reset_pins: reset-pins {
/* SYS_RST# */
pins = "GPIO_56";
function = "gpio";
};
sgpio_a_pins: sgpio-a-pins {
/* SCK, D0, D1 */
pins = "GPIO_32", "GPIO_33", "GPIO_34";
@ -71,6 +79,12 @@ sgpio_b_pins: sgpio-b-pins {
function = "sgpio_b";
};
spi3_cs_pins: spi3-cs-pins {
/* CS# */
pins = "GPIO_46";
function = "gpio";
};
usart0_pins: usart0-pins {
/* RXD, TXD */
pins = "GPIO_25", "GPIO_26";

4
arch/arm/boot/dts/meson8.dtsi
View File

@ -749,13 +749,13 @@ &uart_A {
&uart_B {
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clocks = <&xtal>, <&clkc CLKID_UART1>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clocks = <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};

4
arch/arm/boot/dts/meson8b.dtsi
View File

@ -737,13 +737,13 @@ &uart_A {
&uart_B {
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clocks = <&xtal>, <&clkc CLKID_UART1>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clocks = <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};

2
arch/arm/boot/dts/omap3-cm-t3x.dtsi
View File

@ -227,7 +227,7 @@ ads7846@0 {
interrupt-parent = <&gpio2>;
interrupts = <25 0>; /* gpio_57 */
pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;
ti,x-max = /bits/ 16 <0x0fff>;

2
arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
View File

@ -54,7 +54,7 @@ ads7846@0 {
interrupt-parent = <&gpio1>;
interrupts = <27 0>; /* gpio_27 */
pendown-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;
ti,x-max = /bits/ 16 <0x0fff>;

16
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -612,6 +612,22 @@ &i2c3 {
clock-frequency = <100000>;
};
&mcspi1 {
status = "disabled";
};
&mcspi2 {
status = "disabled";
};
&mcspi3 {
status = "disabled";
};
&mcspi4 {
status = "disabled";
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;

4
arch/arm/boot/dts/omap3-gta04a5one.dts
View File

@ -5,9 +5,11 @@
#include "omap3-gta04a5.dts"
&omap3_pmx_core {
/ {
model = "Goldelico GTA04A5/Letux 2804 with OneNAND";
};
&omap3_pmx_core {
gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <

2
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -311,7 +311,7 @@ tsc2046@0 {
interrupt-parent = <&gpio1>;
interrupts = <8 0>; /* boot6 / gpio_8 */
spi-max-frequency = <1000000>;
pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
vcc-supply = <&reg_vcc3>;
pinctrl-names = "default";
pinctrl-0 = <&tsc2048_pins>;

2
arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
View File

@ -149,7 +149,7 @@ ads7846@0 {
interrupt-parent = <&gpio4>;
interrupts = <18 0>; /* gpio_114 */
pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio4 18 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;
ti,x-max = /bits/ 16 <0x0fff>;

2
arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
View File

@ -160,7 +160,7 @@ ads7846@0 {
interrupt-parent = <&gpio4>;
interrupts = <18 0>; /* gpio_114 */
pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio4 18 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;
ti,x-max = /bits/ 16 <0x0fff>;

2
arch/arm/boot/dts/omap3-pandora-common.dtsi
View File

@ -651,7 +651,7 @@ tsc2046@0 {
pinctrl-0 = <&penirq_pins>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_NONE>; /* GPIO_94 */
pendown-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio3 30 GPIO_ACTIVE_LOW>;
vcc-supply = <&vaux4>;
ti,x-min = /bits/ 16 <0>;

2
arch/arm/boot/dts/omap5-cm-t54.dts
View File

@ -354,7 +354,7 @@ ads7846@0 {
interrupt-parent = <&gpio1>;
interrupts = <15 0>; /* gpio1_wk15 */
pendown-gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
pendown-gpio = <&gpio1 15 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <0x0>;

2
arch/arm/boot/dts/qcom-apq8064.dtsi
View File

@ -1271,7 +1271,7 @@ &gfx3d1 30
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-320000000 {
opp-450000000 {
opp-hz = /bits/ 64 <450000000>;
};

4
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
View File

@ -23,6 +23,10 @@ &blsp1_uart2 {
status = "okay";
};
&blsp2_dma {
qcom,controlled-remotely;
};
&blsp2_i2c5 {
status = "okay";
clock-frequency = <200000>;

8
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
View File

@ -11,9 +11,9 @@ soc {
dma-controller@7984000 {
status = "okay";
};
qpic-nand@79b0000 {
status = "okay";
};
};
};
&nand {
status = "okay";
};

10
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
View File

@ -102,10 +102,10 @@ pci@40000000 {
status = "okay";
perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
};
qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};

12
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
View File

@ -65,11 +65,11 @@ i2c@78b7000 { /* BLSP1 QUP2 */
dma-controller@7984000 {
status = "okay";
};
qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};

4
arch/arm/boot/dts/qcom-ipq4019.dtsi
View File

@ -426,8 +426,8 @@ pcie0: pci@40000000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
<0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;
ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>,
<0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";

12
arch/arm/boot/dts/qcom-ipq8064.dtsi
View File

@ -1085,8 +1085,8 @@ pcie0: pci@1b500000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */
0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@ -1136,8 +1136,8 @@ pcie1: pci@1b700000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */
0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@ -1187,8 +1187,8 @@ pcie2: pci@1b900000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */
0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";

2
arch/arm/boot/dts/qcom-msm8974.dtsi
View File

@ -300,7 +300,7 @@ rpm {
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm_requests {
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8974";
qcom,smd-channels = "rpm_requests";

78
arch/arm/boot/dts/qcom-sdx55.dtsi
View File

@ -303,6 +303,45 @@ qpic_nand: nand-controller@1b30000 {
status = "disabled";
};
pcie_ep: pcie-ep@1c00000 {
compatible = "qcom,sdx55-pcie-ep";
reg = <0x01c00000 0x3000>,
<0x40000000 0xf1d>,
<0x40000f20 0xc8>,
<0x40001000 0x1000>,
<0x40200000 0x100000>,
<0x01c03000 0x3000>;
reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
"mmio";
qcom,perst-regs = <&tcsr 0xb258 0xb270>;
clocks = <&gcc GCC_PCIE_AUX_CLK>,
<&gcc GCC_PCIE_CFG_AHB_CLK>,
<&gcc GCC_PCIE_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_SLV_AXI_CLK>,
<&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_SLEEP_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>;
clock-names = "aux", "cfg", "bus_master", "bus_slave",
"slave_q2a", "sleep", "ref";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global", "doorbell";
reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_PCIE_BCR>;
reset-names = "core";
power-domains = <&gcc PCIE_GDSC>;
phys = <&pcie0_lane>;
phy-names = "pciephy";
max-link-speed = <3>;
num-lanes = <2>;
status = "disabled";
};
pcie0_phy: phy@1c07000 {
compatible = "qcom,sdx55-qmp-pcie-phy";
reg = <0x01c07000 0x1c4>;
@ -400,45 +439,6 @@ sdhc_1: mmc@8804000 {
status = "disabled";
};
pcie_ep: pcie-ep@40000000 {
compatible = "qcom,sdx55-pcie-ep";
reg = <0x01c00000 0x3000>,
<0x40000000 0xf1d>,
<0x40000f20 0xc8>,
<0x40001000 0x1000>,
<0x40200000 0x100000>,
<0x01c03000 0x3000>;
reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
"mmio";
qcom,perst-regs = <&tcsr 0xb258 0xb270>;
clocks = <&gcc GCC_PCIE_AUX_CLK>,
<&gcc GCC_PCIE_CFG_AHB_CLK>,
<&gcc GCC_PCIE_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_SLV_AXI_CLK>,
<&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_SLEEP_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>;
clock-names = "aux", "cfg", "bus_master", "bus_slave",
"slave_q2a", "sleep", "ref";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global", "doorbell";
reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_PCIE_BCR>;
reset-names = "core";
power-domains = <&gcc PCIE_GDSC>;
phys = <&pcie0_lane>;
phy-names = "pciephy";
max-link-speed = <3>;
num-lanes = <2>;
status = "disabled";
};
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sdx55-mpss-pas";
reg = <0x04080000 0x4040>;

2
arch/arm/boot/dts/s5pv210.dtsi
View File

@ -566,7 +566,7 @@ csis0: csis@fa600000 {
interrupts = <29>;
clocks = <&clocks CLK_CSIS>,
<&clocks SCLK_CSIS>;
clock-names = "clk_csis",
clock-names = "csis",
"sclk_csis";
bus-width = <4>;
status = "disabled";

82
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
View File

@ -284,6 +284,88 @@ pins2 {
slew-rate = <2>;
};
};
can1_pins_a: can1-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
bias-pull-up;
};
};
can1_pins_b: can1-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
bias-pull-up;
};
};
can1_pins_c: can1-2 {
pins1 {
pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
bias-pull-up;
};
};
can1_pins_d: can1-3 {
pins1 {
pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
bias-pull-up;
};
};
can2_pins_a: can2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */
};
pins2 {
pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
bias-pull-up;
};
};
can2_pins_b: can2-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
};
pins2 {
pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
bias-pull-up;
};
};
can3_pins_a: can3-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */
};
pins2 {
pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */
bias-pull-up;
};
};
can3_pins_b: can3-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */
};
pins2 {
pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */
bias-pull-up;
};
};
};
};
};

30
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View File

@ -1880,6 +1880,21 @@ pins {
};
};
spi1_pins_b: spi1-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
bias-disable;
};
};
spi2_pins_a: spi2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
@ -2448,19 +2463,4 @@ pins2 {
bias-disable;
};
};
spi1_pins_b: spi1-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
bias-disable;
};
};
};

11
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
View File

@ -137,10 +137,13 @@ reg_panel_supply: regulator-panel-supply {
sound {
compatible = "audio-graph-card";
routing =
"MIC_IN", "Capture",
"Capture", "Mic Bias",
"Playback", "HP_OUT";
widgets = "Headphone", "Headphone Jack",
"Line", "Line In Jack",
"Microphone", "Microphone Jack";
routing = "Headphone Jack", "HP_OUT",
"LINE_IN", "Line In Jack",
"MIC_IN", "Microphone Jack",
"Microphone Jack", "Mic Bias";
dais = <&sai2a_port &sai2b_port>;
status = "okay";
};

8
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
View File

@ -88,7 +88,7 @@ sd_switch: regulator-sd_switch {
sound {
compatible = "audio-graph-card";
label = "STM32MP1-AV96-HDMI";
label = "STM32-AV96-HDMI";
dais = <&sai2a_port>;
status = "okay";
};
@ -322,6 +322,12 @@ adv7513_i2s0: endpoint {
};
};
};
dh_mac_eeprom: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
};
&ltdc {

6
arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi
View File

@ -192,6 +192,12 @@ eeprom@50 {
reg = <0x50>;
pagesize = <16>;
};
dh_mac_eeprom: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
};
&sdmmc1 { /* MicroSD */

6
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View File

@ -213,12 +213,6 @@ watchdog {
status = "disabled";
};
};
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
};
&ipcc {

2
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@ -438,7 +438,7 @@ &i2s2 {
i2s2_port: port {
i2s2_endpoint: endpoint {
remote-endpoint = <&sii9022_tx_endpoint>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <256>;
};
};

1
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
View File

@ -132,6 +132,7 @@ L2: cache-controller@2c0f0000 {
reg = <0x2c0f0000 0x1000>;
interrupts = <0 84 4>;
cache-level = <2>;
cache-unified;
};
pmu {

17
arch/arm/include/asm/assembler.h
View File

@ -402,6 +402,23 @@ ALT_UP_B(.L0_\@)
#endif
.endm
/*
* Raw SMP data memory barrier
*/
.macro __smp_dmb mode
#if __LINUX_ARM_ARCH__ >= 7
.ifeqs "\mode","arm"
dmb ish
.else
W(dmb) ish
.endif
#elif __LINUX_ARM_ARCH__ == 6
mcr p15, 0, r0, c7, c10, 5 @ dmb
#else
.error "Incompatible SMP platform"
#endif
.endm
#if defined(CONFIG_CPU_V7M)
/*
* setmode is used to assert to be in svc mode during boot. For v7-M

29
arch/arm/include/asm/sync_bitops.h
View File

@ -14,14 +14,35 @@
* ops which are SMP safe even on a UP kernel.
*/
/*
* Unordered
*/
#define sync_set_bit(nr, p) _set_bit(nr, p)
#define sync_clear_bit(nr, p) _clear_bit(nr, p)
#define sync_change_bit(nr, p) _change_bit(nr, p)
#define sync_test_and_set_bit(nr, p) _test_and_set_bit(nr, p)
#define sync_test_and_clear_bit(nr, p) _test_and_clear_bit(nr, p)
#define sync_test_and_change_bit(nr, p) _test_and_change_bit(nr, p)
#define sync_test_bit(nr, addr) test_bit(nr, addr)
#define arch_sync_cmpxchg arch_cmpxchg
/*
* Fully ordered
*/
int _sync_test_and_set_bit(int nr, volatile unsigned long * p);
#define sync_test_and_set_bit(nr, p) _sync_test_and_set_bit(nr, p)
int _sync_test_and_clear_bit(int nr, volatile unsigned long * p);
#define sync_test_and_clear_bit(nr, p) _sync_test_and_clear_bit(nr, p)
int _sync_test_and_change_bit(int nr, volatile unsigned long * p);
#define sync_test_and_change_bit(nr, p) _sync_test_and_change_bit(nr, p)
#define arch_sync_cmpxchg(ptr, old, new) \
({ \
__typeof__(*(ptr)) __ret; \
__smp_mb__before_atomic(); \
__ret = arch_cmpxchg_relaxed((ptr), (old), (new)); \
__smp_mb__after_atomic(); \
__ret; \
})
#endif

25
arch/arm/kernel/unwind.c
View File

@ -307,6 +307,29 @@ static int unwind_exec_pop_subset_r0_to_r3(struct unwind_ctrl_block *ctrl,
return URC_OK;
}
static unsigned long unwind_decode_uleb128(struct unwind_ctrl_block *ctrl)
{
unsigned long bytes = 0;
unsigned long insn;
unsigned long result = 0;
/*
* unwind_get_byte() will advance `ctrl` one instruction at a time, so
* loop until we get an instruction byte where bit 7 is not set.
*
* Note: This decodes a maximum of 4 bytes to output 28 bits data where
* max is 0xfffffff: that will cover a vsp increment of 1073742336, hence
* it is sufficient for unwinding the stack.
*/
do {
insn = unwind_get_byte(ctrl);
result |= (insn & 0x7f) << (bytes * 7);
bytes++;
} while (!!(insn & 0x80) && (bytes != sizeof(result)));
return result;
}
/*
* Execute the current unwind instruction.
*/
@ -360,7 +383,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
if (ret)
goto error;
} else if (insn == 0xb2) {
unsigned long uleb128 = unwind_get_byte(ctrl);
unsigned long uleb128 = unwind_decode_uleb128(ctrl);
ctrl->vrs[SP] += 0x204 + (uleb128 << 2);
} else {

14
arch/arm/lib/bitops.h
View File

@ -28,7 +28,7 @@ UNWIND( .fnend )
ENDPROC(\name )
.endm
.macro testop, name, instr, store
.macro __testop, name, instr, store, barrier
ENTRY( \name )
UNWIND( .fnstart )
ands ip, r1, #3
@ -38,7 +38,7 @@ UNWIND( .fnstart )
mov r0, r0, lsr #5
add r1, r1, r0, lsl #2 @ Get word offset
mov r3, r2, lsl r3 @ create mask
smp_dmb
\barrier
#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
.arch_extension mp
ALT_SMP(W(pldw) [r1])
@ -50,13 +50,21 @@ UNWIND( .fnstart )
strex ip, r2, [r1]
cmp ip, #0
bne 1b
smp_dmb
\barrier
cmp r0, #0
movne r0, #1
2: bx lr
UNWIND( .fnend )
ENDPROC(\name )
.endm
.macro testop, name, instr, store
__testop \name, \instr, \store, smp_dmb
.endm
.macro sync_testop, name, instr, store
__testop \name, \instr, \store, __smp_dmb
.endm
#else
.macro bitop, name, instr
ENTRY( \name )

4
arch/arm/lib/testchangebit.S
View File

@ -10,3 +10,7 @@
.text
testop _test_and_change_bit, eor, str
#if __LINUX_ARM_ARCH__ >= 6
sync_testop _sync_test_and_change_bit, eor, str
#endif

4
arch/arm/lib/testclearbit.S
View File

@ -10,3 +10,7 @@
.text
testop _test_and_clear_bit, bicne, strne
#if __LINUX_ARM_ARCH__ >= 6
sync_testop _sync_test_and_clear_bit, bicne, strne
#endif

4
arch/arm/lib/testsetbit.S
View File

@ -10,3 +10,7 @@
.text
testop _test_and_set_bit, orreq, streq
#if __LINUX_ARM_ARCH__ >= 6
sync_testop _sync_test_and_set_bit, orreq, streq
#endif

20
arch/arm/mach-at91/pm.c
View File

@ -334,16 +334,14 @@ static bool at91_pm_eth_quirk_is_valid(struct at91_pm_quirk_eth *eth)
pdev = of_find_device_by_node(eth->np);
if (!pdev)
return false;
/* put_device(eth->dev) is called at the end of suspend. */
eth->dev = &pdev->dev;
}
/* No quirks if device isn't a wakeup source. */
if (!device_may_wakeup(eth->dev)) {
put_device(eth->dev);
if (!device_may_wakeup(eth->dev))
return false;
}
/* put_device(eth->dev) is called at the end of suspend. */
return true;
}
@ -439,14 +437,14 @@ static int at91_pm_config_quirks(bool suspend)
pr_err("AT91: PM: failed to enable %s clocks\n",
j == AT91_PM_G_ETH ? "geth" : "eth");
}
} else {
/*
* Release the reference to eth->dev taken in
* at91_pm_eth_quirk_is_valid().
*/
put_device(eth->dev);
eth->dev = NULL;
}
/*
* Release the reference to eth->dev taken in
* at91_pm_eth_quirk_is_valid().
*/
put_device(eth->dev);
eth->dev = NULL;
}
return ret;

3
arch/arm/mach-ep93xx/timer-ep93xx.c
View File

@ -9,6 +9,7 @@
#include <linux/io.h>
#include <asm/mach/time.h>
#include "soc.h"
#include "platform.h"
/*************************************************************************
* Timer handling for EP93xx
@ -60,7 +61,7 @@ static u64 notrace ep93xx_read_sched_clock(void)
return ret;
}
u64 ep93xx_clocksource_read(struct clocksource *c)
static u64 ep93xx_clocksource_read(struct clocksource *c)
{
u64 ret;

1
arch/arm/mach-omap2/board-generic.c
View File

@ -13,6 +13,7 @@
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>

3
arch/arm/mach-orion5x/board-dt.c
View File

@ -60,6 +60,9 @@ static void __init orion5x_dt_init(void)
if (of_machine_is_compatible("maxtor,shared-storage-2"))
mss2_init();
if (of_machine_is_compatible("lacie,d2-network"))
d2net_init();
of_platform_default_populate(NULL, orion5x_auxdata_lookup, NULL);
}

6
arch/arm/mach-orion5x/common.h
View File

@ -75,6 +75,12 @@ extern void mss2_init(void);
static inline void mss2_init(void) {}
#endif
#ifdef CONFIG_MACH_D2NET_DT
void d2net_init(void);
#else
static inline void d2net_init(void) {}
#endif
/*****************************************************************************
* Helpers to access Orion registers
****************************************************************************/

5
arch/arm/mach-sa1100/jornada720_ssp.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* arch/arm/mac-sa1100/jornada720_ssp.c
*
* Copyright (C) 2006/2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
@ -26,6 +26,7 @@ static unsigned long jornada_ssp_flags;
/**
* jornada_ssp_reverse - reverses input byte
* @byte: input byte to reverse
*
* we need to reverse all data we receive from the mcu due to its physical location
* returns : 01110111 -> 11101110
@ -46,6 +47,7 @@ EXPORT_SYMBOL(jornada_ssp_reverse);
/**
* jornada_ssp_byte - waits for ready ssp bus and sends byte
* @byte: input byte to transmit
*
* waits for fifo buffer to clear and then transmits, if it doesn't then we will
* timeout after <timeout> rounds. Needs mcu running before its called.
@ -77,6 +79,7 @@ EXPORT_SYMBOL(jornada_ssp_byte);
/**
* jornada_ssp_inout - decide if input is command or trading byte
* @byte: input byte to send (may be %TXDUMMY)
*
* returns : (jornada_ssp_byte(byte)) on success
* : %-ETIMEDOUT on timeout failure

2
arch/arm/probes/kprobes/checkers-common.c
View File

@ -40,7 +40,7 @@ enum probes_insn checker_stack_use_imm_0xx(probes_opcode_t insn,
* Different from other insn uses imm8, the real addressing offset of
* STRD in T32 encoding should be imm8 * 4. See ARMARM description.
*/
enum probes_insn checker_stack_use_t32strd(probes_opcode_t insn,
static enum probes_insn checker_stack_use_t32strd(probes_opcode_t insn,
struct arch_probes_insn *asi,
const struct decode_header *h)
{

2
arch/arm/probes/kprobes/core.c
View File

@ -233,7 +233,7 @@ singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
* kprobe, and that level is reserved for user kprobe handlers, so we can't
* risk encountering a new kprobe in an interrupt handler.
*/
void __kprobes kprobe_handler(struct pt_regs *regs)
static void __kprobes kprobe_handler(struct pt_regs *regs)
{
struct kprobe *p, *cur;
struct kprobe_ctlblk *kcb;

2
arch/arm/probes/kprobes/opt-arm.c
View File

@ -145,8 +145,6 @@ __arch_remove_optimized_kprobe(struct optimized_kprobe *op, int dirty)
}
}
extern void kprobe_handler(struct pt_regs *regs);
static void
optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
{

2
arch/arm/probes/kprobes/test-core.c
View File

@ -720,7 +720,7 @@ static const char coverage_register_lookup[16] = {
[REG_TYPE_NOSPPCX] = COVERAGE_ANY_REG | COVERAGE_SP,
};
unsigned coverage_start_registers(const struct decode_header *h)
static unsigned coverage_start_registers(const struct decode_header *h)
{
unsigned regs = 0;
int i;

4
arch/arm/probes/kprobes/test-core.h
View File

@ -454,3 +454,7 @@ void kprobe_thumb32_test_cases(void);
#else
void kprobe_arm_test_cases(void);
#endif
void __kprobes_test_case_start(void);
void __kprobes_test_case_end_16(void);
void __kprobes_test_case_end_32(void);

10
arch/arm64/boot/dts/apple/t8103-j274.dts
View File

@ -33,10 +33,12 @@ &wifi0 {
&port01 {
bus-range = <2 2>;
status = "okay";
};
&port02 {
bus-range = <3 3>;
status = "okay";
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
@ -44,6 +46,14 @@ ethernet0: ethernet@0,0 {
};
};
&pcie0_dart_1 {
status = "okay";
};
&pcie0_dart_2 {
status = "okay";
};
&i2c2 {
status = "okay";
};

15
arch/arm64/boot/dts/apple/t8103-j293.dts
View File

@ -21,21 +21,6 @@ &wifi0 {
brcm,board-type = "apple,honshu";
};
/*
* Remove unused PCIe ports and disable the associated DARTs.
*/
&pcie0_dart_1 {
status = "disabled";
};
&pcie0_dart_2 {
status = "disabled";
};
/delete-node/ &port01;
/delete-node/ &port02;
&i2c2 {
status = "okay";
};

15
arch/arm64/boot/dts/apple/t8103-j313.dts
View File

@ -20,18 +20,3 @@ / {
&wifi0 {
brcm,board-type = "apple,shikoku";
};
/*
* Remove unused PCIe ports and disable the associated DARTs.
*/
&pcie0_dart_1 {
status = "disabled";
};
&pcie0_dart_2 {
status = "disabled";
};
/delete-node/ &port01;
/delete-node/ &port02;

10
arch/arm64/boot/dts/apple/t8103-j456.dts
View File

@ -51,13 +51,23 @@ hpm3: usb-pd@3c {
&port01 {
bus-range = <2 2>;
status = "okay";
};
&port02 {
bus-range = <3 3>;
status = "okay";
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 00];
};
};
&pcie0_dart_1 {
status = "okay";
};
&pcie0_dart_2 {
status = "okay";
};

11
arch/arm64/boot/dts/apple/t8103-j457.dts
View File

@ -33,6 +33,7 @@ &wifi0 {
&port02 {
bus-range = <3 3>;
status = "okay";
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
@ -40,12 +41,6 @@ ethernet0: ethernet@0,0 {
};
};
/*
* Remove unused PCIe port and disable the associated DART.
*/
&pcie0_dart_1 {
status = "disabled";
&pcie0_dart_2 {
status = "okay";
};
/delete-node/ &port01;

4
arch/arm64/boot/dts/apple/t8103.dtsi
View File

@ -428,6 +428,7 @@ pcie0_dart_1: iommu@682008000 {
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp>;
status = "disabled";
};
pcie0_dart_2: iommu@683008000 {
@ -437,6 +438,7 @@ pcie0_dart_2: iommu@683008000 {
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp>;
status = "disabled";
};
pcie0: pcie@690000000 {
@ -511,6 +513,7 @@ port01: pci@1,0 {
<0 0 0 2 &port01 0 0 0 1>,
<0 0 0 3 &port01 0 0 0 2>,
<0 0 0 4 &port01 0 0 0 3>;
status = "disabled";
};
port02: pci@2,0 {
@ -530,6 +533,7 @@ port02: pci@2,0 {
<0 0 0 2 &port02 0 0 0 1>,
<0 0 0 3 &port02 0 0 0 2>,
<0 0 0 4 &port02 0 0 0 3>;
status = "disabled";
};
};
};

10
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
View File

@ -120,7 +120,7 @@ ethernet-phy@3 {
};
&leds {
led-power@11 {
led@11 {
reg = <0x11>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_WHITE>;
@ -130,7 +130,7 @@ led-power@11 {
pinctrl-0 = <&pins_led_17_a>;
};
led-wan-red@12 {
led@12 {
reg = <0x12>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_RED>;
@ -139,7 +139,7 @@ led-wan-red@12 {
pinctrl-0 = <&pins_led_18_a>;
};
led-wps@14 {
led@14 {
reg = <0x14>;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
@ -148,7 +148,7 @@ led-wps@14 {
pinctrl-0 = <&pins_led_20_a>;
};
led-wan-white@15 {
led@15 {
reg = <0x15>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_WHITE>;
@ -157,7 +157,7 @@ led-wan-white@15 {
pinctrl-0 = <&pins_led_21_a>;
};
led-lan@19 {
led@19 {
reg = <0x19>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_WHITE>;

4
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
View File

@ -253,7 +253,7 @@ phy12: ethernet-phy@c {
};
};
procmon: syscon@280000 {
procmon: bus@280000 {
compatible = "simple-bus";
reg = <0x280000 0x1000>;
ranges;
@ -532,7 +532,7 @@ nand-controller@1800 {
reg = <0x1800 0x600>, <0x2000 0x10>;
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand";
interrupt-names = "nand_ctlrdy";
status = "okay";
nandcs: nand@0 {

8
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
View File

@ -26,6 +26,8 @@ lpuart0: serial@5a060000 {
clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
<&uart0_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_0>;
status = "disabled";
};
@ -36,6 +38,8 @@ lpuart1: serial@5a070000 {
clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
<&uart1_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_1>;
status = "disabled";
};
@ -46,6 +50,8 @@ lpuart2: serial@5a080000 {
clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
<&uart2_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_2>;
status = "disabled";
};
@ -56,6 +62,8 @@ lpuart3: serial@5a090000 {
clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
<&uart3_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <80000000>;
power-domains = <&pd IMX_SC_R_UART_3>;
status = "disabled";
};

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