Merge 041bc24d86
("Merge tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci") into android-mainline
Steps on the way to 6.1-rc1 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I0888c8944ad4ba5a269b7d7783be4c7690036f53
This commit is contained in:
commit
2ee894aad3
@ -457,3 +457,36 @@ Description:
|
||||
|
||||
The file is writable if the PF is bound to a driver that
|
||||
implements ->sriov_set_msix_vec_count().
|
||||
|
||||
What: /sys/bus/pci/devices/.../resourceN_resize
|
||||
Date: September 2022
|
||||
Contact: Alex Williamson <alex.williamson@redhat.com>
|
||||
Description:
|
||||
These files provide an interface to PCIe Resizable BAR support.
|
||||
A file is created for each BAR resource (N) supported by the
|
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PCIe Resizable BAR extended capability of the device. Reading
|
||||
each file exposes the bitmap of available resource sizes:
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# cat resource1_resize
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00000000000001c0
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The bitmap represents supported resource sizes for the BAR,
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where bit0 = 1MB, bit1 = 2MB, bit2 = 4MB, etc. In the above
|
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example the device supports 64MB, 128MB, and 256MB BAR sizes.
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||||
|
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When writing the file, the user provides the bit position of
|
||||
the desired resource size, for example:
|
||||
|
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# echo 7 > resource1_resize
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|
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This indicates to set the size value corresponding to bit 7,
|
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128MB. The resulting size is 2 ^ (bit# + 20). This definition
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matches the PCIe specification of this capability.
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|
||||
In order to make use of resource resizing, all PCI drivers must
|
||||
be unbound from the device and peer devices under the same
|
||||
parent bridge may need to be soft removed. In the case of
|
||||
VGA devices, writing a resize value will remove low level
|
||||
console drivers from the device. Raw users of pci-sysfs
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resourceN attributes must be terminated prior to resizing.
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Success of the resizing operation is not guaranteed.
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|
@ -466,6 +466,30 @@ Description: Show status of f2fs superblock in real time.
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0x4000 SBI_IS_FREEZING freefs is in process
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====== ===================== =================================
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What: /sys/fs/f2fs/<disk>/stat/cp_status
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Date: September 2022
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Contact: "Chao Yu" <chao.yu@oppo.com>
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Description: Show status of f2fs checkpoint in real time.
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=============================== ==============================
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cp flag value
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CP_UMOUNT_FLAG 0x00000001
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CP_ORPHAN_PRESENT_FLAG 0x00000002
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CP_COMPACT_SUM_FLAG 0x00000004
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CP_ERROR_FLAG 0x00000008
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CP_FSCK_FLAG 0x00000010
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CP_FASTBOOT_FLAG 0x00000020
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CP_CRC_RECOVERY_FLAG 0x00000040
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CP_NAT_BITS_FLAG 0x00000080
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CP_TRIMMED_FLAG 0x00000100
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CP_NOCRC_RECOVERY_FLAG 0x00000200
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CP_LARGE_NAT_BITMAP_FLAG 0x00000400
|
||||
CP_QUOTA_NEED_FSCK_FLAG 0x00000800
|
||||
CP_DISABLED_FLAG 0x00001000
|
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CP_DISABLED_QUICK_FLAG 0x00002000
|
||||
CP_RESIZEFS_FLAG 0x00004000
|
||||
=============================== ==============================
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|
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What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio
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Date: January 2021
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Contact: "Daeho Jeong" <daehojeong@google.com>
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||||
|
@ -13,6 +13,7 @@ maintainers:
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properties:
|
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compatible:
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enum:
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- qcom,msm8226-cci
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- qcom,msm8916-cci
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- qcom,msm8974-cci
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- qcom,msm8996-cci
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||||
@ -27,11 +28,11 @@ properties:
|
||||
const: 0
|
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|
||||
clocks:
|
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minItems: 4
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minItems: 3
|
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maxItems: 6
|
||||
|
||||
clock-names:
|
||||
minItems: 4
|
||||
minItems: 3
|
||||
maxItems: 6
|
||||
|
||||
interrupts:
|
||||
@ -78,11 +79,29 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8226-cci
|
||||
- qcom,msm8916-cci
|
||||
then:
|
||||
properties:
|
||||
i2c-bus@1: false
|
||||
|
||||
- if:
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||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8226-cci
|
||||
- qcom,msm8974-cci
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: camss_top_ahb
|
||||
- const: cci_ahb
|
||||
- const: cci
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
@ -14,6 +14,9 @@ description: >
|
||||
Bindings for joystick devices connected to ADC controllers supporting
|
||||
the Industrial I/O subsystem.
|
||||
|
||||
allOf:
|
||||
- $ref: input.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: adc-joystick
|
||||
@ -28,6 +31,8 @@ properties:
|
||||
https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml
|
||||
for details.
|
||||
|
||||
poll-interval: true
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
|
111
Documentation/devicetree/bindings/input/adi,adp5588.yaml
Normal file
111
Documentation/devicetree/bindings/input/adi,adp5588.yaml
Normal file
@ -0,0 +1,111 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/adi,adp5588.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices ADP5588 Keypad Controller
|
||||
|
||||
maintainers:
|
||||
- Nuno Sá <nuno.sa@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices Mobile I/O Expander and QWERTY Keypad Controller
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ADP5588.pdf
|
||||
|
||||
allOf:
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||||
- $ref: matrix-keymap.yaml#
|
||||
- $ref: input.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,adp5587
|
||||
- adi,adp5588
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vcc-supply:
|
||||
description: Supply Voltage Input
|
||||
|
||||
reset-gpios:
|
||||
description:
|
||||
If specified, it will be asserted during driver probe. As the line is
|
||||
active low, it should be marked GPIO_ACTIVE_LOW.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
gpio-controller:
|
||||
description:
|
||||
This property applies if either keypad,num-rows lower than 8 or
|
||||
keypad,num-columns lower than 10.
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
interrupt-controller:
|
||||
description:
|
||||
This property applies if either keypad,num-rows lower than 8 or
|
||||
keypad,num-columns lower than 10.
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
adi,unlock-keys:
|
||||
description:
|
||||
Specifies a maximum of 2 keys that can be used to unlock the keypad.
|
||||
If this property is set, the keyboard will be locked and only unlocked
|
||||
after these keys are pressed. If only one key is set, a double click is
|
||||
needed to unlock the keypad. The value of this property cannot be bigger
|
||||
or equal than keypad,num-rows * keypad,num-columns.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- keypad,num-rows
|
||||
- keypad,num-columns
|
||||
- linux,keymap
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
keys@34 {
|
||||
compatible = "adi,adp5588";
|
||||
reg = <0x34>;
|
||||
|
||||
vcc-supply = <&vcc>;
|
||||
interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpio>;
|
||||
reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
|
||||
|
||||
keypad,num-rows = <1>;
|
||||
keypad,num-columns = <9>;
|
||||
linux,keymap = <
|
||||
MATRIX_KEY(0x00, 0x00, KEY_1)
|
||||
MATRIX_KEY(0x00, 0x01, KEY_2)
|
||||
MATRIX_KEY(0x00, 0x02, KEY_3)
|
||||
MATRIX_KEY(0x00, 0x03, KEY_4)
|
||||
MATRIX_KEY(0x00, 0x04, KEY_5)
|
||||
MATRIX_KEY(0x00, 0x05, KEY_6)
|
||||
MATRIX_KEY(0x00, 0x06, KEY_7)
|
||||
MATRIX_KEY(0x00, 0x07, KEY_8)
|
||||
MATRIX_KEY(0x00, 0x08, KEY_9)
|
||||
>;
|
||||
};
|
||||
};
|
||||
...
|
@ -1,46 +0,0 @@
|
||||
* HID over I2C Device-Tree bindings
|
||||
|
||||
HID over I2C provides support for various Human Interface Devices over the
|
||||
I2C bus. These devices can be for example touchpads, keyboards, touch screens
|
||||
or sensors.
|
||||
|
||||
The specification has been written by Microsoft and is currently available here:
|
||||
http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
|
||||
|
||||
If this binding is used, the kernel module i2c-hid will handle the communication
|
||||
with the device and the generic hid core layer will handle the protocol.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "hid-over-i2c"
|
||||
- reg: i2c slave address
|
||||
- hid-descr-addr: HID descriptor address
|
||||
- interrupts: interrupt line
|
||||
|
||||
Additional optional properties:
|
||||
|
||||
Some devices may support additional optional properties to help with, e.g.,
|
||||
power sequencing. The following properties can be supported by one or more
|
||||
device-specific compatible properties, which should be used in addition to the
|
||||
"hid-over-i2c" string.
|
||||
|
||||
- compatible:
|
||||
* "wacom,w9013" (Wacom W9013 digitizer). Supports:
|
||||
- vdd-supply (3.3V)
|
||||
- vddl-supply (1.8V)
|
||||
- post-power-on-delay-ms
|
||||
|
||||
- vdd-supply: phandle of the regulator that provides the supply voltage.
|
||||
- post-power-on-delay-ms: time required by the device after enabling its regulators
|
||||
or powering it on, before it is ready for communication.
|
||||
- touchscreen-inverted-x: See touchscreen.txt
|
||||
- touchscreen-inverted-y: See touchscreen.txt
|
||||
|
||||
Example:
|
||||
|
||||
i2c-hid-dev@2c {
|
||||
compatible = "hid-over-i2c";
|
||||
reg = <0x2c>;
|
||||
hid-descr-addr = <0x0020>;
|
||||
interrupt-parent = <&gpx3>;
|
||||
interrupts = <3 2>;
|
||||
};
|
83
Documentation/devicetree/bindings/input/hid-over-i2c.yaml
Normal file
83
Documentation/devicetree/bindings/input/hid-over-i2c.yaml
Normal file
@ -0,0 +1,83 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/hid-over-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: HID over I2C Devices
|
||||
|
||||
maintainers:
|
||||
- Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
- Jiri Kosina <jkosina@suse.cz>
|
||||
|
||||
description: |+
|
||||
HID over I2C provides support for various Human Interface Devices over the
|
||||
I2C bus. These devices can be for example touchpads, keyboards, touch screens
|
||||
or sensors.
|
||||
|
||||
The specification has been written by Microsoft and is currently available here:
|
||||
https://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
|
||||
|
||||
If this binding is used, the kernel module i2c-hid will handle the communication
|
||||
with the device and the generic hid core layer will handle the protocol.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/input/touchscreen/touchscreen.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- wacom,w9013
|
||||
- const: hid-over-i2c
|
||||
- description: Just "hid-over-i2c" alone is allowed, but not recommended.
|
||||
const: hid-over-i2c
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
hid-descr-addr:
|
||||
description: HID descriptor address
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
post-power-on-delay-ms:
|
||||
description: Time required by the device after enabling its regulators
|
||||
or powering it on, before it is ready for communication.
|
||||
|
||||
touchscreen-inverted-x: true
|
||||
|
||||
touchscreen-inverted-y: true
|
||||
|
||||
vdd-supply:
|
||||
description: 3.3V supply
|
||||
|
||||
vddl-supply:
|
||||
description: 1.8V supply
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hid@2c {
|
||||
compatible = "hid-over-i2c";
|
||||
reg = <0x2c>;
|
||||
hid-descr-addr = <0x0020>;
|
||||
interrupts = <3 2>;
|
||||
};
|
||||
};
|
||||
...
|
50
Documentation/devicetree/bindings/input/ibm,op-panel.yaml
Normal file
50
Documentation/devicetree/bindings/input/ibm,op-panel.yaml
Normal file
@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/ibm,op-panel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: IBM Operation Panel
|
||||
|
||||
maintainers:
|
||||
- Eddie James <eajames@linux.ibm.com>
|
||||
|
||||
allOf:
|
||||
- $ref: input.yaml#
|
||||
|
||||
description: |
|
||||
The IBM Operation Panel provides a simple interface to control the connected
|
||||
server. It has a display and three buttons: two directional arrows and one
|
||||
'Enter' button.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ibm,op-panel
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
linux,keycodes:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/i2c/i2c.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ibm-op-panel@62 {
|
||||
compatible = "ibm,op-panel";
|
||||
reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
linux,keycodes = <KEY_UP>, <KEY_DOWN>, <KEY_ENTER>;
|
||||
};
|
||||
};
|
@ -49,6 +49,12 @@ properties:
|
||||
maximum: 256
|
||||
default: 16
|
||||
|
||||
mediatek,keys-per-group:
|
||||
description: each (row, column) group has multiple keys
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 1
|
||||
maximum: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -56,7 +62,7 @@ required:
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
114
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml
Normal file
114
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml
Normal file
@ -0,0 +1,114 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/mediatek,pmic-keys.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek PMIC Keys
|
||||
|
||||
maintainers:
|
||||
- Chen Zhong <chen.zhong@mediatek.com>
|
||||
|
||||
allOf:
|
||||
- $ref: input.yaml#
|
||||
|
||||
description: |
|
||||
There are two key functions provided by MT6397, MT6323 and other MediaTek
|
||||
PMICs: pwrkey and homekey.
|
||||
The key functions are defined as the subnode of the function node provided
|
||||
by the PMIC that is defined as a Multi-Function Device (MFD).
|
||||
|
||||
For MediaTek MT6323/MT6397 PMIC bindings see
|
||||
Documentation/devicetree/bindings/mfd/mt6397.txt
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt6323-keys
|
||||
- mediatek,mt6331-keys
|
||||
- mediatek,mt6358-keys
|
||||
- mediatek,mt6397-keys
|
||||
|
||||
power-off-time-sec: true
|
||||
|
||||
mediatek,long-press-mode:
|
||||
description: |
|
||||
Key long-press force shutdown setting
|
||||
0 - disabled
|
||||
1 - pwrkey
|
||||
2 - pwrkey+homekey
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
maximum: 2
|
||||
|
||||
patternProperties:
|
||||
"^((power|home)|(key-[a-z0-9-]+|[a-z0-9-]+-key))$":
|
||||
$ref: input.yaml#
|
||||
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Key press interrupt
|
||||
- description: Key release interrupt
|
||||
|
||||
interrupt-names: true
|
||||
|
||||
linux-keycodes:
|
||||
maxItems: 1
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
required:
|
||||
- linux,keycodes
|
||||
|
||||
if:
|
||||
properties:
|
||||
interrupt-names:
|
||||
contains:
|
||||
const: powerkey
|
||||
then:
|
||||
properties:
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: powerkey
|
||||
- const: powerkey_r
|
||||
else:
|
||||
properties:
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: homekey
|
||||
- const: homekey_r
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
pmic {
|
||||
compatible = "mediatek,mt6397";
|
||||
|
||||
keys {
|
||||
compatible = "mediatek,mt6397-keys";
|
||||
mediatek,long-press-mode = <1>;
|
||||
power-off-time-sec = <0>;
|
||||
|
||||
key-power {
|
||||
linux,keycodes = <KEY_POWER>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
key-home {
|
||||
linux,keycodes = <KEY_VOLUMEDOWN>;
|
||||
};
|
||||
};
|
||||
};
|
@ -1,46 +0,0 @@
|
||||
MediaTek MT6397/MT6323 PMIC Keys Device Driver
|
||||
|
||||
There are two key functions provided by MT6397/MT6323 PMIC, pwrkey
|
||||
and homekey. The key functions are defined as the subnode of the function
|
||||
node provided by MT6397/MT6323 PMIC that is being defined as one kind
|
||||
of Muti-Function Device (MFD)
|
||||
|
||||
For MT6397/MT6323 MFD bindings see:
|
||||
Documentation/devicetree/bindings/mfd/mt6397.txt
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of:
|
||||
- "mediatek,mt6397-keys"
|
||||
- "mediatek,mt6323-keys"
|
||||
- "mediatek,mt6358-keys"
|
||||
- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml
|
||||
|
||||
Optional Properties:
|
||||
- wakeup-source: See Documentation/devicetree/bindings/power/wakeup-source.txt
|
||||
- mediatek,long-press-mode: Long press key shutdown setting, 1 for
|
||||
pwrkey only, 2 for pwrkey/homekey together, others for disabled.
|
||||
- power-off-time-sec: See Documentation/devicetree/bindings/input/input.yaml
|
||||
|
||||
Example:
|
||||
|
||||
pmic: mt6397 {
|
||||
compatible = "mediatek,mt6397";
|
||||
|
||||
...
|
||||
|
||||
mt6397keys: mt6397keys {
|
||||
compatible = "mediatek,mt6397-keys";
|
||||
mediatek,long-press-mode = <1>;
|
||||
power-off-time-sec = <0>;
|
||||
|
||||
power {
|
||||
linux,keycodes = <116>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
home {
|
||||
linux,keycodes = <114>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
@ -0,0 +1,66 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/pine64,pinephone-keyboard.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Pine64 PinePhone keyboard device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Samuel Holland <samuel@sholland.org>
|
||||
|
||||
description:
|
||||
A keyboard accessory is available for the Pine64 PinePhone and PinePhone Pro.
|
||||
It connects via I2C, providing a raw scan matrix, a flashing interface, and a
|
||||
subordinate I2C bus for communication with a battery charger IC.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: pine64,pinephone-keyboard
|
||||
|
||||
reg:
|
||||
const: 0x15
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vbat-supply:
|
||||
description: Supply for the keyboard MCU
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
i2c:
|
||||
$ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
keyboard@15 {
|
||||
compatible = "pine64,pinephone-keyboard";
|
||||
reg = <0x15>;
|
||||
interrupt-parent = <&r_pio>;
|
||||
interrupts = <0 12 IRQ_TYPE_EDGE_FALLING>; /* PL12 */
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
charger@75 {
|
||||
reg = <0x75>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -1,23 +0,0 @@
|
||||
Qualcomm PM8xxx PMIC Vibrator
|
||||
|
||||
PROPERTIES
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: must be one of:
|
||||
"qcom,pm8058-vib"
|
||||
"qcom,pm8916-vib"
|
||||
"qcom,pm8921-vib"
|
||||
|
||||
- reg:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: address of vibration control register
|
||||
|
||||
EXAMPLE
|
||||
|
||||
vibrator@4a {
|
||||
compatible = "qcom,pm8058-vib";
|
||||
reg = <0x4a>;
|
||||
};
|
38
Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml
Normal file
38
Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml
Normal file
@ -0,0 +1,38 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/qcom,pm8xxx-vib.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm PM8xxx PMIC Vibrator
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,pm8058-vib
|
||||
- qcom,pm8916-vib
|
||||
- qcom,pm8921-vib
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pmic {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vibrator@4a {
|
||||
compatible = "qcom,pm8058-vib";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
};
|
@ -17,10 +17,10 @@ Example:
|
||||
auo_pixcir_ts@5c {
|
||||
compatible = "auo,auo_pixcir_ts";
|
||||
reg = <0x5c>;
|
||||
interrupts = <2 0>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
gpios = <&gpf 2 0 2>, /* INT */
|
||||
<&gpf 5 1 0>; /* RST */
|
||||
gpios = <&gpf 2 0 GPIO_LEVEL_HIGH>, /* INT */
|
||||
<&gpf 5 1 GPIO_LEVEL_LOW>; /* RST */
|
||||
|
||||
x-size = <800>;
|
||||
y-size = <600>;
|
||||
|
@ -3,15 +3,16 @@
|
||||
Required Properties:
|
||||
- compatible must be toradex,vf50-touchscreen
|
||||
- io-channels: adc channels being used by the Colibri VF50 module
|
||||
IIO ADC for Y-, X-, Y+, X+ connections
|
||||
- xp-gpios: FET gate driver for input of X+
|
||||
- xm-gpios: FET gate driver for input of X-
|
||||
- yp-gpios: FET gate driver for input of Y+
|
||||
- ym-gpios: FET gate driver for input of Y-
|
||||
- interrupts: pen irq interrupt for touch detection
|
||||
- pinctrl-names: "idle", "default", "gpios"
|
||||
- pinctrl-0: pinctrl node for pen/touch detection state pinmux
|
||||
- interrupts: pen irq interrupt for touch detection, signal from X plate
|
||||
- pinctrl-names: "idle", "default"
|
||||
- pinctrl-0: pinctrl node for pen/touch detection, pinctrl must provide
|
||||
pull-up resistor on X+, X-.
|
||||
- pinctrl-1: pinctrl node for X/Y and pressure measurement (ADC) state pinmux
|
||||
- pinctrl-2: pinctrl node for gpios functioning as FET gate drivers
|
||||
- vf50-ts-min-pressure: pressure level at which to stop measuring X/Y values
|
||||
|
||||
Example:
|
||||
@ -26,9 +27,8 @@ Example:
|
||||
ym-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "idle","default","gpios";
|
||||
pinctrl-0 = <&pinctrl_touchctrl_idle>;
|
||||
pinctrl-1 = <&pinctrl_touchctrl_default>;
|
||||
pinctrl-2 = <&pinctrl_touchctrl_gpios>;
|
||||
pinctrl-names = "idle","default";
|
||||
pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>;
|
||||
pinctrl-1 = <&pinctrl_touchctrl_default>, <&pinctrl_touchctrl_gpios>;
|
||||
vf50-ts-min-pressure = <200>;
|
||||
};
|
||||
|
@ -14,9 +14,13 @@ allOf:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- elan,ektf3624
|
||||
- elan,ekth3500
|
||||
oneOf:
|
||||
- enum:
|
||||
- elan,ektf3624
|
||||
- elan,ekth3500
|
||||
- items:
|
||||
- const: elan,ekth3915
|
||||
- const: elan,ekth3500
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
@ -54,8 +54,7 @@ Optional properties common with MFD (deprecated):
|
||||
1 -> 3.25 MHz
|
||||
2 || 3 -> 6.5 MHz
|
||||
|
||||
Node name must be stmpe_touchscreen and should be child node of stmpe node to
|
||||
which it belongs.
|
||||
Node should be child node of stmpe node to which it belongs.
|
||||
|
||||
Note that common ADC settings of stmpe_touchscreen (child) will take precedence
|
||||
over the settings done in MFD.
|
||||
|
@ -1,12 +1,13 @@
|
||||
* Nuvoton NPCM7xx KCS (Keyboard Controller Style) IPMI interface
|
||||
* Nuvoton NPCM KCS (Keyboard Controller Style) IPMI interface
|
||||
|
||||
The Nuvoton SOCs (NPCM7xx) are commonly used as BMCs
|
||||
The Nuvoton SOCs (NPCM) are commonly used as BMCs
|
||||
(Baseboard Management Controllers) and the KCS interface can be
|
||||
used to perform in-band IPMI communication with their host.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be one of
|
||||
"nuvoton,npcm750-kcs-bmc"
|
||||
"nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc"
|
||||
- interrupts : interrupt generated by the controller
|
||||
- kcs_chan : The KCS channel number in the controller
|
||||
|
||||
|
@ -48,7 +48,13 @@ allOf:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: mediatek,mt8192-pcie
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-pcie
|
||||
- mediatek,mt8195-pcie
|
||||
- const: mediatek,mt8192-pcie
|
||||
- const: mediatek,mt8192-pcie
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -84,7 +90,9 @@ properties:
|
||||
- const: tl_96m
|
||||
- const: tl_32k
|
||||
- const: peri_26m
|
||||
- const: top_133m
|
||||
- enum:
|
||||
- top_133m # for MT8192
|
||||
- peri_mem # for MT8188/MT8195
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
@ -126,6 +134,7 @@ required:
|
||||
- interrupts
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#interrupt-cells'
|
||||
- interrupt-controller
|
||||
|
||||
|
@ -25,6 +25,33 @@ properties:
|
||||
- const: cfg
|
||||
- const: apb
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Fabric Interface Controllers, FICs, are the interface between the FPGA
|
||||
fabric and the core complex on PolarFire SoC. The FICs require two clocks,
|
||||
one from each side of the interface. The "FIC clocks" described by this
|
||||
property are on the core complex side & communication through a FIC is not
|
||||
possible unless it's corresponding clock is enabled. A clock must be
|
||||
enabled for each of the interfaces the root port is connected through.
|
||||
This could in theory be all 4 interfaces, one interface or any combination
|
||||
in between.
|
||||
minItems: 1
|
||||
items:
|
||||
- description: FIC0's clock
|
||||
- description: FIC1's clock
|
||||
- description: FIC2's clock
|
||||
- description: FIC3's clock
|
||||
|
||||
clock-names:
|
||||
description:
|
||||
As any FIC connection combination is possible, the names should match the
|
||||
order in the clocks property and take the form "ficN" where N is a number
|
||||
0-3
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
pattern: '^fic[0-3]$'
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
@ -40,6 +67,10 @@ properties:
|
||||
ranges:
|
||||
maxItems: 1
|
||||
|
||||
dma-ranges:
|
||||
minItems: 1
|
||||
maxItems: 6
|
||||
|
||||
msi-controller:
|
||||
description: Identifies the node as an MSI controller.
|
||||
|
||||
|
@ -9,12 +9,11 @@ title: Qualcomm PCIe Endpoint Controller binding
|
||||
maintainers:
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "pci-ep.yaml#"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sdx55-pcie-ep
|
||||
enum:
|
||||
- qcom,sdx55-pcie-ep
|
||||
- qcom,sm8450-pcie-ep
|
||||
|
||||
reg:
|
||||
items:
|
||||
@ -35,24 +34,12 @@ properties:
|
||||
- const: mmio
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: PCIe Auxiliary clock
|
||||
- description: PCIe CFG AHB clock
|
||||
- description: PCIe Master AXI clock
|
||||
- description: PCIe Slave AXI clock
|
||||
- description: PCIe Slave Q2A AXI clock
|
||||
- description: PCIe Sleep clock
|
||||
- description: PCIe Reference clock
|
||||
minItems: 7
|
||||
maxItems: 8
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg
|
||||
- const: bus_master
|
||||
- const: bus_slave
|
||||
- const: slave_q2a
|
||||
- const: sleep
|
||||
- const: ref
|
||||
minItems: 7
|
||||
maxItems: 8
|
||||
|
||||
qcom,perst-regs:
|
||||
description: Reference to a syscon representing TCSR followed by the two
|
||||
@ -105,7 +92,6 @@ required:
|
||||
- reg-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- qcom,perst-regs
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- reset-gpios
|
||||
@ -113,6 +99,64 @@ required:
|
||||
- reset-names
|
||||
- power-domains
|
||||
|
||||
allOf:
|
||||
- $ref: pci-ep.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdx55-pcie-ep
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: PCIe Auxiliary clock
|
||||
- description: PCIe CFG AHB clock
|
||||
- description: PCIe Master AXI clock
|
||||
- description: PCIe Slave AXI clock
|
||||
- description: PCIe Slave Q2A AXI clock
|
||||
- description: PCIe Sleep clock
|
||||
- description: PCIe Reference clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg
|
||||
- const: bus_master
|
||||
- const: bus_slave
|
||||
- const: slave_q2a
|
||||
- const: sleep
|
||||
- const: ref
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8450-pcie-ep
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: PCIe Auxiliary clock
|
||||
- description: PCIe CFG AHB clock
|
||||
- description: PCIe Master AXI clock
|
||||
- description: PCIe Slave AXI clock
|
||||
- description: PCIe Slave Q2A AXI clock
|
||||
- description: PCIe Reference clock
|
||||
- description: PCIe DDRSS SF TBU clock
|
||||
- description: PCIe AGGRE NOC AXI clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg
|
||||
- const: bus_master
|
||||
- const: bus_slave
|
||||
- const: slave_q2a
|
||||
- const: ref
|
||||
- const: ddrss_sf_tbu
|
||||
- const: aggre_noc_axi
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
@ -25,8 +25,10 @@ properties:
|
||||
- qcom,pcie-ipq4019
|
||||
- qcom,pcie-ipq8074
|
||||
- qcom,pcie-qcs404
|
||||
- qcom,pcie-sa8540p
|
||||
- qcom,pcie-sc7280
|
||||
- qcom,pcie-sc8180x
|
||||
- qcom,pcie-sc8280xp
|
||||
- qcom,pcie-sdm845
|
||||
- qcom,pcie-sm8150
|
||||
- qcom,pcie-sm8250
|
||||
@ -181,6 +183,7 @@ allOf:
|
||||
enum:
|
||||
- qcom,pcie-sc7280
|
||||
- qcom,pcie-sc8180x
|
||||
- qcom,pcie-sc8280xp
|
||||
- qcom,pcie-sm8250
|
||||
- qcom,pcie-sm8450-pcie0
|
||||
- qcom,pcie-sm8450-pcie1
|
||||
@ -598,6 +601,36 @@ allOf:
|
||||
items:
|
||||
- const: pci # PCIe core reset
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,pcie-sa8540p
|
||||
- qcom,pcie-sc8280xp
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 8
|
||||
maxItems: 9
|
||||
clock-names:
|
||||
minItems: 8
|
||||
items:
|
||||
- const: aux # Auxiliary clock
|
||||
- const: cfg # Configuration clock
|
||||
- const: bus_master # Master AXI clock
|
||||
- const: bus_slave # Slave AXI clock
|
||||
- const: slave_q2a # Slave Q2A clock
|
||||
- const: ddrss_sf_tbu # PCIe SF TBU clock
|
||||
- const: noc_aggr_4 # NoC aggregate 4 clock
|
||||
- const: noc_aggr_south_sf # NoC aggregate South SF clock
|
||||
- const: cnoc_qx # Configuration NoC QX clock
|
||||
resets:
|
||||
maxItems: 1
|
||||
reset-names:
|
||||
items:
|
||||
- const: pci # PCIe core reset
|
||||
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
@ -626,8 +659,6 @@ allOf:
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
# Newer chipsets support either 1 or 8 MSI vectors
|
||||
# On older chipsets it's always 1 MSI vector
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@ -662,7 +693,40 @@ allOf:
|
||||
- const: msi5
|
||||
- const: msi6
|
||||
- const: msi7
|
||||
else:
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,pcie-sc8280xp
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: msi0
|
||||
- const: msi1
|
||||
- const: msi2
|
||||
- const: msi3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,pcie-apq8064
|
||||
- qcom,pcie-apq8084
|
||||
- qcom,pcie-ipq4019
|
||||
- qcom,pcie-ipq6018
|
||||
- qcom,pcie-ipq8064
|
||||
- qcom,pcie-ipq8064-v2
|
||||
- qcom,pcie-ipq8074
|
||||
- qcom,pcie-qcs404
|
||||
- qcom,pcie-sa8540p
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
@ -51,6 +51,12 @@ properties:
|
||||
description: A phandle to the PCIe power up reset line.
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: pcie_aux
|
||||
|
||||
pwren-gpios:
|
||||
description: Should specify the GPIO for controlling the PCI bus device power on.
|
||||
maxItems: 1
|
||||
@ -66,6 +72,7 @@ required:
|
||||
- interrupt-map-mask
|
||||
- interrupt-map
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- pwren-gpios
|
||||
- reset-gpios
|
||||
@ -104,6 +111,7 @@ examples:
|
||||
<0x0 0x0 0x0 0x2 &plic0 58>,
|
||||
<0x0 0x0 0x0 0x3 &plic0 59>,
|
||||
<0x0 0x0 0x0 0x4 &plic0 60>;
|
||||
clock-names = "pcie_aux";
|
||||
clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>;
|
||||
resets = <&prci 4>;
|
||||
pwren-gpios = <&gpio 5 0>;
|
||||
|
@ -63,6 +63,12 @@ examples:
|
||||
syscon: scu@1e6e2000 {
|
||||
compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
|
||||
reg = <0x1e6e2000 0x1a8>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x1e6e2000 0x1000>;
|
||||
|
||||
pinctrl: pinctrl {
|
||||
compatible = "aspeed,ast2400-pinctrl";
|
||||
|
@ -82,6 +82,10 @@ examples:
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x1e6e2000 0x1000>;
|
||||
|
||||
pinctrl: pinctrl {
|
||||
compatible = "aspeed,ast2500-pinctrl";
|
||||
aspeed,external-nodes = <&gfx>, <&lhc>;
|
||||
|
@ -96,6 +96,12 @@ examples:
|
||||
syscon: scu@1e6e2000 {
|
||||
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
|
||||
reg = <0x1e6e2000 0xf6c>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x1e6e2000 0x1000>;
|
||||
|
||||
pinctrl: pinctrl {
|
||||
compatible = "aspeed,ast2600-pinctrl";
|
||||
|
@ -23,6 +23,7 @@ patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
$ref: pinmux-node.yaml#
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
function:
|
||||
|
134
Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml
Normal file
134
Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml
Normal file
@ -0,0 +1,134 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/cypress,cy8c95x0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cypress CY8C95X0 I2C GPIO expander
|
||||
|
||||
maintainers:
|
||||
- Patrick Rudolph <patrick.rudolph@9elements.com>
|
||||
|
||||
description: |
|
||||
This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders.
|
||||
Pin function configuration is performed on a per-pin basis.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- cypress,cy8c9520
|
||||
- cypress,cy8c9540
|
||||
- cypress,cy8c9560
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
description:
|
||||
The first cell is the GPIO number and the second cell specifies GPIO
|
||||
flags, as defined in <dt-bindings/gpio/gpio.h>.
|
||||
const: 2
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
gpio-line-names: true
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
gpio-reserved-ranges:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
Optional power supply.
|
||||
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: pincfg-node.yaml#
|
||||
|
||||
properties:
|
||||
pins:
|
||||
description:
|
||||
List of gpio pins affected by the properties specified in this
|
||||
subnode.
|
||||
items:
|
||||
pattern: '^gp([0-7][0-7])$'
|
||||
minItems: 1
|
||||
maxItems: 60
|
||||
|
||||
function:
|
||||
description:
|
||||
Specify the alternative function to be configured for the specified
|
||||
pins.
|
||||
enum: [ gpio, pwm ]
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
output-high: true
|
||||
|
||||
output-low: true
|
||||
|
||||
drive-push-pull: true
|
||||
|
||||
drive-open-drain: true
|
||||
|
||||
drive-open-source: true
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: "pinctrl.yaml#"
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pinctrl@20 {
|
||||
compatible = "cypress,cy8c9520";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
vdd-supply = <&p3v3>;
|
||||
gpio-reserved-ranges = <5 1>;
|
||||
};
|
||||
};
|
@ -44,6 +44,7 @@ properties:
|
||||
patternProperties:
|
||||
'^gpio@[0-9a-f]*$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description:
|
||||
Child nodes can be specified to contain pin configuration information,
|
||||
|
@ -42,6 +42,7 @@ properties:
|
||||
patternProperties:
|
||||
'^gpio@[0-9a-f]*$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description:
|
||||
Child nodes can be specified to contain pin configuration information,
|
||||
|
@ -24,6 +24,7 @@ patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
$ref: pinmux-node.yaml#
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
marvell,function:
|
||||
|
@ -76,6 +76,8 @@ required:
|
||||
patternProperties:
|
||||
'-[0-9]*$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
'-pins*$':
|
||||
type: object
|
||||
|
@ -117,6 +117,10 @@ patternProperties:
|
||||
"i2s" "audio" 62, 63, 64, 65
|
||||
"switch_int" "eth" 66
|
||||
"mdc_mdio" "eth" 67
|
||||
"wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83
|
||||
"wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
|
||||
"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
|
||||
84, 85
|
||||
|
||||
$ref: "/schemas/pinctrl/pinmux-node.yaml"
|
||||
properties:
|
||||
@ -234,7 +238,9 @@ patternProperties:
|
||||
then:
|
||||
properties:
|
||||
groups:
|
||||
enum: [wf_2g, wf_5g, wf_dbdc]
|
||||
items:
|
||||
enum: [wf_2g, wf_5g, wf_dbdc]
|
||||
maxItems: 3
|
||||
'.*conf.*':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
@ -248,25 +254,27 @@ patternProperties:
|
||||
An array of strings. Each string contains the name of a pin.
|
||||
There is no PIN 41 to PIN 65 above on mt7686b, you can only use
|
||||
those pins on mt7986a.
|
||||
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
|
||||
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
|
||||
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
|
||||
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
|
||||
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
|
||||
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
|
||||
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
|
||||
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
|
||||
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
|
||||
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
|
||||
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
|
||||
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
|
||||
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
|
||||
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
|
||||
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
|
||||
WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
|
||||
WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
|
||||
WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
|
||||
WF1_HB8]
|
||||
items:
|
||||
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
|
||||
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
|
||||
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
|
||||
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
|
||||
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
|
||||
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
|
||||
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
|
||||
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
|
||||
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
|
||||
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
|
||||
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
|
||||
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
|
||||
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
|
||||
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
|
||||
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
|
||||
WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
|
||||
WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
|
||||
WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
|
||||
WF1_HB8]
|
||||
maxItems: 101
|
||||
|
||||
bias-disable: true
|
||||
|
||||
|
@ -0,0 +1,226 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek MT8188 Pin Controller
|
||||
|
||||
maintainers:
|
||||
- Hui Liu <hui.liu@mediatek.com>
|
||||
|
||||
description: |
|
||||
The MediaTek's MT8188 Pin controller is used to control SoC pins.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: mediatek,mt8188-pinctrl
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
description: |
|
||||
Number of cells in GPIO specifier, should be two. The first cell
|
||||
is the pin number, the second cell is used to specify optional
|
||||
parameters which are defined in <dt-bindings/gpio/gpio.h>.
|
||||
const: 2
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
gpio-line-names: true
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: gpio registers base address
|
||||
- description: rm group io configuration registers base address
|
||||
- description: lt group io configuration registers base address
|
||||
- description: lm group io configuration registers base address
|
||||
- description: rt group io configuration registers base address
|
||||
- description: eint registers base address
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: iocfg0
|
||||
- const: iocfg_rm
|
||||
- const: iocfg_lt
|
||||
- const: iocfg_lm
|
||||
- const: iocfg_rt
|
||||
- const: eint
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
interrupts:
|
||||
description: The interrupt outputs to sysirq.
|
||||
maxItems: 1
|
||||
|
||||
mediatek,rsel-resistance-in-si-unit:
|
||||
type: boolean
|
||||
description: |
|
||||
We provide two methods to select the resistance for I2C when pull up or pull down.
|
||||
The first is by RSEL definition value, another one is by resistance value(ohm).
|
||||
This flag is used to identify if the method is resistance(si unit) value.
|
||||
|
||||
# PIN CONFIGURATION NODES
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
'^pins':
|
||||
type: object
|
||||
$ref: "/schemas/pinctrl/pincfg-node.yaml"
|
||||
additionalProperties: false
|
||||
description: |
|
||||
A pinctrl node should contain at least one subnode representing the
|
||||
pinctrl groups available on the machine. Each subnode will list the
|
||||
pins it needs, and how they should be configured, with regard to muxer
|
||||
configuration, pullups, drive strength, input enable/disable and
|
||||
input schmitt.
|
||||
|
||||
properties:
|
||||
pinmux:
|
||||
description: |
|
||||
Integer array, represents gpio pin number and mux setting.
|
||||
Supported pin number and mux varies for different SoCs, and are
|
||||
defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h
|
||||
directly.
|
||||
|
||||
drive-strength:
|
||||
enum: [2, 4, 6, 8, 10, 12, 14, 16]
|
||||
|
||||
drive-strength-microamp:
|
||||
enum: [125, 250, 500, 1000]
|
||||
|
||||
bias-pull-down:
|
||||
oneOf:
|
||||
- type: boolean
|
||||
- enum: [100, 101, 102, 103]
|
||||
description: mt8188 pull down PUPD/R0/R1 type define value.
|
||||
- enum: [200, 201, 202, 203, 204, 205, 206, 207]
|
||||
description: mt8188 pull down RSEL type define value.
|
||||
- enum: [75000, 5000]
|
||||
description: mt8188 pull down RSEL type si unit value(ohm).
|
||||
description: |
|
||||
For pull down type is normal, it doesn't need add RSEL & R1R0 define
|
||||
and resistance value.
|
||||
For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
|
||||
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
|
||||
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
|
||||
define in mt8188.
|
||||
For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
|
||||
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
|
||||
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
|
||||
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
|
||||
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
|
||||
define in mt8188. It can also support resistance value(ohm) "75000" & "5000" in mt8188.
|
||||
|
||||
bias-pull-up:
|
||||
oneOf:
|
||||
- type: boolean
|
||||
- enum: [100, 101, 102, 103]
|
||||
description: mt8188 pull up PUPD/R0/R1 type define value.
|
||||
- enum: [200, 201, 202, 203, 204, 205, 206, 207]
|
||||
description: mt8188 pull up RSEL type define value.
|
||||
- enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000]
|
||||
description: mt8188 pull up RSEL type si unit value(ohm).
|
||||
description: |
|
||||
For pull up type is normal, it don't need add RSEL & R1R0 define
|
||||
and resistance value.
|
||||
For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
|
||||
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
|
||||
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
|
||||
define in mt8188.
|
||||
For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
|
||||
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
|
||||
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
|
||||
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
|
||||
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
|
||||
define in mt8188. It can also support resistance value(ohm)
|
||||
"1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
|
||||
|
||||
bias-disable: true
|
||||
|
||||
output-high: true
|
||||
|
||||
output-low: true
|
||||
|
||||
input-enable: true
|
||||
|
||||
input-disable: true
|
||||
|
||||
input-schmitt-enable: true
|
||||
|
||||
input-schmitt-disable: true
|
||||
|
||||
required:
|
||||
- pinmux
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
- gpio-ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
pio: pinctrl@10005000 {
|
||||
compatible = "mediatek,mt8188-pinctrl";
|
||||
reg = <0x10005000 0x1000>,
|
||||
<0x11c00000 0x1000>,
|
||||
<0x11e10000 0x1000>,
|
||||
<0x11e20000 0x1000>,
|
||||
<0x11ea0000 0x1000>,
|
||||
<0x1000b000 0x1000>;
|
||||
reg-names = "iocfg0", "iocfg_rm",
|
||||
"iocfg_lt", "iocfg_lm", "iocfg_rt",
|
||||
"eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 176>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
pio-pins {
|
||||
pins {
|
||||
pinmux = <PINMUX_GPIO0__FUNC_B_GPIO0>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
spi0-pins {
|
||||
pins-spi {
|
||||
pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
|
||||
<PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
|
||||
<PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>;
|
||||
drive-strength = <6>;
|
||||
};
|
||||
pins-spi-mi {
|
||||
pinmux = <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0-pins {
|
||||
pins {
|
||||
pinmux = <PINMUX_GPIO55__FUNC_B1_SCL0>,
|
||||
<PINMUX_GPIO56__FUNC_B1_SDA0>;
|
||||
bias-disable;
|
||||
drive-strength-microamp = <1000>;
|
||||
};
|
||||
};
|
||||
};
|
@ -30,6 +30,7 @@ patternProperties:
|
||||
|
||||
"^gpio@[0-7]$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description:
|
||||
Eight GPIO banks (gpio@0 to gpio@7), that each contain between 14 and 18
|
||||
|
@ -41,12 +41,12 @@ properties:
|
||||
Gpio base register names.
|
||||
items:
|
||||
- const: iocfg0
|
||||
- const: iocfg_bm
|
||||
- const: iocfg_bl
|
||||
- const: iocfg_br
|
||||
- const: iocfg_lt
|
||||
- const: iocfg_lm
|
||||
- const: iocfg_lb
|
||||
- const: iocfg_bl
|
||||
- const: iocfg_rb
|
||||
- const: iocfg_tl
|
||||
- const: iocfg_rt
|
||||
- const: eint
|
||||
|
||||
interrupt-controller: true
|
||||
@ -235,9 +235,9 @@ examples:
|
||||
<0x10002A00 0x0200>,
|
||||
<0x10002c00 0x0200>,
|
||||
<0x1000b000 0x1000>;
|
||||
reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",
|
||||
"iocfg_br", "iocfg_lm", "iocfg_rb",
|
||||
"iocfg_tl", "eint";
|
||||
reg-names = "iocfg0", "iocfg_lt", "iocfg_lm",
|
||||
"iocfg_lb", "iocfg_bl", "iocfg_rb",
|
||||
"iocfg_rt", "eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 185>;
|
||||
|
@ -24,6 +24,7 @@ properties:
|
||||
- qcom,pm6150-gpio
|
||||
- qcom,pm6150l-gpio
|
||||
- qcom,pm6350-gpio
|
||||
- qcom,pm7250b-gpio
|
||||
- qcom,pm7325-gpio
|
||||
- qcom,pm8005-gpio
|
||||
- qcom,pm8008-gpio
|
||||
@ -231,6 +232,7 @@ allOf:
|
||||
enum:
|
||||
- qcom,pm660l-gpio
|
||||
- qcom,pm6150l-gpio
|
||||
- qcom,pm7250b-gpio
|
||||
- qcom,pm8038-gpio
|
||||
- qcom,pm8150b-gpio
|
||||
- qcom,pm8150l-gpio
|
||||
@ -392,6 +394,7 @@ $defs:
|
||||
- gpio1-gpio10 for pm6150
|
||||
- gpio1-gpio12 for pm6150l
|
||||
- gpio1-gpio9 for pm6350
|
||||
- gpio1-gpio12 for pm7250b
|
||||
- gpio1-gpio10 for pm7325
|
||||
- gpio1-gpio4 for pm8005
|
||||
- gpio1-gpio2 for pm8008
|
||||
@ -407,6 +410,7 @@ $defs:
|
||||
- gpio1-gpio10 for pm8350
|
||||
- gpio1-gpio8 for pm8350b
|
||||
- gpio1-gpio9 for pm8350c
|
||||
- gpio1-gpio4 for pm8450
|
||||
- gpio1-gpio38 for pm8917
|
||||
- gpio1-gpio44 for pm8921
|
||||
- gpio1-gpio36 for pm8941
|
||||
|
@ -42,6 +42,9 @@ properties:
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
gpio-line-names:
|
||||
maxItems: 174
|
||||
|
||||
wakeup-parent: true
|
||||
|
||||
#PIN CONFIGURATION NODES
|
||||
@ -51,7 +54,6 @@ patternProperties:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "/schemas/pinctrl/pincfg-node.yaml"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -60,7 +62,7 @@ patternProperties:
|
||||
subnode.
|
||||
items:
|
||||
oneOf:
|
||||
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$"
|
||||
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
|
||||
- enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
|
||||
sdc2_cmd, sdc2_data, ufs_reset ]
|
||||
minItems: 1
|
||||
@ -118,12 +120,21 @@ patternProperties:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/pinctrl/pincfg-node.yaml
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: "pinctrl.yaml#"
|
||||
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -139,22 +150,22 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
tlmm: pinctrl@f000000 {
|
||||
compatible = "qcom,sc7280-pinctrl";
|
||||
reg = <0xf000000 0x1000000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 175>;
|
||||
wakeup-parent = <&pdc>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
tlmm: pinctrl@f000000 {
|
||||
compatible = "qcom,sc7280-pinctrl";
|
||||
reg = <0xf000000 0x1000000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 175>;
|
||||
wakeup-parent = <&pdc>;
|
||||
|
||||
qup_uart5_default: qup-uart5-pins {
|
||||
pins = "gpio46", "gpio47";
|
||||
function = "qup13";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
qup_uart5_default: qup-uart5-pins {
|
||||
pins = "gpio46", "gpio47";
|
||||
function = "qup13";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
@ -51,8 +51,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sc8180x-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sc8180x-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
'$defs':
|
||||
qcom-sc8180x-tlmm-state:
|
||||
@ -60,7 +61,6 @@ patternProperties:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -111,43 +111,52 @@ patternProperties:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@3100000 {
|
||||
compatible = "qcom,sc8180x-tlmm";
|
||||
reg = <0x03100000 0x300000>,
|
||||
<0x03500000 0x700000>,
|
||||
<0x03d00000 0x300000>;
|
||||
reg-names = "west", "east", "south";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 190>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@3100000 {
|
||||
compatible = "qcom,sc8180x-tlmm";
|
||||
reg = <0x03100000 0x300000>,
|
||||
<0x03500000 0x700000>,
|
||||
<0x03d00000 0x300000>;
|
||||
reg-names = "west", "east", "south";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 190>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio4";
|
||||
function = "qup6";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio5";
|
||||
function = "qup6";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx-pins {
|
||||
pins = "gpio4";
|
||||
function = "qup6";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio5";
|
||||
function = "qup6";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -0,0 +1,133 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
|
||||
Low Power Island (LPI) TLMM block
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
This binding describes the Top Level Mode Multiplexer block found in the
|
||||
LPASS LPI IP on most Qualcomm SoCs
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc8280xp-lpass-lpi-pinctrl
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: LPASS LPI TLMM Control and Status registers
|
||||
- description: LPASS LPI pins SLEW registers
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: LPASS Core voting clock
|
||||
- description: LPASS Audio voting clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: audio
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
description: Specifying the pin number and flags, as defined in
|
||||
include/dt-bindings/gpio/gpio.h
|
||||
const: 2
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
#PIN CONFIGURATION NODES
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: /schemas/pinctrl/pincfg-node.yaml
|
||||
|
||||
properties:
|
||||
pins:
|
||||
description:
|
||||
List of gpio pins affected by the properties specified in this
|
||||
subnode.
|
||||
items:
|
||||
pattern: "^gpio([0-1]|1[0-8]])$"
|
||||
|
||||
function:
|
||||
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,
|
||||
dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk,
|
||||
dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data,
|
||||
qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws,
|
||||
i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk,
|
||||
wsa2_swr_data, i2s2_data, i2s3_clk, i2s3_ws, i2s3_data,
|
||||
ext_mclk1_c, ext_mclk1_b, ext_mclk1_a ]
|
||||
description:
|
||||
Specify the alternative function to be configured for the specified
|
||||
pins.
|
||||
|
||||
drive-strength:
|
||||
enum: [2, 4, 6, 8, 10, 12, 14, 16]
|
||||
default: 2
|
||||
description:
|
||||
Selects the drive strength for the specified pins, in mA.
|
||||
|
||||
slew-rate:
|
||||
enum: [0, 1, 2, 3]
|
||||
default: 0
|
||||
description: |
|
||||
0: No adjustments
|
||||
1: Higher Slew rate (faster edges)
|
||||
2: Lower Slew rate (slower edges)
|
||||
3: Reserved (No adjustments)
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
output-high: true
|
||||
|
||||
output-low: true
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: pinctrl.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
- gpio-ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/sound/qcom,q6afe.h>
|
||||
pinctrl@33c0000 {
|
||||
compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
|
||||
reg = <0x33c0000 0x20000>,
|
||||
<0x3550000 0x10000>;
|
||||
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
|
||||
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
|
||||
clock-names = "core", "audio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&lpi_tlmm 0 0 18>;
|
||||
};
|
@ -43,8 +43,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sc8280xp-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sc8280xp-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
'$defs':
|
||||
qcom-sc8280xp-tlmm-state:
|
||||
@ -52,7 +53,6 @@ patternProperties:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -112,40 +112,49 @@ patternProperties:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sc8280xp-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 230>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sc8280xp-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 230>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio4";
|
||||
function = "qup14";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio5";
|
||||
function = "qup14";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx-pins {
|
||||
pins = "gpio4";
|
||||
function = "qup14";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio5";
|
||||
function = "qup14";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -49,6 +49,8 @@ properties:
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
gpio-reserved-ranges: true
|
||||
|
||||
wakeup-parent: true
|
||||
|
||||
#PIN CONFIGURATION NODES
|
||||
@ -57,8 +59,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm6115-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm6115-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
'$defs':
|
||||
qcom-sm6115-tlmm-state:
|
||||
@ -66,7 +69,6 @@ patternProperties:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -118,6 +120,16 @@ patternProperties:
|
||||
required:
|
||||
- pins
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
@ -138,44 +150,44 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
tlmm: pinctrl@500000 {
|
||||
compatible = "qcom,sm6115-tlmm";
|
||||
reg = <0x500000 0x400000>,
|
||||
<0x900000 0x400000>,
|
||||
<0xd00000 0x400000>;
|
||||
reg-names = "west", "south", "east";
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 114>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
tlmm: pinctrl@500000 {
|
||||
compatible = "qcom,sm6115-tlmm";
|
||||
reg = <0x500000 0x400000>,
|
||||
<0x900000 0x400000>,
|
||||
<0xd00000 0x400000>;
|
||||
reg-names = "west", "south", "east";
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 114>;
|
||||
|
||||
sdc2_on_state: sdc2-on-state {
|
||||
clk {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
sdc2_on_state: sdc2-on-state {
|
||||
clk-pins {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
|
||||
cmd {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
cmd-pins {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
data {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
data-pins {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
sd-cd {
|
||||
pins = "gpio88";
|
||||
function = "gpio";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
sd-cd-pins {
|
||||
pins = "gpio88";
|
||||
function = "gpio";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -51,8 +51,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm6125-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm6125-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-sm6125-tlmm-state:
|
||||
@ -60,7 +61,6 @@ $defs:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -111,23 +111,52 @@ $defs:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@500000 {
|
||||
compatible = "qcom,sm6125-tlmm";
|
||||
reg = <0x00500000 0x400000>,
|
||||
<0x00900000 0x400000>,
|
||||
<0x00d00000 0x400000>;
|
||||
reg-names = "west", "south", "east";
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&tlmm 0 0 134>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@500000 {
|
||||
compatible = "qcom,sm6125-tlmm";
|
||||
reg = <0x00500000 0x400000>,
|
||||
<0x00900000 0x400000>,
|
||||
<0x00d00000 0x400000>;
|
||||
reg-names = "west", "south", "east";
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&tlmm 0 0 134>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
sdc2-off-state {
|
||||
clk-pins {
|
||||
pins = "sdc2_clk";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
cmd-pins {
|
||||
pins = "sdc2_cmd";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
data-pins {
|
||||
pins = "sdc2_data";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -44,8 +44,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm6350-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm6350-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-sm6350-tlmm-state:
|
||||
@ -53,7 +54,6 @@ $defs:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -110,40 +110,49 @@ $defs:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm6350-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 157>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm6350-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 157>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio25";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio26";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx-pins {
|
||||
pins = "gpio25";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio26";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -44,8 +44,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm6375-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm6375-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-sm6375-tlmm-state:
|
||||
@ -53,7 +54,6 @@ $defs:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -119,40 +119,49 @@ $defs:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@500000 {
|
||||
compatible = "qcom,sm6375-tlmm";
|
||||
reg = <0x00500000 0x800000>;
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 157>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@500000 {
|
||||
compatible = "qcom,sm6375-tlmm";
|
||||
reg = <0x00500000 0x800000>;
|
||||
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 157>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio18";
|
||||
function = "qup13_f2";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio19";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx-pins {
|
||||
pins = "gpio18";
|
||||
function = "qup13_f2";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio19";
|
||||
function = "qup13_f2";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -110,7 +110,16 @@ patternProperties:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@ -132,18 +141,18 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@1f00000 {
|
||||
compatible = "qcom,sm8250-pinctrl";
|
||||
reg = <0x0f100000 0x300000>,
|
||||
<0x0f500000 0x300000>,
|
||||
<0x0f900000 0x300000>;
|
||||
reg-names = "west", "south", "north";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 180>;
|
||||
wakeup-parent = <&pdc>;
|
||||
};
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@1f00000 {
|
||||
compatible = "qcom,sm8250-pinctrl";
|
||||
reg = <0x0f100000 0x300000>,
|
||||
<0x0f500000 0x300000>,
|
||||
<0x0f900000 0x300000>;
|
||||
reg-names = "west", "south", "north";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 180>;
|
||||
wakeup-parent = <&pdc>;
|
||||
};
|
||||
|
@ -44,8 +44,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm8350-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm8350-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-sm8350-tlmm-state:
|
||||
@ -53,7 +54,6 @@ $defs:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -107,40 +107,49 @@ $defs:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm8350-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 203>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm8350-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 203>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio18";
|
||||
function = "qup3";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio19";
|
||||
function = "qup3";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx-pins {
|
||||
pins = "gpio18";
|
||||
function = "qup3";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio19";
|
||||
function = "qup3";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -0,0 +1,135 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
|
||||
Low Power Island (LPI) TLMM block
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
This binding describes the Top Level Mode Multiplexer block found in the
|
||||
LPASS LPI IP on most Qualcomm SoCs
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sm8450-lpass-lpi-pinctrl
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: LPASS LPI TLMM Control and Status registers
|
||||
- description: LPASS LPI pins SLEW registers
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: LPASS Core voting clock
|
||||
- description: LPASS Audio voting clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: audio
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
description: Specifying the pin number and flags, as defined in
|
||||
include/dt-bindings/gpio/gpio.h
|
||||
const: 2
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
|
||||
#PIN CONFIGURATION NODES
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: /schemas/pinctrl/pincfg-node.yaml
|
||||
|
||||
properties:
|
||||
pins:
|
||||
description:
|
||||
List of gpio pins affected by the properties specified in this
|
||||
subnode.
|
||||
items:
|
||||
pattern: "^gpio([0-9]|[1-2][0-9]])$"
|
||||
|
||||
function:
|
||||
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,
|
||||
dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk,
|
||||
dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data,
|
||||
qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws,
|
||||
i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk,
|
||||
wsa2_swr_data, i2s2_data, i2s4_ws, i2s4_clk, i2s4_data,
|
||||
slimbus_clk, i2s3_clk, i2s3_ws, i2s3_data, slimbus_data,
|
||||
ext_mclk1_c, ext_mclk1_b, ext_mclk1_a, ext_mclk1_d,
|
||||
ext_mclk1_e ]
|
||||
description:
|
||||
Specify the alternative function to be configured for the specified
|
||||
pins.
|
||||
|
||||
drive-strength:
|
||||
enum: [2, 4, 6, 8, 10, 12, 14, 16]
|
||||
default: 2
|
||||
description:
|
||||
Selects the drive strength for the specified pins, in mA.
|
||||
|
||||
slew-rate:
|
||||
enum: [0, 1, 2, 3]
|
||||
default: 0
|
||||
description: |
|
||||
0: No adjustments
|
||||
1: Higher Slew rate (faster edges)
|
||||
2: Lower Slew rate (slower edges)
|
||||
3: Reserved (No adjustments)
|
||||
|
||||
bias-pull-down: true
|
||||
|
||||
bias-pull-up: true
|
||||
|
||||
bias-disable: true
|
||||
|
||||
output-high: true
|
||||
|
||||
output-low: true
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: pinctrl.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
- gpio-ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/sound/qcom,q6afe.h>
|
||||
pinctrl@3440000 {
|
||||
compatible = "qcom,sm8450-lpass-lpi-pinctrl";
|
||||
reg = <0x3440000 0x20000>,
|
||||
<0x34d0000 0x10000>;
|
||||
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
|
||||
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
|
||||
clock-names = "core", "audio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&lpi_tlmm 0 0 23>;
|
||||
};
|
@ -27,7 +27,14 @@ properties:
|
||||
interrupt-controller: true
|
||||
'#interrupt-cells': true
|
||||
gpio-controller: true
|
||||
gpio-reserved-ranges: true
|
||||
|
||||
gpio-reserved-ranges:
|
||||
minItems: 1
|
||||
maxItems: 105
|
||||
|
||||
gpio-line-names:
|
||||
maxItems: 209
|
||||
|
||||
'#gpio-cells': true
|
||||
gpio-ranges: true
|
||||
wakeup-parent: true
|
||||
@ -43,8 +50,9 @@ patternProperties:
|
||||
oneOf:
|
||||
- $ref: "#/$defs/qcom-sm8450-tlmm-state"
|
||||
- patternProperties:
|
||||
".*":
|
||||
"-pins$":
|
||||
$ref: "#/$defs/qcom-sm8450-tlmm-state"
|
||||
additionalProperties: false
|
||||
|
||||
$defs:
|
||||
qcom-sm8450-tlmm-state:
|
||||
@ -52,7 +60,6 @@ $defs:
|
||||
description:
|
||||
Pinctrl node's client devices use subnodes for desired pin configuration.
|
||||
Client device subnodes use below standard properties.
|
||||
$ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
|
||||
properties:
|
||||
pins:
|
||||
@ -104,40 +111,49 @@ $defs:
|
||||
|
||||
required:
|
||||
- pins
|
||||
- function
|
||||
|
||||
allOf:
|
||||
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
|
||||
- if:
|
||||
properties:
|
||||
pins:
|
||||
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
|
||||
then:
|
||||
required:
|
||||
- function
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm8450-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 211>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pinctrl@f100000 {
|
||||
compatible = "qcom,sm8450-tlmm";
|
||||
reg = <0x0f100000 0x300000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&tlmm 0 0 211>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
gpio-wo-subnode-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-subnodes-state {
|
||||
rx {
|
||||
pins = "gpio26";
|
||||
function = "qup7";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
pins = "gpio27";
|
||||
function = "qup7";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
gpio-wo-state {
|
||||
pins = "gpio1";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
uart-w-state {
|
||||
rx-pins {
|
||||
pins = "gpio26";
|
||||
function = "qup7";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx-pins {
|
||||
pins = "gpio27";
|
||||
function = "qup7";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
@ -41,6 +41,7 @@ required:
|
||||
patternProperties:
|
||||
"^gpio-[0-9]*$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description:
|
||||
Each port of the r7s72100 pin controller hardware is itself a GPIO
|
||||
|
@ -23,7 +23,7 @@ properties:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2}
|
||||
- renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
|
||||
- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
|
||||
|
||||
- items:
|
||||
|
@ -47,6 +47,7 @@ properties:
|
||||
- rockchip,rk3568-pinctrl
|
||||
- rockchip,rk3588-pinctrl
|
||||
- rockchip,rv1108-pinctrl
|
||||
- rockchip,rv1126-pinctrl
|
||||
|
||||
rockchip,grf:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
|
@ -20,7 +20,6 @@ description: |
|
||||
The values used for config properties should be derived from the hardware
|
||||
manual and these values are programmed as-is into the pin pull up/down and
|
||||
driver strength register of the pin-controller.
|
||||
See also include/dt-bindings/pinctrl/samsung.h with useful constants.
|
||||
|
||||
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
|
||||
additional information and example.
|
||||
|
@ -15,9 +15,6 @@ description: |
|
||||
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
|
||||
controller.
|
||||
|
||||
Pin group settings (like drive strength, pull up/down) are available as
|
||||
macros in include/dt-bindings/pinctrl/samsung.h.
|
||||
|
||||
All the pin controller nodes should be represented in the aliases node using
|
||||
the following format 'pinctrl{n}' where n is a unique number for the alias.
|
||||
|
||||
@ -97,6 +94,9 @@ patternProperties:
|
||||
additionalProperties: false
|
||||
|
||||
"^(initial|sleep)-state$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
"^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
|
||||
$ref: samsung,pinctrl-pins-cfg.yaml
|
||||
@ -138,8 +138,6 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/pinctrl/samsung.h>
|
||||
|
||||
pinctrl@7f008000 {
|
||||
compatible = "samsung,s3c64xx-pinctrl";
|
||||
reg = <0x7f008000 0x1000>;
|
||||
@ -166,8 +164,8 @@ examples:
|
||||
|
||||
uart0-data-pins {
|
||||
samsung,pins = "gpa-0", "gpa-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <0>;
|
||||
};
|
||||
|
||||
// ...
|
||||
@ -175,7 +173,6 @@ examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/samsung.h>
|
||||
|
||||
pinctrl@11400000 {
|
||||
compatible = "samsung,exynos4210-pinctrl";
|
||||
@ -197,9 +194,9 @@ examples:
|
||||
|
||||
uart0-data-pins {
|
||||
samsung,pins = "gpa0-0", "gpa0-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
// ...
|
||||
@ -207,14 +204,14 @@ examples:
|
||||
sleep0: sleep-state {
|
||||
gpa0-0-pin {
|
||||
samsung,pins = "gpa0-0";
|
||||
samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>;
|
||||
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-con-pdn = <2>;
|
||||
samsung,pin-pud-pdn = <0>;
|
||||
};
|
||||
|
||||
gpa0-1-pin {
|
||||
samsung,pins = "gpa0-1";
|
||||
samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT0>;
|
||||
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-con-pdn = <0>;
|
||||
samsung,pin-pud-pdn = <0>;
|
||||
};
|
||||
|
||||
// ...
|
||||
@ -223,7 +220,6 @@ examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/samsung.h>
|
||||
|
||||
pinctrl@11000000 {
|
||||
compatible = "samsung,exynos4210-pinctrl";
|
||||
@ -272,26 +268,26 @@ examples:
|
||||
|
||||
sd0-clk-pins {
|
||||
samsung,pins = "gpk0-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <3>;
|
||||
};
|
||||
|
||||
sd4-bus-width8-pins {
|
||||
part-1-pins {
|
||||
samsung,pins = "gpk0-3", "gpk0-4",
|
||||
"gpk0-5", "gpk0-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
|
||||
samsung,pin-function = <3>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <3>;
|
||||
};
|
||||
|
||||
part-2-pins {
|
||||
samsung,pins = "gpk1-3", "gpk1-4",
|
||||
"gpk1-5", "gpk1-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
|
||||
samsung,pin-function = <4>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -299,16 +295,15 @@ examples:
|
||||
|
||||
otg-gp-pins {
|
||||
samsung,pins = "gpx3-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
samsung,pin-function = <1>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <0>;
|
||||
samsung,pin-val = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/samsung.h>
|
||||
|
||||
pinctrl@10580000 {
|
||||
compatible = "samsung,exynos5433-pinctrl";
|
||||
@ -352,9 +347,9 @@ examples:
|
||||
initial_alive: initial-state {
|
||||
gpa0-0-pin {
|
||||
samsung,pins = "gpa0-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
|
||||
samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
|
||||
samsung,pin-function = <0>;
|
||||
samsung,pin-pud = <1>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
// ...
|
||||
@ -363,7 +358,6 @@ examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/samsung.h>
|
||||
|
||||
pinctrl@114b0000 {
|
||||
compatible = "samsung,exynos5433-pinctrl";
|
||||
@ -384,9 +378,9 @@ examples:
|
||||
i2s0-bus-pins {
|
||||
samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
|
||||
"gpz0-4", "gpz0-5", "gpz0-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
// ...
|
||||
|
@ -64,6 +64,9 @@ patternProperties:
|
||||
gpio-controller: true
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
interrupt-controller: true
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -71,6 +74,7 @@ patternProperties:
|
||||
maxItems: 1
|
||||
resets:
|
||||
maxItems: 1
|
||||
gpio-line-names: true
|
||||
gpio-ranges:
|
||||
minItems: 1
|
||||
maxItems: 16
|
||||
@ -106,6 +110,12 @@ patternProperties:
|
||||
minimum: 0
|
||||
maximum: 11
|
||||
|
||||
patternProperties:
|
||||
"^(.+-hog(-[0-9]+)?)$":
|
||||
type: object
|
||||
required:
|
||||
- gpio-hog
|
||||
|
||||
required:
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
@ -115,9 +125,12 @@ patternProperties:
|
||||
|
||||
'-[0-9]*$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
'^pins':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description: |
|
||||
A pinctrl node should contain at least one subnode representing the
|
||||
pinctrl group available on the machine. Each subnode will list the
|
||||
|
@ -165,7 +165,7 @@ examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/starfive-jh7100.h>
|
||||
#include <dt-bindings/reset/starfive-jh7100.h>
|
||||
#include <dt-bindings/pinctrl/pinctrl-starfive.h>
|
||||
#include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
|
@ -36,6 +36,7 @@ patternProperties:
|
||||
pins it needs, and how they should be configured, with regard to muxer
|
||||
configuration, pullups, drive strength.
|
||||
$ref: "pinmux-node.yaml"
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
function:
|
||||
|
@ -235,6 +235,12 @@ A few EV_ABS codes have special meanings:
|
||||
BTN_TOOL_<name> signals the type of tool that is currently detected by the
|
||||
hardware and is otherwise independent of ABS_DISTANCE and/or BTN_TOUCH.
|
||||
|
||||
* ABS_PROFILE:
|
||||
|
||||
- Used to describe the state of a multi-value profile switch. An event is
|
||||
emitted only when the selected profile changes, indicating the newly
|
||||
selected profile value.
|
||||
|
||||
* ABS_MT_<name>:
|
||||
|
||||
- Used to describe multitouch input events. Please see
|
||||
|
@ -189,3 +189,9 @@ Gamepads report the following events:
|
||||
- Rumble:
|
||||
|
||||
Rumble is advertised as FF_RUMBLE.
|
||||
|
||||
- Profile:
|
||||
|
||||
Some pads provide a multi-value profile selection switch. An example is the
|
||||
XBox Adaptive and the XBox Elite 2 controllers. When the active profile is
|
||||
switched, its newly selected value is emitted as an ABS_PROFILE event.
|
||||
|
37
MAINTAINERS
37
MAINTAINERS
@ -554,7 +554,7 @@ M: Michael Hennerich <michael.hennerich@analog.com>
|
||||
S: Supported
|
||||
W: http://wiki.analog.com/ADP5588
|
||||
W: https://ez.analog.com/linux-software-drivers
|
||||
F: drivers/gpio/gpio-adp5588.c
|
||||
F: Documentation/devicetree/bindings/input/adi,adp5588.yaml
|
||||
F: drivers/input/keyboard/adp5588-keys.c
|
||||
|
||||
ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863)
|
||||
@ -5170,6 +5170,7 @@ M: Steve French <sfrench@samba.org>
|
||||
R: Paulo Alcantara <pc@cjr.nz> (DFS, global name space)
|
||||
R: Ronnie Sahlberg <lsahlber@redhat.com> (directory leases, sparse files)
|
||||
R: Shyam Prasad N <sprasad@microsoft.com> (multichannel)
|
||||
R: Tom Talpey <tom@talpey.com> (RDMA, smbdirect)
|
||||
L: linux-cifs@vger.kernel.org
|
||||
L: samba-technical@lists.samba.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
@ -5664,6 +5665,12 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/
|
||||
T: git git://linuxtv.org/anttip/media_tree.git
|
||||
F: drivers/media/common/cypress_firmware*
|
||||
|
||||
CYPRESS CY8C95X0 PINCTRL DRIVER
|
||||
M: Patrick Rudolph <patrick.rudolph@9elements.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/pinctrl-cy8c95x0.c
|
||||
|
||||
CYPRESS CY8CTMA140 TOUCHSCREEN DRIVER
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
@ -9712,6 +9719,13 @@ S: Orphan
|
||||
F: Documentation/ia64/
|
||||
F: arch/ia64/
|
||||
|
||||
IBM Operation Panel Input Driver
|
||||
M: Eddie James <eajames@linux.ibm.com>
|
||||
L: linux-input@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/input/ibm,op-panel.yaml
|
||||
F: drivers/input/misc/ibm-panel.c
|
||||
|
||||
IBM Power 842 compression accelerator
|
||||
M: Haren Myneni <haren@us.ibm.com>
|
||||
S: Supported
|
||||
@ -12931,6 +12945,12 @@ S: Supported
|
||||
F: Documentation/devicetree/bindings/media/mediatek-jpeg-*.yaml
|
||||
F: drivers/media/platform/mediatek/jpeg/
|
||||
|
||||
MEDIATEK KEYPAD DRIVER
|
||||
M: Mattijs Korpershoek <mkorpershoek@baylibre.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml
|
||||
F: drivers/input/keyboard/mt6779-keypad.c
|
||||
|
||||
MEDIATEK MDP DRIVER
|
||||
M: Minghsiu Tsai <minghsiu.tsai@mediatek.com>
|
||||
M: Houlong Wei <houlong.wei@mediatek.com>
|
||||
@ -15852,6 +15872,7 @@ PCI ENDPOINT SUBSYSTEM
|
||||
M: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
M: Lorenzo Pieralisi <lpieralisi@kernel.org>
|
||||
R: Krzysztof Wilczyński <kw@linux.com>
|
||||
R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
Q: https://patchwork.kernel.org/project/linux-pci/list/
|
||||
@ -15865,8 +15886,8 @@ F: drivers/pci/endpoint/
|
||||
F: tools/pci/
|
||||
|
||||
PCI ENHANCED ERROR HANDLING (EEH) FOR POWERPC
|
||||
M: Russell Currey <ruscur@russell.cc>
|
||||
M: Oliver O'Halloran <oohall@gmail.com>
|
||||
M: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
|
||||
R: Oliver O'Halloran <oohall@gmail.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Supported
|
||||
F: Documentation/PCI/pci-error-recovery.rst
|
||||
@ -16343,6 +16364,12 @@ F: Documentation/devicetree/bindings/pinctrl/sunplus,*
|
||||
F: drivers/pinctrl/sunplus/
|
||||
F: include/dt-bindings/pinctrl/sppctl*.h
|
||||
|
||||
PINE64 PINEPHONE KEYBOARD DRIVER
|
||||
M: Samuel Holland <samuel@sholland.org>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml
|
||||
F: drivers/input/keyboard/pinephone-keyboard.c
|
||||
|
||||
PKTCDVD DRIVER
|
||||
M: linux-block@vger.kernel.org
|
||||
S: Orphan
|
||||
@ -19593,8 +19620,8 @@ M: Emil Renner Berthing <kernel@esmil.dk>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
|
||||
F: drivers/pinctrl/pinctrl-starfive.c
|
||||
F: include/dt-bindings/pinctrl/pinctrl-starfive.h
|
||||
F: drivers/pinctrl/starfive/
|
||||
F: include/dt-bindings/pinctrl/pinctrl-starfive-jh7100.h
|
||||
|
||||
STARFIVE JH7100 RESET CONTROLLER DRIVER
|
||||
M: Emil Renner Berthing <kernel@esmil.dk>
|
||||
|
@ -1278,18 +1278,6 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
|
||||
return addr;
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE3(osf_readv, unsigned long, fd,
|
||||
const struct iovec __user *, vector, unsigned long, count)
|
||||
{
|
||||
return sys_readv(fd, vector, count);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE3(osf_writev, unsigned long, fd,
|
||||
const struct iovec __user *, vector, unsigned long, count)
|
||||
{
|
||||
return sys_writev(fd, vector, count);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE2(osf_getpriority, int, which, int, who)
|
||||
{
|
||||
int prio = sys_getpriority(which, who);
|
||||
|
@ -125,8 +125,8 @@
|
||||
116 common osf_gettimeofday sys_osf_gettimeofday
|
||||
117 common osf_getrusage sys_osf_getrusage
|
||||
118 common getsockopt sys_getsockopt
|
||||
120 common readv sys_osf_readv
|
||||
121 common writev sys_osf_writev
|
||||
120 common readv sys_readv
|
||||
121 common writev sys_writev
|
||||
122 common osf_settimeofday sys_osf_settimeofday
|
||||
123 common fchown sys_fchown
|
||||
124 common fchmod sys_fchmod
|
||||
|
@ -19,8 +19,6 @@
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
#include <linux/platform_data/atmel.h>
|
||||
|
||||
#include <soc/at91/pm.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/fncpy.h>
|
||||
#include <asm/system_misc.h>
|
||||
@ -656,16 +654,6 @@ static int at91_pm_enter(suspend_state_t state)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
/*
|
||||
* FIXME: this is needed to communicate between the pinctrl driver and
|
||||
* the PM implementation in the machine. Possibly part of the PM
|
||||
* implementation should be moved down into the pinctrl driver and get
|
||||
* called as part of the generic suspend/resume path.
|
||||
*/
|
||||
at91_pinctrl_gpio_suspend();
|
||||
#endif
|
||||
|
||||
switch (state) {
|
||||
case PM_SUSPEND_MEM:
|
||||
case PM_SUSPEND_STANDBY:
|
||||
@ -690,9 +678,6 @@ static int at91_pm_enter(suspend_state_t state)
|
||||
}
|
||||
|
||||
error:
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
at91_pinctrl_gpio_resume();
|
||||
#endif
|
||||
at91_pm_config_quirks(false);
|
||||
return 0;
|
||||
}
|
||||
|
@ -121,7 +121,7 @@ obj-$(CONFIG_PPC_BOOK3S_32) += head_book3s_32.o
|
||||
obj-$(CONFIG_40x) += head_40x.o
|
||||
obj-$(CONFIG_44x) += head_44x.o
|
||||
obj-$(CONFIG_PPC_8xx) += head_8xx.o
|
||||
obj-$(CONFIG_FSL_BOOKE) += head_85xx.o
|
||||
obj-$(CONFIG_PPC_85xx) += head_85xx.o
|
||||
extra-y += vmlinux.lds
|
||||
|
||||
obj-$(CONFIG_RELOCATABLE) += reloc_$(BITS).o
|
||||
|
@ -8,7 +8,7 @@
|
||||
#include "jh7100.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/pinctrl/pinctrl-starfive.h>
|
||||
#include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
|
||||
|
||||
/ {
|
||||
model = "BeagleV Starlight Beta";
|
||||
|
@ -119,13 +119,13 @@ config ASPEED_KCS_IPMI_BMC
|
||||
provides the access of KCS IO space for BMC side.
|
||||
|
||||
config NPCM7XX_KCS_IPMI_BMC
|
||||
depends on ARCH_NPCM7XX || COMPILE_TEST
|
||||
depends on ARCH_NPCM || COMPILE_TEST
|
||||
select IPMI_KCS_BMC
|
||||
select REGMAP_MMIO
|
||||
tristate "NPCM7xx KCS IPMI BMC driver"
|
||||
tristate "NPCM KCS IPMI BMC driver"
|
||||
help
|
||||
Provides a driver for the KCS (Keyboard Controller Style) IPMI
|
||||
interface found on Nuvoton NPCM7xx SOCs.
|
||||
interface found on Nuvoton NPCM SOCs.
|
||||
|
||||
The driver implements the BMC side of the KCS contorller, it
|
||||
provides the access of KCS IO space for BMC side.
|
||||
|
@ -218,8 +218,8 @@ static void ipmi_ipmb_send_response(struct ipmi_ipmb_dev *iidev,
|
||||
{
|
||||
if ((msg->data[0] >> 2) & 1) {
|
||||
/*
|
||||
* It's a response being sent, we needto return a
|
||||
* response response. Fake a send msg command
|
||||
* It's a response being sent, we need to return a
|
||||
* response to the response. Fake a send msg command
|
||||
* response with channel 0. This will always be ipmb
|
||||
* direct.
|
||||
*/
|
||||
@ -424,10 +424,8 @@ static void ipmi_ipmb_request_events(void *send_info)
|
||||
/* We don't fetch events here. */
|
||||
}
|
||||
|
||||
static void ipmi_ipmb_remove(struct i2c_client *client)
|
||||
static void ipmi_ipmb_cleanup(struct ipmi_ipmb_dev *iidev)
|
||||
{
|
||||
struct ipmi_ipmb_dev *iidev = i2c_get_clientdata(client);
|
||||
|
||||
if (iidev->slave) {
|
||||
i2c_slave_unregister(iidev->slave);
|
||||
if (iidev->slave != iidev->client)
|
||||
@ -436,7 +434,13 @@ static void ipmi_ipmb_remove(struct i2c_client *client)
|
||||
iidev->slave = NULL;
|
||||
iidev->client = NULL;
|
||||
ipmi_ipmb_stop_thread(iidev);
|
||||
}
|
||||
|
||||
static void ipmi_ipmb_remove(struct i2c_client *client)
|
||||
{
|
||||
struct ipmi_ipmb_dev *iidev = i2c_get_clientdata(client);
|
||||
|
||||
ipmi_ipmb_cleanup(iidev);
|
||||
ipmi_unregister_smi(iidev->intf);
|
||||
}
|
||||
|
||||
@ -542,7 +546,7 @@ static int ipmi_ipmb_probe(struct i2c_client *client)
|
||||
out_err:
|
||||
if (slave && slave != client)
|
||||
i2c_unregister_device(slave);
|
||||
ipmi_ipmb_remove(client);
|
||||
ipmi_ipmb_cleanup(iidev);
|
||||
return rv;
|
||||
}
|
||||
|
||||
|
@ -736,12 +736,6 @@ static void intf_free(struct kref *ref)
|
||||
kfree(intf);
|
||||
}
|
||||
|
||||
struct watcher_entry {
|
||||
int intf_num;
|
||||
struct ipmi_smi *intf;
|
||||
struct list_head link;
|
||||
};
|
||||
|
||||
int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher)
|
||||
{
|
||||
struct ipmi_smi *intf;
|
||||
@ -4357,7 +4351,7 @@ static int handle_oem_get_msg_cmd(struct ipmi_smi *intf,
|
||||
|
||||
/*
|
||||
* The message starts at byte 4 which follows the
|
||||
* the Channel Byte in the "GET MESSAGE" command
|
||||
* Channel Byte in the "GET MESSAGE" command
|
||||
*/
|
||||
recv_msg->msg.data_len = msg->rsp_size - 4;
|
||||
memcpy(recv_msg->msg_data, &msg->rsp[4],
|
||||
|
@ -2098,7 +2098,7 @@ static struct platform_driver ipmi_driver = {
|
||||
.id_table = ssif_plat_ids
|
||||
};
|
||||
|
||||
static int init_ipmi_ssif(void)
|
||||
static int __init init_ipmi_ssif(void)
|
||||
{
|
||||
int i;
|
||||
int rv;
|
||||
@ -2140,7 +2140,7 @@ static int init_ipmi_ssif(void)
|
||||
}
|
||||
module_init(init_ipmi_ssif);
|
||||
|
||||
static void cleanup_ipmi_ssif(void)
|
||||
static void __exit cleanup_ipmi_ssif(void)
|
||||
{
|
||||
if (!initialized)
|
||||
return;
|
||||
|
@ -207,17 +207,24 @@ static void aspeed_kcs_updateb(struct kcs_bmc_device *kcs_bmc, u32 reg, u8 mask,
|
||||
}
|
||||
|
||||
/*
|
||||
* AST_usrGuide_KCS.pdf
|
||||
* 2. Background:
|
||||
* we note D for Data, and C for Cmd/Status, default rules are
|
||||
* A. KCS1 / KCS2 ( D / C:X / X+4 )
|
||||
* D / C : CA0h / CA4h
|
||||
* D / C : CA8h / CACh
|
||||
* B. KCS3 ( D / C:XX2h / XX3h )
|
||||
* D / C : CA2h / CA3h
|
||||
* D / C : CB2h / CB3h
|
||||
* C. KCS4
|
||||
* D / C : CA4h / CA5h
|
||||
* We note D for Data, and C for Cmd/Status, default rules are
|
||||
*
|
||||
* 1. Only the D address is given:
|
||||
* A. KCS1/KCS2 (D/C: X/X+4)
|
||||
* D/C: CA0h/CA4h
|
||||
* D/C: CA8h/CACh
|
||||
* B. KCS3 (D/C: XX2/XX3h)
|
||||
* D/C: CA2h/CA3h
|
||||
* C. KCS4 (D/C: X/X+1)
|
||||
* D/C: CA4h/CA5h
|
||||
*
|
||||
* 2. Both the D/C addresses are given:
|
||||
* A. KCS1/KCS2/KCS4 (D/C: X/Y)
|
||||
* D/C: CA0h/CA1h
|
||||
* D/C: CA8h/CA9h
|
||||
* D/C: CA4h/CA5h
|
||||
* B. KCS3 (D/C: XX2/XX3h)
|
||||
* D/C: CA2h/CA3h
|
||||
*/
|
||||
static int aspeed_kcs_set_address(struct kcs_bmc_device *kcs_bmc, u32 addrs[2], int nr_addrs)
|
||||
{
|
||||
|
@ -548,7 +548,7 @@ static struct kcs_bmc_driver kcs_bmc_ipmi_driver = {
|
||||
.ops = &kcs_bmc_ipmi_driver_ops,
|
||||
};
|
||||
|
||||
static int kcs_bmc_ipmi_init(void)
|
||||
static int __init kcs_bmc_ipmi_init(void)
|
||||
{
|
||||
kcs_bmc_register_driver(&kcs_bmc_ipmi_driver);
|
||||
|
||||
@ -556,7 +556,7 @@ static int kcs_bmc_ipmi_init(void)
|
||||
}
|
||||
module_init(kcs_bmc_ipmi_init);
|
||||
|
||||
static void kcs_bmc_ipmi_exit(void)
|
||||
static void __exit kcs_bmc_ipmi_exit(void)
|
||||
{
|
||||
kcs_bmc_unregister_driver(&kcs_bmc_ipmi_driver);
|
||||
}
|
||||
|
@ -140,7 +140,7 @@ static struct kcs_bmc_driver kcs_bmc_serio_driver = {
|
||||
.ops = &kcs_bmc_serio_driver_ops,
|
||||
};
|
||||
|
||||
static int kcs_bmc_serio_init(void)
|
||||
static int __init kcs_bmc_serio_init(void)
|
||||
{
|
||||
kcs_bmc_register_driver(&kcs_bmc_serio_driver);
|
||||
|
||||
@ -148,7 +148,7 @@ static int kcs_bmc_serio_init(void)
|
||||
}
|
||||
module_init(kcs_bmc_serio_init);
|
||||
|
||||
static void kcs_bmc_serio_exit(void)
|
||||
static void __exit kcs_bmc_serio_exit(void)
|
||||
{
|
||||
kcs_bmc_unregister_driver(&kcs_bmc_serio_driver);
|
||||
}
|
||||
|
@ -567,8 +567,13 @@ static int __init dmi_present(const u8 *buf)
|
||||
{
|
||||
u32 smbios_ver;
|
||||
|
||||
/*
|
||||
* The size of this structure is 31 bytes, but we also accept value
|
||||
* 30 due to a mistake in SMBIOS specification version 2.1.
|
||||
*/
|
||||
if (memcmp(buf, "_SM_", 4) == 0 &&
|
||||
buf[5] < 32 && dmi_checksum(buf, buf[5])) {
|
||||
buf[5] >= 30 && buf[5] <= 32 &&
|
||||
dmi_checksum(buf, buf[5])) {
|
||||
smbios_ver = get_unaligned_be16(buf + 6);
|
||||
smbios_entry_point_size = buf[5];
|
||||
memcpy(smbios_entry_point, buf, smbios_entry_point_size);
|
||||
@ -629,7 +634,8 @@ static int __init dmi_present(const u8 *buf)
|
||||
static int __init dmi_smbios3_present(const u8 *buf)
|
||||
{
|
||||
if (memcmp(buf, "_SM3_", 5) == 0 &&
|
||||
buf[6] < 32 && dmi_checksum(buf, buf[6])) {
|
||||
buf[6] >= 24 && buf[6] <= 32 &&
|
||||
dmi_checksum(buf, buf[6])) {
|
||||
dmi_ver = get_unaligned_be24(buf + 7);
|
||||
dmi_num = 0; /* No longer specified */
|
||||
dmi_len = get_unaligned_le32(buf + 12);
|
||||
|
@ -990,20 +990,6 @@ endmenu
|
||||
menu "I2C GPIO expanders"
|
||||
depends on I2C
|
||||
|
||||
config GPIO_ADP5588
|
||||
tristate "ADP5588 I2C GPIO expander"
|
||||
help
|
||||
This option enables support for 18 GPIOs found
|
||||
on Analog Devices ADP5588 GPIO Expanders.
|
||||
|
||||
config GPIO_ADP5588_IRQ
|
||||
bool "Interrupt controller support for ADP5588"
|
||||
depends on GPIO_ADP5588=y
|
||||
select GPIOLIB_IRQCHIP
|
||||
help
|
||||
Say yes here to enable the adp5588 to be used as an interrupt
|
||||
controller. It requires the driver to be built in the kernel.
|
||||
|
||||
config GPIO_ADNP
|
||||
tristate "Avionic Design N-bit GPIO expander"
|
||||
depends on OF_GPIO
|
||||
|
@ -25,7 +25,6 @@ obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o
|
||||
obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o
|
||||
obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o
|
||||
obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o
|
||||
obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o
|
||||
obj-$(CONFIG_GPIO_AGGREGATOR) += gpio-aggregator.o
|
||||
obj-$(CONFIG_GPIO_ALTERA_A10SR) += gpio-altera-a10sr.o
|
||||
obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o
|
||||
|
@ -1,446 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* GPIO Chip driver for Analog Devices
|
||||
* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
|
||||
*
|
||||
* Copyright 2009-2010 Analog Devices Inc.
|
||||
*/
|
||||
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/platform_data/adp5588.h>
|
||||
|
||||
/*
|
||||
* Early pre 4.0 Silicon required to delay readout by at least 25ms,
|
||||
* since the Event Counter Register updated 25ms after the interrupt
|
||||
* asserted.
|
||||
*/
|
||||
#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
|
||||
|
||||
struct adp5588_gpio {
|
||||
struct i2c_client *client;
|
||||
struct gpio_chip gpio_chip;
|
||||
struct mutex lock; /* protect cached dir, dat_out */
|
||||
/* protect serialized access to the interrupt controller bus */
|
||||
struct mutex irq_lock;
|
||||
uint8_t dat_out[3];
|
||||
uint8_t dir[3];
|
||||
uint8_t int_lvl_low[3];
|
||||
uint8_t int_lvl_high[3];
|
||||
uint8_t int_en[3];
|
||||
uint8_t irq_mask[3];
|
||||
uint8_t int_input_en[3];
|
||||
};
|
||||
|
||||
static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
|
||||
{
|
||||
int ret = i2c_smbus_read_byte_data(client, reg);
|
||||
|
||||
if (ret < 0)
|
||||
dev_err(&client->dev, "Read Error\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
|
||||
{
|
||||
int ret = i2c_smbus_write_byte_data(client, reg, val);
|
||||
|
||||
if (ret < 0)
|
||||
dev_err(&client->dev, "Write Error\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
|
||||
{
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(chip);
|
||||
unsigned bank = ADP5588_BANK(off);
|
||||
unsigned bit = ADP5588_BIT(off);
|
||||
int val;
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
|
||||
if (dev->dir[bank] & bit)
|
||||
val = dev->dat_out[bank];
|
||||
else
|
||||
val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
|
||||
|
||||
mutex_unlock(&dev->lock);
|
||||
|
||||
return !!(val & bit);
|
||||
}
|
||||
|
||||
static void adp5588_gpio_set_value(struct gpio_chip *chip,
|
||||
unsigned off, int val)
|
||||
{
|
||||
unsigned bank, bit;
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(chip);
|
||||
|
||||
bank = ADP5588_BANK(off);
|
||||
bit = ADP5588_BIT(off);
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
if (val)
|
||||
dev->dat_out[bank] |= bit;
|
||||
else
|
||||
dev->dat_out[bank] &= ~bit;
|
||||
|
||||
adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
|
||||
dev->dat_out[bank]);
|
||||
mutex_unlock(&dev->lock);
|
||||
}
|
||||
|
||||
static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
|
||||
{
|
||||
int ret;
|
||||
unsigned bank;
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(chip);
|
||||
|
||||
bank = ADP5588_BANK(off);
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
dev->dir[bank] &= ~ADP5588_BIT(off);
|
||||
ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
|
||||
mutex_unlock(&dev->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int adp5588_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned off, int val)
|
||||
{
|
||||
int ret;
|
||||
unsigned bank, bit;
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(chip);
|
||||
|
||||
bank = ADP5588_BANK(off);
|
||||
bit = ADP5588_BIT(off);
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
dev->dir[bank] |= bit;
|
||||
|
||||
if (val)
|
||||
dev->dat_out[bank] |= bit;
|
||||
else
|
||||
dev->dat_out[bank] &= ~bit;
|
||||
|
||||
ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
|
||||
dev->dat_out[bank]);
|
||||
ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
|
||||
dev->dir[bank]);
|
||||
mutex_unlock(&dev->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_GPIO_ADP5588_IRQ
|
||||
|
||||
static void adp5588_irq_bus_lock(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
|
||||
mutex_lock(&dev->irq_lock);
|
||||
}
|
||||
|
||||
/*
|
||||
* genirq core code can issue chip->mask/unmask from atomic context.
|
||||
* This doesn't work for slow busses where an access needs to sleep.
|
||||
* bus_sync_unlock() is therefore called outside the atomic context,
|
||||
* syncs the current irq mask state with the slow external controller
|
||||
* and unlocks the bus.
|
||||
*/
|
||||
|
||||
static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
int i;
|
||||
|
||||
for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
|
||||
if (dev->int_input_en[i]) {
|
||||
mutex_lock(&dev->lock);
|
||||
dev->dir[i] &= ~dev->int_input_en[i];
|
||||
dev->int_input_en[i] = 0;
|
||||
adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
|
||||
dev->dir[i]);
|
||||
mutex_unlock(&dev->lock);
|
||||
}
|
||||
|
||||
if (dev->int_en[i] ^ dev->irq_mask[i]) {
|
||||
dev->int_en[i] = dev->irq_mask[i];
|
||||
adp5588_gpio_write(dev->client, GPI_EM1 + i,
|
||||
dev->int_en[i]);
|
||||
}
|
||||
}
|
||||
|
||||
mutex_unlock(&dev->irq_lock);
|
||||
}
|
||||
|
||||
static void adp5588_irq_mask(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
|
||||
dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
|
||||
}
|
||||
|
||||
static void adp5588_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
|
||||
dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq);
|
||||
}
|
||||
|
||||
static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
uint16_t gpio = d->hwirq;
|
||||
unsigned bank, bit;
|
||||
|
||||
bank = ADP5588_BANK(gpio);
|
||||
bit = ADP5588_BIT(gpio);
|
||||
|
||||
dev->int_lvl_low[bank] &= ~bit;
|
||||
dev->int_lvl_high[bank] &= ~bit;
|
||||
|
||||
if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH)
|
||||
dev->int_lvl_high[bank] |= bit;
|
||||
|
||||
if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW)
|
||||
dev->int_lvl_low[bank] |= bit;
|
||||
|
||||
dev->int_input_en[bank] |= bit;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip adp5588_irq_chip = {
|
||||
.name = "adp5588",
|
||||
.irq_mask = adp5588_irq_mask,
|
||||
.irq_unmask = adp5588_irq_unmask,
|
||||
.irq_bus_lock = adp5588_irq_bus_lock,
|
||||
.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
|
||||
.irq_set_type = adp5588_irq_set_type,
|
||||
};
|
||||
|
||||
static irqreturn_t adp5588_irq_handler(int irq, void *devid)
|
||||
{
|
||||
struct adp5588_gpio *dev = devid;
|
||||
int status = adp5588_gpio_read(dev->client, INT_STAT);
|
||||
|
||||
if (status & ADP5588_KE_INT) {
|
||||
int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);
|
||||
|
||||
if (ev_cnt > 0) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
|
||||
int key = adp5588_gpio_read(dev->client,
|
||||
Key_EVENTA + i);
|
||||
/* GPIN events begin at 97,
|
||||
* bit 7 indicates logic level
|
||||
*/
|
||||
int gpio = (key & 0x7f) - 97;
|
||||
int lvl = key & (1 << 7);
|
||||
int bank = ADP5588_BANK(gpio);
|
||||
int bit = ADP5588_BIT(gpio);
|
||||
|
||||
if ((lvl && dev->int_lvl_high[bank] & bit) ||
|
||||
(!lvl && dev->int_lvl_low[bank] & bit))
|
||||
handle_nested_irq(irq_find_mapping(
|
||||
dev->gpio_chip.irq.domain, gpio));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
static int adp5588_irq_init_hw(struct gpio_chip *gc)
|
||||
{
|
||||
struct adp5588_gpio *dev = gpiochip_get_data(gc);
|
||||
/* Enable IRQs after registering chip */
|
||||
adp5588_gpio_write(dev->client, CFG,
|
||||
ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int adp5588_irq_setup(struct adp5588_gpio *dev)
|
||||
{
|
||||
struct i2c_client *client = dev->client;
|
||||
int ret;
|
||||
struct adp5588_gpio_platform_data *pdata =
|
||||
dev_get_platdata(&client->dev);
|
||||
struct gpio_irq_chip *girq;
|
||||
|
||||
adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
|
||||
adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
|
||||
|
||||
mutex_init(&dev->irq_lock);
|
||||
|
||||
ret = devm_request_threaded_irq(&client->dev, client->irq,
|
||||
NULL, adp5588_irq_handler, IRQF_ONESHOT
|
||||
| IRQF_TRIGGER_FALLING | IRQF_SHARED,
|
||||
dev_name(&client->dev), dev);
|
||||
if (ret) {
|
||||
dev_err(&client->dev, "failed to request irq %d\n",
|
||||
client->irq);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* This will be registered in the call to devm_gpiochip_add_data() */
|
||||
girq = &dev->gpio_chip.irq;
|
||||
girq->chip = &adp5588_irq_chip;
|
||||
/* This will let us handle the parent IRQ in the driver */
|
||||
girq->parent_handler = NULL;
|
||||
girq->num_parents = 0;
|
||||
girq->parents = NULL;
|
||||
girq->first = pdata ? pdata->irq_base : 0;
|
||||
girq->default_type = IRQ_TYPE_NONE;
|
||||
girq->handler = handle_simple_irq;
|
||||
girq->init_hw = adp5588_irq_init_hw;
|
||||
girq->threaded = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else
|
||||
static int adp5588_irq_setup(struct adp5588_gpio *dev)
|
||||
{
|
||||
struct i2c_client *client = dev->client;
|
||||
dev_warn(&client->dev, "interrupt support not compiled in\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_GPIO_ADP5588_IRQ */
|
||||
|
||||
static int adp5588_gpio_probe(struct i2c_client *client)
|
||||
{
|
||||
struct adp5588_gpio_platform_data *pdata =
|
||||
dev_get_platdata(&client->dev);
|
||||
struct adp5588_gpio *dev;
|
||||
struct gpio_chip *gc;
|
||||
int ret, i, revid;
|
||||
unsigned int pullup_dis_mask = 0;
|
||||
|
||||
if (!i2c_check_functionality(client->adapter,
|
||||
I2C_FUNC_SMBUS_BYTE_DATA)) {
|
||||
dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev)
|
||||
return -ENOMEM;
|
||||
|
||||
dev->client = client;
|
||||
|
||||
gc = &dev->gpio_chip;
|
||||
gc->direction_input = adp5588_gpio_direction_input;
|
||||
gc->direction_output = adp5588_gpio_direction_output;
|
||||
gc->get = adp5588_gpio_get_value;
|
||||
gc->set = adp5588_gpio_set_value;
|
||||
gc->can_sleep = true;
|
||||
gc->base = -1;
|
||||
gc->parent = &client->dev;
|
||||
|
||||
if (pdata) {
|
||||
gc->base = pdata->gpio_start;
|
||||
gc->names = pdata->names;
|
||||
pullup_dis_mask = pdata->pullup_dis_mask;
|
||||
}
|
||||
|
||||
gc->ngpio = ADP5588_MAXGPIO;
|
||||
gc->label = client->name;
|
||||
gc->owner = THIS_MODULE;
|
||||
|
||||
mutex_init(&dev->lock);
|
||||
|
||||
ret = adp5588_gpio_read(dev->client, DEV_ID);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
revid = ret & ADP5588_DEVICE_ID_MASK;
|
||||
|
||||
for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
|
||||
dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
|
||||
dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
|
||||
ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
|
||||
ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
|
||||
(pullup_dis_mask >> (8 * i)) & 0xFF);
|
||||
ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (client->irq) {
|
||||
if (WA_DELAYED_READOUT_REVID(revid)) {
|
||||
dev_warn(&client->dev, "GPIO int not supported\n");
|
||||
} else {
|
||||
ret = adp5588_irq_setup(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
i2c_set_clientdata(client, dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void adp5588_gpio_remove(struct i2c_client *client)
|
||||
{
|
||||
struct adp5588_gpio *dev = i2c_get_clientdata(client);
|
||||
|
||||
if (dev->client->irq)
|
||||
free_irq(dev->client->irq, dev);
|
||||
}
|
||||
|
||||
static const struct i2c_device_id adp5588_gpio_id[] = {
|
||||
{ "adp5588-gpio" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
|
||||
|
||||
static const struct of_device_id adp5588_gpio_of_id[] = {
|
||||
{ .compatible = "adi,adp5588-gpio" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
|
||||
|
||||
static struct i2c_driver adp5588_gpio_driver = {
|
||||
.driver = {
|
||||
.name = "adp5588-gpio",
|
||||
.of_match_table = adp5588_gpio_of_id,
|
||||
},
|
||||
.probe_new = adp5588_gpio_probe,
|
||||
.remove = adp5588_gpio_remove,
|
||||
.id_table = adp5588_gpio_id,
|
||||
};
|
||||
|
||||
module_i2c_driver(adp5588_gpio_driver);
|
||||
|
||||
MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
|
||||
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
|
||||
MODULE_LICENSE("GPL");
|
@ -19,6 +19,7 @@
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
@ -156,6 +157,12 @@ static int rockchip_gpio_set_direction(struct gpio_chip *chip,
|
||||
unsigned long flags;
|
||||
u32 data = input ? 0 : 1;
|
||||
|
||||
|
||||
if (input)
|
||||
pinctrl_gpio_direction_input(bank->pin_base + offset);
|
||||
else
|
||||
pinctrl_gpio_direction_output(bank->pin_base + offset);
|
||||
|
||||
raw_spin_lock_irqsave(&bank->slock, flags);
|
||||
rockchip_gpio_writel_bit(bank, offset, data, bank->gpio_regs->port_ddr);
|
||||
raw_spin_unlock_irqrestore(&bank->slock, flags);
|
||||
|
@ -1014,7 +1014,8 @@ static const char *absolutes[ABS_CNT] = {
|
||||
[ABS_HAT3Y] = "Hat 3Y", [ABS_PRESSURE] = "Pressure",
|
||||
[ABS_DISTANCE] = "Distance", [ABS_TILT_X] = "XTilt",
|
||||
[ABS_TILT_Y] = "YTilt", [ABS_TOOL_WIDTH] = "ToolWidth",
|
||||
[ABS_VOLUME] = "Volume", [ABS_MISC] = "Misc",
|
||||
[ABS_VOLUME] = "Volume", [ABS_PROFILE] = "Profile",
|
||||
[ABS_MISC] = "Misc",
|
||||
[ABS_MT_TOUCH_MAJOR] = "MTMajor",
|
||||
[ABS_MT_TOUCH_MINOR] = "MTMinor",
|
||||
[ABS_MT_WIDTH_MAJOR] = "MTMajorW",
|
||||
|
@ -244,6 +244,7 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
|
||||
u32 command, irq_handled = 0;
|
||||
struct i2c_client *slave = bus->slave;
|
||||
u8 value;
|
||||
int ret;
|
||||
|
||||
if (!slave)
|
||||
return 0;
|
||||
@ -311,7 +312,13 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
|
||||
break;
|
||||
case ASPEED_I2C_SLAVE_WRITE_REQUESTED:
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_WRITE_RECEIVED;
|
||||
i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value);
|
||||
ret = i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value);
|
||||
/*
|
||||
* Slave ACK's on this address phase already but as the backend driver
|
||||
* returns an errno, the bus driver should nack the next incoming byte.
|
||||
*/
|
||||
if (ret < 0)
|
||||
writel(ASPEED_I2CD_M_S_RX_CMD_LAST, bus->base + ASPEED_I2C_CMD_REG);
|
||||
break;
|
||||
case ASPEED_I2C_SLAVE_WRITE_RECEIVED:
|
||||
i2c_slave_event(slave, I2C_SLAVE_WRITE_RECEIVED, &value);
|
||||
|
@ -126,8 +126,9 @@
|
||||
* status codes
|
||||
*/
|
||||
#define STATUS_IDLE 0x0
|
||||
#define STATUS_WRITE_IN_PROGRESS 0x1
|
||||
#define STATUS_READ_IN_PROGRESS 0x2
|
||||
#define STATUS_ACTIVE 0x1
|
||||
#define STATUS_WRITE_IN_PROGRESS 0x2
|
||||
#define STATUS_READ_IN_PROGRESS 0x4
|
||||
|
||||
/*
|
||||
* operation modes
|
||||
@ -334,12 +335,14 @@ void i2c_dw_disable_int(struct dw_i2c_dev *dev);
|
||||
|
||||
static inline void __i2c_dw_enable(struct dw_i2c_dev *dev)
|
||||
{
|
||||
dev->status |= STATUS_ACTIVE;
|
||||
regmap_write(dev->map, DW_IC_ENABLE, 1);
|
||||
}
|
||||
|
||||
static inline void __i2c_dw_disable_nowait(struct dw_i2c_dev *dev)
|
||||
{
|
||||
regmap_write(dev->map, DW_IC_ENABLE, 0);
|
||||
dev->status &= ~STATUS_ACTIVE;
|
||||
}
|
||||
|
||||
void __i2c_dw_disable(struct dw_i2c_dev *dev);
|
||||
|
@ -716,6 +716,19 @@ static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
|
||||
u32 stat;
|
||||
|
||||
stat = i2c_dw_read_clear_intrbits(dev);
|
||||
|
||||
if (!(dev->status & STATUS_ACTIVE)) {
|
||||
/*
|
||||
* Unexpected interrupt in driver point of view. State
|
||||
* variables are either unset or stale so acknowledge and
|
||||
* disable interrupts for suppressing further interrupts if
|
||||
* interrupt really came from this HW (E.g. firmware has left
|
||||
* the HW active).
|
||||
*/
|
||||
regmap_write(dev->map, DW_IC_INTR_MASK, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (stat & DW_IC_INTR_TX_ABRT) {
|
||||
dev->cmd_err |= DW_IC_ERR_TX_ABRT;
|
||||
dev->status = STATUS_IDLE;
|
||||
|
@ -708,7 +708,7 @@ static void pci1xxxx_i2c_init(struct pci1xxxx_i2c *i2c)
|
||||
void __iomem *p2 = i2c->i2c_base + SMBUS_STATUS_REG_OFF;
|
||||
void __iomem *p1 = i2c->i2c_base + SMB_GPR_REG;
|
||||
u8 regval;
|
||||
u8 ret;
|
||||
int ret;
|
||||
|
||||
ret = set_sys_lock(i2c);
|
||||
if (ret == -EPERM) {
|
||||
|
@ -807,6 +807,7 @@ static const struct cci_data cci_v2_data = {
|
||||
};
|
||||
|
||||
static const struct of_device_id cci_dt_match[] = {
|
||||
{ .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
|
||||
{ .compatible = "qcom,msm8916-cci", .data = &cci_v1_data},
|
||||
{ .compatible = "qcom,msm8974-cci", .data = &cci_v1_5_data},
|
||||
{ .compatible = "qcom,msm8996-cci", .data = &cci_v2_data},
|
||||
|
@ -6,9 +6,6 @@
|
||||
* Copyright (c) 2006 Dmitry Torokhov <dtor@mail.ru>
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
/* #define DEBUG */
|
||||
|
||||
#include <linux/input.h>
|
||||
|
@ -6,9 +6,6 @@
|
||||
* Copyright (c) 2006 Dmitry Torokhov <dtor@mail.ru>
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
/* #define DEBUG */
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
@ -7,9 +7,6 @@
|
||||
* EMU10k1 - SB Live / Audigy - gameport driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <linux/module.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* PDPI Lightning 4 gamecard driver for Linux.
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/errno.h>
|
||||
|
@ -8,9 +8,6 @@
|
||||
* NS558 based standard IBM game port driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <linux/module.h>
|
||||
|
@ -746,7 +746,7 @@ static void joydev_cleanup(struct joydev *joydev)
|
||||
}
|
||||
|
||||
/*
|
||||
* These codes are copied from from hid-ids.h, unfortunately there is no common
|
||||
* These codes are copied from hid-ids.h, unfortunately there is no common
|
||||
* usb_ids/bt_ids.h header.
|
||||
*/
|
||||
#define USB_VENDOR_ID_SONY 0x054c
|
||||
|
@ -7,9 +7,6 @@
|
||||
* FP-Gaming Assassin 3D joystick driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
@ -26,8 +26,23 @@ struct adc_joystick {
|
||||
struct adc_joystick_axis *axes;
|
||||
struct iio_channel *chans;
|
||||
int num_chans;
|
||||
bool polled;
|
||||
};
|
||||
|
||||
static void adc_joystick_poll(struct input_dev *input)
|
||||
{
|
||||
struct adc_joystick *joy = input_get_drvdata(input);
|
||||
int i, val, ret;
|
||||
|
||||
for (i = 0; i < joy->num_chans; i++) {
|
||||
ret = iio_read_channel_raw(&joy->chans[i], &val);
|
||||
if (ret < 0)
|
||||
return;
|
||||
input_report_abs(input, joy->axes[i].code, val);
|
||||
}
|
||||
input_sync(input);
|
||||
}
|
||||
|
||||
static int adc_joystick_handle(const void *data, void *private)
|
||||
{
|
||||
struct adc_joystick *joy = private;
|
||||
@ -179,6 +194,7 @@ static int adc_joystick_probe(struct platform_device *pdev)
|
||||
int error;
|
||||
int bits;
|
||||
int i;
|
||||
unsigned int poll_interval;
|
||||
|
||||
joy = devm_kzalloc(dev, sizeof(*joy), GFP_KERNEL);
|
||||
if (!joy)
|
||||
@ -192,8 +208,25 @@ static int adc_joystick_probe(struct platform_device *pdev)
|
||||
return error;
|
||||
}
|
||||
|
||||
/* Count how many channels we got. NULL terminated. */
|
||||
error = device_property_read_u32(dev, "poll-interval", &poll_interval);
|
||||
if (error) {
|
||||
/* -EINVAL means the property is absent. */
|
||||
if (error != -EINVAL)
|
||||
return error;
|
||||
} else if (poll_interval == 0) {
|
||||
dev_err(dev, "Unable to get poll-interval\n");
|
||||
return -EINVAL;
|
||||
} else {
|
||||
joy->polled = true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Count how many channels we got. NULL terminated.
|
||||
* Do not check the storage size if using polling.
|
||||
*/
|
||||
for (i = 0; joy->chans[i].indio_dev; i++) {
|
||||
if (joy->polled)
|
||||
continue;
|
||||
bits = joy->chans[i].channel->scan_type.storagebits;
|
||||
if (!bits || bits > 16) {
|
||||
dev_err(dev, "Unsupported channel storage size\n");
|
||||
@ -215,23 +248,31 @@ static int adc_joystick_probe(struct platform_device *pdev)
|
||||
joy->input = input;
|
||||
input->name = pdev->name;
|
||||
input->id.bustype = BUS_HOST;
|
||||
input->open = adc_joystick_open;
|
||||
input->close = adc_joystick_close;
|
||||
|
||||
error = adc_joystick_set_axes(dev, joy);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
joy->buffer = iio_channel_get_all_cb(dev, adc_joystick_handle, joy);
|
||||
if (IS_ERR(joy->buffer)) {
|
||||
dev_err(dev, "Unable to allocate callback buffer\n");
|
||||
return PTR_ERR(joy->buffer);
|
||||
}
|
||||
if (joy->polled) {
|
||||
input_setup_polling(input, adc_joystick_poll);
|
||||
input_set_poll_interval(input, poll_interval);
|
||||
} else {
|
||||
input->open = adc_joystick_open;
|
||||
input->close = adc_joystick_close;
|
||||
|
||||
error = devm_add_action_or_reset(dev, adc_joystick_cleanup, joy->buffer);
|
||||
if (error) {
|
||||
dev_err(dev, "Unable to add action\n");
|
||||
return error;
|
||||
joy->buffer = iio_channel_get_all_cb(dev, adc_joystick_handle,
|
||||
joy);
|
||||
if (IS_ERR(joy->buffer)) {
|
||||
dev_err(dev, "Unable to allocate callback buffer\n");
|
||||
return PTR_ERR(joy->buffer);
|
||||
}
|
||||
|
||||
error = devm_add_action_or_reset(dev, adc_joystick_cleanup,
|
||||
joy->buffer);
|
||||
if (error) {
|
||||
dev_err(dev, "Unable to add action\n");
|
||||
return error;
|
||||
}
|
||||
}
|
||||
|
||||
input_set_drvdata(input, joy);
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Logitech ADI joystick family driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Driver for Amiga joysticks for Linux/m68k
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/kernel.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Analog joystick and gamepad driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Creative Labs Blaster GamePad Cobra driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
@ -10,9 +10,6 @@
|
||||
* Atari, Amstrad, Commodore, Amiga, Sega, etc. joystick driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
|
@ -11,9 +11,6 @@
|
||||
* Raphael Assenat
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Genius Flight 2000 joystick driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
|
@ -7,9 +7,6 @@
|
||||
* Gravis/Kensington GrIP protocol joystick and gamepad driver for Linux
|
||||
*/
|
||||
|
||||
/*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user