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UPSTREAM: usb: dwc3: core: set force_gen1 bit in USB31 devices if max speed is SS

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Currently for dwc3_usb31 controller, if maximum_speed is limited to
super-speed in DT, then device mode is limited to SS, but host mode
still works in SSP.

The documentation for max-speed property is as follows:

"Tells USB controllers we want to work up to a certain speed.
Incase  this isn't passed via DT, USB controllers should default to
their maximum HW capability."

It doesn't specify that the property is only for device mode.
There are cases where we need to limit the host's maximum speed to
SuperSpeed only. Use this property for host mode to contrain host's
speed to SuperSpeed.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/20231219041559.15789-1-quic_kriskura@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

(cherry picked from commit 91736d0619eb4083f33ae737b9d9763fc6b196ed
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master)

Bug: 329199528
Change-Id: Ic36953592a899ae263f900ee885c09033a11d910
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
This commit is contained in:
Krishna Kurapati 2024-03-13 11:39:35 +05:30 committed by Neill Kapron
parent 299c92ff85
commit 2df2c4b515
2 changed files with 17 additions and 0 deletions
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12
drivers/usb/dwc3/core.c
View File

@ -1388,6 +1388,18 @@ static int dwc3_core_init(struct dwc3 *dwc)
dwc3_config_threshold(dwc);
/*
* Modify this for all supported Super Speed ports when
* multiport support is added.
*/
if (hw_mode != DWC3_GHWPARAMS0_MODE_GADGET &&
(DWC3_IP_IS(DWC31)) &&
dwc->maximum_speed == USB_SPEED_SUPER) {
reg = dwc3_readl(dwc->regs, DWC3_LLUCTL);
reg |= DWC3_LLUCTL_FORCE_GEN1;
dwc3_writel(dwc->regs, DWC3_LLUCTL, reg);
}
return 0;
err4:

5
drivers/usb/dwc3/core.h
View File

@ -173,6 +173,8 @@
#define DWC3_OEVTEN 0xcc0C
#define DWC3_OSTS 0xcc10
#define DWC3_LLUCTL 0xd024
/* Bit fields */
/* Global SoC Bus Configuration INCRx Register 0 */
@ -654,6 +656,9 @@
#define DWC3_OSTS_VBUSVLD BIT(1)
#define DWC3_OSTS_CONIDSTS BIT(0)
/* Force Gen1 speed on Gen2 link */
#define DWC3_LLUCTL_FORCE_GEN1 BIT(10)
/* Structures */
struct dwc3_trb;