This is the 6.1.63 stable release
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmVbOmsACgkQONu9yGCS
aT5m1RAAx7hgbFDnLHCGh4YVBbNy8JngItsUBaJcI/67Mk5toNi0x8pqcS8mq7ED
GTwRnRcKaIR2bTyco5Ed2OZn4jMCyHC4oiyBZnHWg6AMuQjSCYzIgm7DzlTCVYZ7
2r8uRbt/uXADTILJ2kwR2mtVpGcwrXa+lsHrMqvt+MvNwRoSVHBHVVYCrAc+JXwR
GXCopzV/RFGS6w4SBsX0K+8pV7GO+bhpxJ1lPz1T/xeLYfT4C3EwSTWDbUXPbez7
IpJ+5yKJXXT9Xn9m/pekwZ/aOirLqtEbDxneEctsjvw140lCoQiEZn6ZRscgNEns
3H+J3Asgc2zXqPzfZFH02TebPj31B8HZ43Upu0okr0hr4A4/4JL9pjXEhm1bON/Z
x3jlTF4dyay4vOGGIEYOAuJSUbn6AqpZ318uBWCd3BSPocihEDMJz2aoazVHcb6k
83MVxfFfEL6s9utcoSXB8VjHa4FQmpMYsozegloUSJJCsizgdzmih0buJYhBB9sI
HbEohW+YAh3cACSn6arXUJIMH5F5xsfD89od2Pj+6UrapdlPz5gCaggA1RZplCho
bjGc1k61Rp2qSdfMEcx+h4ypgoOdhgqZI0YhYDCgBSRcWOXnGrDjFvnnumatcT+H
6vqyX6zlNt6U1NpE56Jtf7gt1Ds6PeoadD0L6B8vjXrkdeXOlUU=
=AZ9s
-----END PGP SIGNATURE-----
Merge 6.1.63 into android14-6.1-lts
Changes in 6.1.63
hwmon: (nct6775) Fix incorrect variable reuse in fan_div calculation
sched/fair: Fix cfs_rq_is_decayed() on !SMP
iov_iter, x86: Be consistent about the __user tag on copy_mc_to_user()
sched/uclamp: Set max_spare_cap_cpu even if max_spare_cap is 0
sched/uclamp: Ignore (util == 0) optimization in feec() when p_util_max = 0
objtool: Propagate early errors
sched: Fix stop_one_cpu_nowait() vs hotplug
vfs: fix readahead(2) on block devices
writeback, cgroup: switch inodes with dirty timestamps to release dying cgwbs
x86/srso: Fix SBPB enablement for (possible) future fixed HW
futex: Don't include process MM in futex key on no-MMU
x86/numa: Introduce numa_fill_memblks()
ACPI/NUMA: Apply SRAT proximity domain to entire CFMWS window
x86/sev-es: Allow copy_from_kernel_nofault() in earlier boot
x86/boot: Fix incorrect startup_gdt_descr.size
drivers/clocksource/timer-ti-dm: Don't call clk_get_rate() in stop function
pstore/platform: Add check for kstrdup
string: Adjust strtomem() logic to allow for smaller sources
genirq/matrix: Exclude managed interrupts in irq_matrix_allocated()
wifi: cfg80211: add flush functions for wiphy work
wifi: mac80211: move radar detect work to wiphy work
wifi: mac80211: move scan work to wiphy work
wifi: mac80211: move offchannel works to wiphy work
wifi: mac80211: move sched-scan stop work to wiphy work
wifi: mac80211: fix # of MSDU in A-MSDU calculation
wifi: iwlwifi: honor the enable_ini value
i40e: fix potential memory leaks in i40e_remove()
iavf: Fix promiscuous mode configuration flow messages
selftests/bpf: Correct map_fd to data_fd in tailcalls
udp: add missing WRITE_ONCE() around up->encap_rcv
tcp: call tcp_try_undo_recovery when an RTOd TFO SYNACK is ACKed
gve: Use size_add() in call to struct_size()
mlxsw: Use size_mul() in call to struct_size()
tls: Only use data field in crypto completion function
tls: Use size_add() in call to struct_size()
tipc: Use size_add() in calls to struct_size()
net: spider_net: Use size_add() in call to struct_size()
net: ethernet: mtk_wed: fix EXT_INT_STATUS_RX_FBUF definitions for MT7986 SoC
wifi: rtw88: debug: Fix the NULL vs IS_ERR() bug for debugfs_create_file()
wifi: ath11k: fix boot failure with one MSI vector
wifi: mt76: mt7603: rework/fix rx pse hang check
wifi: mt76: mt7603: improve watchdog reset reliablity
wifi: mt76: mt7603: improve stuck beacon handling
wifi: mt76: mt7915: fix beamforming availability check
wifi: ath: dfs_pattern_detector: Fix a memory initialization issue
tcp_metrics: add missing barriers on delete
tcp_metrics: properly set tp->snd_ssthresh in tcp_init_metrics()
tcp_metrics: do not create an entry from tcp_init_metrics()
wifi: rtlwifi: fix EDCA limit set by BT coexistence
ACPI: property: Allow _DSD buffer data only for byte accessors
ACPI: video: Add acpi_backlight=vendor quirk for Toshiba Portégé R100
wifi: ath11k: fix Tx power value during active CAC
can: dev: can_restart(): don't crash kernel if carrier is OK
can: dev: can_restart(): fix race condition between controller restart and netif_carrier_on()
can: dev: can_put_echo_skb(): don't crash kernel if can_priv::echo_skb is accessed out of bounds
PM / devfreq: rockchip-dfi: Make pmu regmap mandatory
wifi: wfx: fix case where rates are out of order
netfilter: nf_tables: Drop pointless memset when dumping rules
thermal: core: prevent potential string overflow
r8169: use tp_to_dev instead of open code
r8169: fix rare issue with broken rx after link-down on RTL8125
selftests: netfilter: test for sctp collision processing in nf_conntrack
net: skb_find_text: Ignore patterns extending past 'to'
chtls: fix tp->rcv_tstamp initialization
tcp: fix cookie_init_timestamp() overflows
wifi: iwlwifi: call napi_synchronize() before freeing rx/tx queues
wifi: iwlwifi: pcie: synchronize IRQs before NAPI
wifi: iwlwifi: empty overflow queue during flush
Bluetooth: hci_sync: Fix Opcode prints in bt_dev_dbg/err
bpf: Fix unnecessary -EBUSY from htab_lock_bucket
ACPI: sysfs: Fix create_pnp_modalias() and create_of_modalias()
ipv6: avoid atomic fragment on GSO packets
net: add DEV_STATS_READ() helper
ipvlan: properly track tx_errors
regmap: debugfs: Fix a erroneous check after snprintf()
spi: tegra: Fix missing IRQ check in tegra_slink_probe()
clk: qcom: gcc-msm8996: Remove RPM bus clocks
clk: qcom: clk-rcg2: Fix clock rate overflow for high parent frequencies
clk: qcom: mmcc-msm8998: Don't check halt bit on some branch clks
clk: qcom: mmcc-msm8998: Fix the SMMU GDSC
clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src
regulator: mt6358: Fail probe on unknown chip ID
clk: imx: Select MXC_CLK for CLK_IMX8QXP
clk: imx: imx8mq: correct error handling path
clk: imx: imx8qxp: Fix elcdif_pll clock
clk: renesas: rcar-gen3: Extend SDnH divider table
clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
clk: renesas: rzg2l: Lock around writes to mux register
clk: renesas: rzg2l: Trust value returned by hardware
clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
clk: renesas: rzg2l: Fix computation formula
clk: linux/clk-provider.h: fix kernel-doc warnings and typos
spi: nxp-fspi: use the correct ioremap function
clk: keystone: pll: fix a couple NULL vs IS_ERR() checks
clk: ti: change ti_clk_register[_omap_hw]() API
clk: ti: fix double free in of_ti_divider_clk_setup()
clk: npcm7xx: Fix incorrect kfree
clk: mediatek: clk-mt6765: Add check for mtk_alloc_clk_data
clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data
clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data
clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data
clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data
clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data
clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM
platform/x86: wmi: Fix probe failure when failing to register WMI devices
platform/x86: wmi: Fix opening of char device
hwmon: (axi-fan-control) Fix possible NULL pointer dereference
hwmon: (coretemp) Fix potentially truncated sysfs attribute name
Revert "hwmon: (sch56xx-common) Add DMI override table"
Revert "hwmon: (sch56xx-common) Add automatic module loading on supported devices"
hwmon: (sch5627) Use bit macros when accessing the control register
hwmon: (sch5627) Disallow write access if virtual registers are locked
hte: tegra: Fix missing error code in tegra_hte_test_probe()
drm/rockchip: vop: Fix reset of state in duplicate state crtc funcs
drm/rockchip: vop: Fix call to crtc reset helper
drm/rockchip: vop2: Don't crash for invalid duplicate_state
drm/rockchip: vop2: Add missing call to crtc reset helper
drm/radeon: possible buffer overflow
drm: bridge: it66121: Fix invalid connector dereference
drm/bridge: lt8912b: Add hot plug detection
drm/bridge: lt8912b: Fix bridge_detach
drm/bridge: lt8912b: Fix crash on bridge detach
drm/bridge: lt8912b: Manually disable HPD only if it was enabled
drm/bridge: lt8912b: Add missing drm_bridge_attach call
drm/bridge: tc358768: Fix use of uninitialized variable
drm/bridge: tc358768: Fix bit updates
drm/bridge: tc358768: remove unused variable
drm/bridge: tc358768: Use struct videomode
drm/bridge: tc358768: Print logical values, not raw register values
drm/bridge: tc358768: Use dev for dbg prints, not priv->dev
drm/bridge: tc358768: Rename dsibclk to hsbyteclk
drm/bridge: tc358768: Clean up clock period code
drm/bridge: tc358768: Fix tc358768_ns_to_cnt()
drm/amdkfd: fix some race conditions in vram buffer alloc/free of svm code
drm/amd/display: Check all enabled planes in dm_check_crtc_cursor
drm/amd/display: Refactor dm_get_plane_scale helper
drm/amd/display: Bail from dm_check_crtc_cursor if no relevant change
io_uring/kbuf: Fix check of BID wrapping in provided buffers
io_uring/kbuf: Allow the full buffer id space for provided buffers
drm/mediatek: Fix iommu fault by swapping FBs after updating plane state
drm/mediatek: Fix iommu fault during crtc enabling
drm/rockchip: cdn-dp: Fix some error handling paths in cdn_dp_probe()
gpu: host1x: Correct allocated size for contexts
drm/bridge: lt9611uxc: fix the race in the error path
arm64/arm: xen: enlighten: Fix KPTI checks
drm/rockchip: Fix type promotion bug in rockchip_gem_iommu_map()
xenbus: fix error exit in xenbus_init()
xen-pciback: Consider INTx disabled when MSI/MSI-X is enabled
drm/msm/dsi: use msm_gem_kernel_put to free TX buffer
drm/msm/dsi: free TX buffer in unbind
clocksource/drivers/arm_arch_timer: limit XGene-1 workaround
drm: mediatek: mtk_dsi: Fix NO_EOT_PACKET settings/handling
drivers/perf: hisi: use cpuhp_state_remove_instance_nocalls() for hisi_hns3_pmu uninit process
perf/arm-cmn: Revamp model detection
perf/arm-cmn: Fix DTC domain detection
drivers/perf: hisi_pcie: Check the type first in pmu::event_init()
perf: hisi: Fix use-after-free when register pmu fails
ARM: dts: renesas: blanche: Fix typo in GP_11_2 pin name
arm64: dts: qcom: sdm845: cheza doesn't support LMh node
arm64: dts: qcom: sc7280: link usb3_phy_wrapper_gcc_usb30_pipe_clk
arm64: dts: qcom: msm8916: Fix iommu local address range
arm64: dts: qcom: msm8992-libra: drop duplicated reserved memory
arm64: dts: qcom: sc7280: Add missing LMH interrupts
arm64: dts: qcom: sm8150: add ref clock to PCIe PHYs
arm64: dts: qcom: sm8350: fix pinctrl for UART18
arm64: dts: qcom: sdm845-mtp: fix WiFi configuration
ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pins
arm64: dts: qcom: apq8016-sbc: Add missing ADV7533 regulators
ARM: dts: qcom: mdm9615: populate vsdcc fixed regulator
soc: qcom: llcc: Handle a second device without data corruption
kunit: Fix missed memory release in kunit_free_suite_set()
firmware: ti_sci: Mark driver as non removable
arm64: dts: ti: k3-am62a7-sk: Drop i2c-1 to 100Khz
firmware: arm_ffa: Assign the missing IDR allocation ID to the FFA device
firmware: arm_ffa: Allow the FF-A drivers to use 32bit mode of messaging
ARM: dts: am3517-evm: Fix LED3/4 pinmux
clk: scmi: Free scmi_clk allocated when the clocks with invalid info are skipped
arm64: dts: imx8qm-ss-img: Fix jpegenc compatible entry
arm64: dts: imx8mm: Add sound-dai-cells to micfil node
arm64: dts: imx8mn: Add sound-dai-cells to micfil node
arm64: tegra: Use correct interrupts for Tegra234 TKE
selftests/pidfd: Fix ksft print formats
selftests/resctrl: Ensure the benchmark commands fits to its array
module/decompress: use vmalloc() for gzip decompression workspace
ASoC: cs35l41: Verify PM runtime resume errors in IRQ handler
ASoC: cs35l41: Undo runtime PM changes at driver exit time
ALSA: hda: cs35l41: Fix unbalanced pm_runtime_get()
ALSA: hda: cs35l41: Undo runtime PM changes at driver exit time
KEYS: Include linux/errno.h in linux/verification.h
crypto: hisilicon/hpre - Fix a erroneous check after snprintf()
hwrng: bcm2835 - Fix hwrng throughput regression
hwrng: geode - fix accessing registers
RDMA/core: Use size_{add,sub,mul}() in calls to struct_size()
crypto: qat - ignore subsequent state up commands
crypto: qat - relocate bufferlist logic
crypto: qat - rename bufferlist functions
crypto: qat - change bufferlist logic interface
crypto: qat - generalize crypto request buffers
crypto: qat - extend buffer list interface
crypto: qat - fix unregistration of crypto algorithms
scsi: ibmvfc: Fix erroneous use of rtas_busy_delay with hcall return code
libnvdimm/of_pmem: Use devm_kstrdup instead of kstrdup and check its return value
nd_btt: Make BTT lanes preemptible
crypto: caam/qi2 - fix Chacha20 + Poly1305 self test failure
crypto: caam/jr - fix Chacha20 + Poly1305 self test failure
crypto: qat - increase size of buffers
PCI: vmd: Correct PCI Header Type Register's multi-function check
hid: cp2112: Fix duplicate workqueue initialization
crypto: hisilicon/qm - delete redundant null assignment operations
crypto: hisilicon/qm - modify the process of regs dfx
crypto: hisilicon/qm - split a debugfs.c from qm
crypto: hisilicon/qm - fix PF queue parameter issue
ARM: 9321/1: memset: cast the constant byte to unsigned char
ext4: move 'ix' sanity check to corrent position
ASoC: fsl: mpc5200_dma.c: Fix warning of Function parameter or member not described
IB/mlx5: Fix rdma counter binding for RAW QP
RDMA/hns: Fix printing level of asynchronous events
RDMA/hns: Fix uninitialized ucmd in hns_roce_create_qp_common()
RDMA/hns: Fix signed-unsigned mixed comparisons
RDMA/hns: Add check for SL
RDMA/hns: The UD mode can only be configured with DCQCN
ASoC: SOF: core: Ensure sof_ops_free() is still called when probe never ran.
ASoC: fsl: Fix PM disable depth imbalance in fsl_easrc_probe
scsi: ufs: core: Leave space for '\0' in utf8 desc string
RDMA/hfi1: Workaround truncation compilation error
HID: cp2112: Make irq_chip immutable
hid: cp2112: Fix IRQ shutdown stopping polling for all IRQs on chip
sh: bios: Revive earlyprintk support
Revert "HID: logitech-hidpp: add a module parameter to keep firmware gestures"
HID: logitech-hidpp: Remove HIDPP_QUIRK_NO_HIDINPUT quirk
HID: logitech-hidpp: Don't restart IO, instead defer hid_connect() only
HID: logitech-hidpp: Revert "Don't restart communication if not necessary"
HID: logitech-hidpp: Move get_wireless_feature_index() check to hidpp_connect_event()
ASoC: Intel: Skylake: Fix mem leak when parsing UUIDs fails
padata: Fix refcnt handling in padata_free_shell()
crypto: qat - fix deadlock in backlog processing
ASoC: ams-delta.c: use component after check
IB/mlx5: Fix init stage error handling to avoid double free of same QP and UAF
mfd: core: Un-constify mfd_cell.of_reg
mfd: core: Ensure disabled devices are skipped without aborting
mfd: dln2: Fix double put in dln2_probe
dt-bindings: mfd: mt6397: Add binding for MT6357
dt-bindings: mfd: mt6397: Split out compatible for MediaTek MT6366 PMIC
mfd: arizona-spi: Set pdata.hpdet_channel for ACPI enumerated devs
leds: turris-omnia: Drop unnecessary mutex locking
leds: turris-omnia: Do not use SMBUS calls
leds: pwm: Don't disable the PWM when the LED should be off
leds: trigger: ledtrig-cpu:: Fix 'output may be truncated' issue for 'cpu'
kunit: add macro to allow conditionally exposing static symbols to tests
apparmor: test: make static symbols visible during kunit testing
apparmor: fix invalid reference on profile->disconnected
perf stat: Fix aggr mode initialization
iio: frequency: adf4350: Use device managed functions and fix power down issue.
perf kwork: Fix incorrect and missing free atom in work_push_atom()
perf kwork: Add the supported subcommands to the document
perf kwork: Set ordered_events to true in 'struct perf_tool'
filemap: add filemap_get_folios_tag()
f2fs: convert f2fs_write_cache_pages() to use filemap_get_folios_tag()
f2fs: compress: fix deadloop in f2fs_write_cache_pages()
f2fs: compress: fix to avoid use-after-free on dic
f2fs: compress: fix to avoid redundant compress extension
tty: tty_jobctrl: fix pid memleak in disassociate_ctty()
livepatch: Fix missing newline character in klp_resolve_symbols()
pinctrl: renesas: rzg2l: Make reverse order of enable() for disable()
perf record: Fix BTF type checks in the off-cpu profiling
dmaengine: idxd: Register dsa_bus_type before registering idxd sub-drivers
usb: dwc2: fix possible NULL pointer dereference caused by driver concurrency
usb: chipidea: Fix DMA overwrite for Tegra
usb: chipidea: Simplify Tegra DMA alignment code
dmaengine: ti: edma: handle irq_of_parse_and_map() errors
misc: st_core: Do not call kfree_skb() under spin_lock_irqsave()
tools: iio: iio_generic_buffer ensure alignment
USB: usbip: fix stub_dev hub disconnect
dmaengine: pxa_dma: Remove an erroneous BUG_ON() in pxad_free_desc()
f2fs: fix to initialize map.m_pblk in f2fs_precache_extents()
interconnect: qcom: sc7180: Retire DEFINE_QBCM
interconnect: qcom: sc7180: Set ACV enable_mask
interconnect: qcom: sc7280: Set ACV enable_mask
interconnect: qcom: sc8180x: Set ACV enable_mask
interconnect: qcom: sc8280xp: Set ACV enable_mask
interconnect: qcom: sdm845: Retire DEFINE_QBCM
interconnect: qcom: sdm845: Set ACV enable_mask
interconnect: qcom: sm6350: Retire DEFINE_QBCM
interconnect: qcom: sm6350: Set ACV enable_mask
interconnect: move ignore_list out of of_count_icc_providers()
interconnect: qcom: sm8150: Drop IP0 interconnects
interconnect: qcom: sm8150: Retire DEFINE_QBCM
interconnect: qcom: sm8150: Set ACV enable_mask
interconnect: qcom: sm8350: Retire DEFINE_QBCM
interconnect: qcom: sm8350: Set ACV enable_mask
powerpc: Only define __parse_fpscr() when required
modpost: fix tee MODULE_DEVICE_TABLE built on big-endian host
modpost: fix ishtp MODULE_DEVICE_TABLE built on big-endian host
powerpc/40x: Remove stale PTE_ATOMIC_UPDATES macro
powerpc/xive: Fix endian conversion size
powerpc/vas: Limit open window failure messages in log bufffer
powerpc/imc-pmu: Use the correct spinlock initializer.
powerpc/pseries: fix potential memory leak in init_cpu_associativity()
xhci: Loosen RPM as default policy to cover for AMD xHC 1.1
usb: host: xhci-plat: fix possible kernel oops while resuming
perf machine: Avoid out of bounds LBR memory read
perf hist: Add missing puts to hist__account_cycles
9p/net: fix possible memory leak in p9_check_errors()
i3c: Fix potential refcount leak in i3c_master_register_new_i3c_devs
cxl/mem: Fix shutdown order
crypto: ccp - Name -1 return value as SEV_RET_NO_FW_CALL
x86/sev: Change snp_guest_issue_request()'s fw_err argument
virt: sevguest: Fix passing a stack buffer as a scatterlist target
rtc: pcf85363: fix wrong mask/val parameters in regmap_update_bits call
pcmcia: cs: fix possible hung task and memory leak pccardd()
pcmcia: ds: fix refcount leak in pcmcia_device_add()
pcmcia: ds: fix possible name leak in error path in pcmcia_device_add()
media: hantro: Check whether reset op is defined before use
media: verisilicon: Do not enable G2 postproc downscale if source is narrower than destination
media: ov5640: Drop dead code using frame_interval
media: ov5640: fix vblank unchange issue when work at dvp mode
media: i2c: max9286: Fix some redundant of_node_put() calls
media: ov5640: Fix a memory leak when ov5640_probe fails
media: bttv: fix use after free error due to btv->timeout timer
media: amphion: handle firmware debug message
media: mtk-jpegenc: Fix bug in JPEG encode quality selection
media: s3c-camif: Avoid inappropriate kfree()
media: vidtv: psi: Add check for kstrdup
media: vidtv: mux: Add check and kfree for kstrdup
media: cedrus: Fix clock/reset sequence
media: cadence: csi2rx: Unregister v4l2 async notifier
media: dvb-usb-v2: af9035: fix missing unlock
media: cec: meson: always include meson sub-directory in Makefile
regmap: prevent noinc writes from clobbering cache
pwm: sti: Reduce number of allocations and drop usage of chip_data
pwm: brcmstb: Utilize appropriate clock APIs in suspend/resume
Input: synaptics-rmi4 - fix use after free in rmi_unregister_function()
watchdog: ixp4xx: Make sure restart always works
llc: verify mac len before reading mac header
hsr: Prevent use after free in prp_create_tagged_frame()
tipc: Change nla_policy for bearer-related names to NLA_NUL_STRING
bpf: Check map->usercnt after timer->timer is assigned
inet: shrink struct flowi_common
octeontx2-pf: Fix error codes
octeontx2-pf: Fix holes in error code
net: page_pool: add missing free_percpu when page_pool_init fail
dccp: Call security_inet_conn_request() after setting IPv4 addresses.
dccp/tcp: Call security_inet_conn_request() after setting IPv6 addresses.
net: r8169: Disable multicast filter for RTL8168H and RTL8107E
Fix termination state for idr_for_each_entry_ul()
net: stmmac: xgmac: Enable support for multiple Flexible PPS outputs
selftests: pmtu.sh: fix result checking
octeontx2-pf: Rename tot_tx_queues to non_qos_queues
octeontx2-pf: qos send queues management
octeontx2-pf: Free pending and dropped SQEs
net/smc: fix dangling sock under state SMC_APPFINCLOSEWAIT
net/smc: allow cdc msg send rather than drop it with NULL sndbuf_desc
net/smc: put sk reference if close work was canceled
nvme: fix error-handling for io_uring nvme-passthrough
tg3: power down device only on SYSTEM_POWER_OFF
nbd: fix uaf in nbd_open
blk-core: use pr_warn_ratelimited() in bio_check_ro()
virtio/vsock: replace virtio_vsock_pkt with sk_buff
vsock/virtio: remove socket from connected/bound list on shutdown
r8169: respect userspace disabling IFF_MULTICAST
i2c: iproc: handle invalid slave state
netfilter: xt_recent: fix (increase) ipv6 literal buffer length
netfilter: nft_redir: use `struct nf_nat_range2` throughout and deduplicate eval call-backs
netfilter: nat: fix ipv6 nat redirect with mapped and scoped addresses
RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs
drm/syncobj: fix DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE
ASoC: mediatek: mt8186_mt6366_rt1019_rt5682s: trivial: fix error messages
ASoC: hdmi-codec: register hpd callback on component probe
ASoC: dapm: fix clock get name
spi: spi-zynq-qspi: add spi-mem to driver kconfig dependencies
fbdev: imsttfb: Fix error path of imsttfb_probe()
fbdev: imsttfb: fix a resource leak in probe
fbdev: fsl-diu-fb: mark wr_reg_wa() static
tracing/kprobes: Fix the order of argument descriptions
io_uring/net: ensure socket is marked connected on connect retry
x86/amd_nb: Use Family 19h Models 60h-7Fh Function 4 IDs
Revert "mmc: core: Capture correct oemid-bits for eMMC cards"
btrfs: use u64 for buffer sizes in the tree search ioctls
wifi: cfg80211: fix kernel-doc for wiphy_delayed_work_flush()
virtio/vsock: don't use skbuff state to account credit
virtio/vsock: remove redundant 'skb_pull()' call
virtio/vsock: don't drop skbuff on copy failure
vsock/loopback: use only sk_buff_head.lock to protect the packet queue
virtio/vsock: fix leaks due to missing skb owner
virtio/vsock: Fix uninit-value in virtio_transport_recv_pkt()
virtio/vsock: fix header length on skb merging
Linux 6.1.63
Change-Id: I87b7a539b11c90cfaf16edb07d613f74d54458a4
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
2b3ea8bdef
@ -21,8 +21,10 @@ Required properties:
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compatible:
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"mediatek,mt6323" for PMIC MT6323
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"mediatek,mt6331" for PMIC MT6331 and MT6332
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"mediatek,mt6358" for PMIC MT6358 and MT6366
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"mediatek,mt6357" for PMIC MT6357
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"mediatek,mt6358" for PMIC MT6358
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"mediatek,mt6359" for PMIC MT6359
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"mediatek,mt6366", "mediatek,mt6358" for PMIC MT6366
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"mediatek,mt6397" for PMIC MT6397
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Optional subnodes:
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@ -39,6 +41,7 @@ Optional subnodes:
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- compatible: "mediatek,mt6323-regulator"
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see ../regulator/mt6323-regulator.txt
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- compatible: "mediatek,mt6358-regulator"
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- compatible: "mediatek,mt6366-regulator", "mediatek-mt6358-regulator"
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see ../regulator/mt6358-regulator.txt
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- compatible: "mediatek,mt6397-regulator"
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see ../regulator/mt6397-regulator.txt
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@ -37,11 +37,11 @@ along with a description:
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the return value. General error numbers (-ENOMEM, -EINVAL)
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are not detailed, but errors with specific meanings are.
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The guest ioctl should be issued on a file descriptor of the /dev/sev-guest device.
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The ioctl accepts struct snp_user_guest_request. The input and output structure is
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specified through the req_data and resp_data field respectively. If the ioctl fails
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to execute due to a firmware error, then fw_err code will be set otherwise the
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fw_err will be set to 0x00000000000000ff.
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The guest ioctl should be issued on a file descriptor of the /dev/sev-guest
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device. The ioctl accepts struct snp_user_guest_request. The input and
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output structure is specified through the req_data and resp_data field
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respectively. If the ioctl fails to execute due to a firmware error, then
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the fw_error code will be set, otherwise fw_error will be set to -1.
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The firmware checks that the message sequence counter is one greater than
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the guests message sequence counter. If guest driver fails to increment message
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@ -57,8 +57,14 @@ counter (e.g. counter overflow), then -EIO will be returned.
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__u64 req_data;
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__u64 resp_data;
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/* firmware error code on failure (see psp-sev.h) */
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__u64 fw_err;
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/* bits[63:32]: VMM error code, bits[31:0] firmware error code (see psp-sev.h) */
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union {
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__u64 exitinfo2;
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struct {
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__u32 fw_error;
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__u32 vmm_error;
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};
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};
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};
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2.1 SNP_GET_REPORT
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 1
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SUBLEVEL = 62
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SUBLEVEL = 63
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EXTRAVERSION =
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NAME = Curry Ramen
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@ -271,13 +271,6 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
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>;
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};
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */
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OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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@ -355,3 +348,12 @@ OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
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>;
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};
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};
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&omap3_pmx_wkup {
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */
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OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */
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>;
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};
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};
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@ -82,14 +82,12 @@ cxo_board {
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};
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};
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regulators {
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vsdcc_fixed: vsdcc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "SDCC Power";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2700000>;
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regulator-always-on;
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};
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vsdcc_fixed: vsdcc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "SDCC Power";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2700000>;
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regulator-always-on;
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};
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soc: soc {
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@ -239,7 +239,7 @@ du1_pins: du1 {
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};
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keyboard_pins: keyboard {
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pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_02";
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pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_2";
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bias-pull-up;
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};
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@ -17,6 +17,7 @@ ENTRY(__memset)
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ENTRY(mmioset)
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WEAK(memset)
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UNWIND( .fnstart )
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and r1, r1, #255 @ cast to unsigned char
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ands r3, r0, #3 @ 1 unaligned?
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mov ip, r0 @ preserve r0 as return value
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bne 6f @ 1
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@ -164,9 +164,6 @@ static int xen_starting_cpu(unsigned int cpu)
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BUG_ON(err);
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per_cpu(xen_vcpu, cpu) = vcpup;
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if (!xen_kernel_unmapped_at_usr())
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xen_setup_runstate_info(cpu);
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after_register_vcpu_info:
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enable_percpu_irq(xen_events_irq, 0);
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return 0;
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@ -523,9 +520,6 @@ static int __init xen_guest_init(void)
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return -EINVAL;
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}
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if (!xen_kernel_unmapped_at_usr())
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xen_time_setup_guest();
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if (xen_initial_domain())
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pvclock_gtod_register_notifier(&xen_pvclock_gtod_notifier);
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@ -535,7 +529,13 @@ static int __init xen_guest_init(void)
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}
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early_initcall(xen_guest_init);
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static int __init xen_pm_init(void)
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static int xen_starting_runstate_cpu(unsigned int cpu)
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{
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xen_setup_runstate_info(cpu);
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return 0;
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}
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static int __init xen_late_init(void)
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{
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if (!xen_domain())
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return -ENODEV;
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@ -548,9 +548,16 @@ static int __init xen_pm_init(void)
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do_settimeofday64(&ts);
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}
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return 0;
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if (xen_kernel_unmapped_at_usr())
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return 0;
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xen_time_setup_guest();
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return cpuhp_setup_state(CPUHP_AP_ARM_XEN_RUNSTATE_STARTING,
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"arm/xen_runstate:starting",
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xen_starting_runstate_cpu, NULL);
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}
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late_initcall(xen_pm_init);
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late_initcall(xen_late_init);
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/* empty stubs */
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@ -398,6 +398,7 @@ micfil: audio-controller@30080000 {
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"pll8k", "pll11k", "clkext3";
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dmas = <&sdma2 24 25 0x80000000>;
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dma-names = "rx";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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@ -370,6 +370,7 @@ micfil: audio-controller@30080000 {
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"pll8k", "pll11k", "clkext3";
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dmas = <&sdma2 24 25 0x80000000>;
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dma-names = "rx";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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@ -8,5 +8,5 @@ &jpegdec {
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};
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&jpegenc {
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compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc";
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compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";
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};
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@ -120,7 +120,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
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"mpp59", "mpp60", "mpp61";
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marvell,function = "sdio";
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};
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cp0_spi0_pins: cp0-spi-pins-0 {
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cp0_spi1_pins: cp0-spi-pins-1 {
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marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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@ -170,7 +170,7 @@ &cp0_sdhci0 {
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&cp0_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi0_pins>;
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pinctrl-0 = <&cp0_spi1_pins>;
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reg = <0x700680 0x50>, /* control */
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<0x2000000 0x1000000>; /* CS0 */
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status = "okay";
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@ -307,7 +307,7 @@ &cp0_sdhci0 {
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&cp0_spi1 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi0_pins>;
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pinctrl-0 = <&cp0_spi1_pins>;
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reg = <0x700680 0x50>;
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flash@0 {
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@ -371,7 +371,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
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"mpp59", "mpp60", "mpp61";
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marvell,function = "sdio";
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};
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cp0_spi0_pins: cp0-spi-pins-0 {
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cp0_spi1_pins: cp0-spi-pins-1 {
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marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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@ -532,12 +532,12 @@ timer@2080000 {
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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};
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@ -200,6 +200,9 @@ adv_bridge: bridge@39 {
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pd-gpios = <&msmgpio 32 GPIO_ACTIVE_HIGH>;
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avdd-supply = <&pm8916_l6>;
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a2vdd-supply = <&pm8916_l6>;
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dvdd-supply = <&pm8916_l6>;
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pvdd-supply = <&pm8916_l6>;
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v1p2-supply = <&pm8916_l6>;
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v3p3-supply = <&pm8916_l17>;
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@ -1257,7 +1257,7 @@ apps_iommu: iommu@1ef0000 {
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#size-cells = <1>;
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#iommu-cells = <1>;
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compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
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ranges = <0 0x01e20000 0x40000>;
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ranges = <0 0x01e20000 0x20000>;
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reg = <0x01ef0000 0x3000>;
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clocks = <&gcc GCC_SMMU_CFG_CLK>,
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<&gcc GCC_APSS_TCU_CLK>;
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@ -109,11 +109,6 @@ rmtfs_mem: rmtfs@ca100000 {
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qcom,client-id = <1>;
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};
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audio_mem: audio@cb400000 {
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reg = <0 0xcb000000 0 0x400000>;
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no-mem;
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};
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qseecom_mem: qseecom@cb400000 {
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reg = <0 0xcb400000 0 0x1c00000>;
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no-mem;
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@ -820,7 +820,8 @@ gcc: clock-controller@100000 {
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
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<0>, <&pcie1_lane>,
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<0>, <0>, <0>, <0>;
|
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<0>, <0>, <0>,
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<&usb_1_ssphy>;
|
||||
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
|
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"pcie_0_pipe_clk", "pcie_1_pipe_clk",
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||||
"ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
|
||||
@ -5337,6 +5338,14 @@ cpufreq_hw: cpufreq@18591000 {
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||||
reg = <0 0x18591000 0 0x1000>,
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<0 0x18592000 0 0x1000>,
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<0 0x18593000 0 0x1000>;
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||||
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||||
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "dcvsh-irq-0",
|
||||
"dcvsh-irq-1",
|
||||
"dcvsh-irq-2";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
|
||||
clock-names = "xo", "alternate";
|
||||
#freq-domain-cells = <1>;
|
||||
|
||||
@ -145,6 +145,10 @@ panel_in_edp: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
&cpufreq_hw {
|
||||
/delete-property/ interrupts-extended; /* reference to lmh_cluster[01] */
|
||||
};
|
||||
|
||||
&psci {
|
||||
/delete-node/ cpu0;
|
||||
/delete-node/ cpu1;
|
||||
@ -277,6 +281,14 @@ &BIG_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
};
|
||||
|
||||
&lmh_cluster0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&lmh_cluster1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/*
|
||||
* Reserved memory changes
|
||||
*
|
||||
|
||||
@ -714,6 +714,8 @@ &wifi {
|
||||
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
|
||||
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
|
||||
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
|
||||
|
||||
qcom,snoc-host-cap-8bit-quirk;
|
||||
};
|
||||
|
||||
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
|
||||
|
||||
@ -1839,8 +1839,12 @@ pcie0_phy: phy@1c06000 {
|
||||
ranges;
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_0_CLKREF_CLK>,
|
||||
<&gcc GCC_PCIE0_PHY_REFGEN_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "refgen";
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"ref",
|
||||
"refgen";
|
||||
|
||||
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
|
||||
reset-names = "phy";
|
||||
@ -1938,8 +1942,12 @@ pcie1_phy: phy@1c0e000 {
|
||||
ranges;
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_1_CLKREF_CLK>,
|
||||
<&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "refgen";
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"ref",
|
||||
"refgen";
|
||||
|
||||
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
|
||||
reset-names = "phy";
|
||||
|
||||
@ -1778,7 +1778,7 @@ qup_uart6_default: qup-uart6-default-state {
|
||||
};
|
||||
|
||||
qup_uart18_default: qup-uart18-default-state {
|
||||
pins = "gpio58", "gpio59";
|
||||
pins = "gpio68", "gpio69";
|
||||
function = "qup18";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
|
||||
@ -172,7 +172,7 @@ &main_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
exp1: gpio@22 {
|
||||
compatible = "ti,tca6424";
|
||||
|
||||
@ -85,7 +85,8 @@
|
||||
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
|
||||
#define ARM_CPU_PART_CORTEX_A78C 0xD4B
|
||||
|
||||
#define APM_CPU_PART_POTENZA 0x000
|
||||
#define APM_CPU_PART_XGENE 0x000
|
||||
#define APM_CPU_VAR_POTENZA 0x00
|
||||
|
||||
#define CAVIUM_CPU_PART_THUNDERX 0x0A1
|
||||
#define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2
|
||||
|
||||
@ -865,7 +865,7 @@ u32 __attribute_const__ kvm_target_cpu(void)
|
||||
break;
|
||||
case ARM_CPU_IMP_APM:
|
||||
switch (part_number) {
|
||||
case APM_CPU_PART_POTENZA:
|
||||
case APM_CPU_PART_XGENE:
|
||||
return KVM_ARM_TARGET_XGENE_POTENZA;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -69,9 +69,6 @@
|
||||
|
||||
#define _PTE_NONE_MASK 0
|
||||
|
||||
/* Until my rework is finished, 40x still needs atomic PTE updates */
|
||||
#define PTE_ATOMIC_UPDATES 1
|
||||
|
||||
#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
|
||||
#define _PAGE_BASE (_PAGE_BASE_NC)
|
||||
|
||||
|
||||
@ -1164,6 +1164,7 @@ static void emulate_single_step(struct pt_regs *regs)
|
||||
__single_step_exception(regs);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC_FPU_REGS
|
||||
static inline int __parse_fpscr(unsigned long fpscr)
|
||||
{
|
||||
int ret = FPE_FLTUNK;
|
||||
@ -1190,6 +1191,7 @@ static inline int __parse_fpscr(unsigned long fpscr)
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void parse_fpe(struct pt_regs *regs)
|
||||
{
|
||||
|
||||
@ -51,7 +51,7 @@ static int trace_imc_mem_size;
|
||||
* core and trace-imc
|
||||
*/
|
||||
static struct imc_pmu_ref imc_global_refc = {
|
||||
.lock = __SPIN_LOCK_INITIALIZER(imc_global_refc.lock),
|
||||
.lock = __SPIN_LOCK_UNLOCKED(imc_global_refc.lock),
|
||||
.id = 0,
|
||||
.refc = 0,
|
||||
};
|
||||
|
||||
@ -4,6 +4,8 @@
|
||||
* Copyright (C) 2019 Haren Myneni, IBM Corp
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) "vas-api: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/cdev.h>
|
||||
@ -78,7 +80,7 @@ int get_vas_user_win_ref(struct vas_user_win_ref *task_ref)
|
||||
task_ref->mm = get_task_mm(current);
|
||||
if (!task_ref->mm) {
|
||||
put_pid(task_ref->pid);
|
||||
pr_err("VAS: pid(%d): mm_struct is not found\n",
|
||||
pr_err("pid(%d): mm_struct is not found\n",
|
||||
current->pid);
|
||||
return -EPERM;
|
||||
}
|
||||
@ -235,8 +237,7 @@ void vas_update_csb(struct coprocessor_request_block *crb,
|
||||
rc = kill_pid_info(SIGSEGV, &info, pid);
|
||||
rcu_read_unlock();
|
||||
|
||||
pr_devel("%s(): pid %d kill_proc_info() rc %d\n", __func__,
|
||||
pid_vnr(pid), rc);
|
||||
pr_devel("pid %d kill_proc_info() rc %d\n", pid_vnr(pid), rc);
|
||||
}
|
||||
|
||||
void vas_dump_crb(struct coprocessor_request_block *crb)
|
||||
@ -294,7 +295,7 @@ static int coproc_ioc_tx_win_open(struct file *fp, unsigned long arg)
|
||||
|
||||
rc = copy_from_user(&uattr, uptr, sizeof(uattr));
|
||||
if (rc) {
|
||||
pr_err("%s(): copy_from_user() returns %d\n", __func__, rc);
|
||||
pr_err("copy_from_user() returns %d\n", rc);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
@ -311,7 +312,7 @@ static int coproc_ioc_tx_win_open(struct file *fp, unsigned long arg)
|
||||
txwin = cp_inst->coproc->vops->open_win(uattr.vas_id, uattr.flags,
|
||||
cp_inst->coproc->cop_type);
|
||||
if (IS_ERR(txwin)) {
|
||||
pr_err("%s() VAS window open failed, %ld\n", __func__,
|
||||
pr_err_ratelimited("VAS window open failed rc=%ld\n",
|
||||
PTR_ERR(txwin));
|
||||
return PTR_ERR(txwin);
|
||||
}
|
||||
@ -405,8 +406,7 @@ static vm_fault_t vas_mmap_fault(struct vm_fault *vmf)
|
||||
* window is not opened. Shouldn't expect this error.
|
||||
*/
|
||||
if (!cp_inst || !cp_inst->txwin) {
|
||||
pr_err("%s(): Unexpected fault on paste address with TX window closed\n",
|
||||
__func__);
|
||||
pr_err("Unexpected fault on paste address with TX window closed\n");
|
||||
return VM_FAULT_SIGBUS;
|
||||
}
|
||||
|
||||
@ -421,8 +421,7 @@ static vm_fault_t vas_mmap_fault(struct vm_fault *vmf)
|
||||
* issue NX request.
|
||||
*/
|
||||
if (txwin->task_ref.vma != vmf->vma) {
|
||||
pr_err("%s(): No previous mapping with paste address\n",
|
||||
__func__);
|
||||
pr_err("No previous mapping with paste address\n");
|
||||
return VM_FAULT_SIGBUS;
|
||||
}
|
||||
|
||||
@ -481,19 +480,19 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
|
||||
txwin = cp_inst->txwin;
|
||||
|
||||
if ((vma->vm_end - vma->vm_start) > PAGE_SIZE) {
|
||||
pr_debug("%s(): size 0x%zx, PAGE_SIZE 0x%zx\n", __func__,
|
||||
pr_debug("size 0x%zx, PAGE_SIZE 0x%zx\n",
|
||||
(vma->vm_end - vma->vm_start), PAGE_SIZE);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Ensure instance has an open send window */
|
||||
if (!txwin) {
|
||||
pr_err("%s(): No send window open?\n", __func__);
|
||||
pr_err("No send window open?\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!cp_inst->coproc->vops || !cp_inst->coproc->vops->paste_addr) {
|
||||
pr_err("%s(): VAS API is not registered\n", __func__);
|
||||
pr_err("VAS API is not registered\n");
|
||||
return -EACCES;
|
||||
}
|
||||
|
||||
@ -510,14 +509,14 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
|
||||
*/
|
||||
mutex_lock(&txwin->task_ref.mmap_mutex);
|
||||
if (txwin->status != VAS_WIN_ACTIVE) {
|
||||
pr_err("%s(): Window is not active\n", __func__);
|
||||
pr_err("Window is not active\n");
|
||||
rc = -EACCES;
|
||||
goto out;
|
||||
}
|
||||
|
||||
paste_addr = cp_inst->coproc->vops->paste_addr(txwin);
|
||||
if (!paste_addr) {
|
||||
pr_err("%s(): Window paste address failed\n", __func__);
|
||||
pr_err("Window paste address failed\n");
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
@ -533,8 +532,8 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
|
||||
rc = remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
|
||||
vma->vm_end - vma->vm_start, prot);
|
||||
|
||||
pr_devel("%s(): paste addr %llx at %lx, rc %d\n", __func__,
|
||||
paste_addr, vma->vm_start, rc);
|
||||
pr_devel("paste addr %llx at %lx, rc %d\n", paste_addr,
|
||||
vma->vm_start, rc);
|
||||
|
||||
txwin->task_ref.vma = vma;
|
||||
vma->vm_ops = &vas_vm_ops;
|
||||
@ -609,8 +608,7 @@ int vas_register_coproc_api(struct module *mod, enum vas_cop_type cop_type,
|
||||
goto err;
|
||||
}
|
||||
|
||||
pr_devel("%s: Added dev [%d,%d]\n", __func__, MAJOR(devno),
|
||||
MINOR(devno));
|
||||
pr_devel("Added dev [%d,%d]\n", MAJOR(devno), MINOR(devno));
|
||||
|
||||
return 0;
|
||||
|
||||
|
||||
@ -524,8 +524,10 @@ static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p,
|
||||
|
||||
if (cmd) {
|
||||
rc = init_cpu_associativity();
|
||||
if (rc)
|
||||
if (rc) {
|
||||
destroy_cpu_associativity();
|
||||
goto out;
|
||||
}
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
disp = per_cpu_ptr(&vcpu_disp_data, cpu);
|
||||
|
||||
@ -340,7 +340,7 @@ static struct vas_window *vas_allocate_window(int vas_id, u64 flags,
|
||||
|
||||
if (atomic_inc_return(&cop_feat_caps->nr_used_credits) >
|
||||
atomic_read(&cop_feat_caps->nr_total_credits)) {
|
||||
pr_err("Credits are not available to allocate window\n");
|
||||
pr_err_ratelimited("Credits are not available to allocate window\n");
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
@ -423,7 +423,7 @@ static struct vas_window *vas_allocate_window(int vas_id, u64 flags,
|
||||
|
||||
put_vas_user_win_ref(&txwin->vas_win.task_ref);
|
||||
rc = -EBUSY;
|
||||
pr_err("No credit is available to allocate window\n");
|
||||
pr_err_ratelimited("No credit is available to allocate window\n");
|
||||
|
||||
out_free:
|
||||
/*
|
||||
|
||||
@ -804,7 +804,7 @@ int xive_native_get_queue_info(u32 vp_id, u32 prio,
|
||||
if (out_qpage)
|
||||
*out_qpage = be64_to_cpu(qpage);
|
||||
if (out_qsize)
|
||||
*out_qsize = be32_to_cpu(qsize);
|
||||
*out_qsize = be64_to_cpu(qsize);
|
||||
if (out_qeoi_page)
|
||||
*out_qeoi_page = be64_to_cpu(qeoi_page);
|
||||
if (out_escalate_irq)
|
||||
|
||||
@ -57,13 +57,14 @@ int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
|
||||
*/
|
||||
int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
|
||||
{
|
||||
int rc;
|
||||
|
||||
for (; node; node = node->parent) {
|
||||
if (of_device_is_compatible(node, "riscv")) {
|
||||
rc = riscv_of_processor_hartid(node, hartid);
|
||||
if (!rc)
|
||||
return 0;
|
||||
*hartid = (unsigned long)of_get_cpu_hwid(node, 0);
|
||||
if (*hartid == ~0UL) {
|
||||
pr_warn("Found CPU without hart ID\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -22,6 +22,17 @@ config STACK_DEBUG
|
||||
every function call and will therefore incur a major
|
||||
performance hit. Most users should say N.
|
||||
|
||||
config EARLY_PRINTK
|
||||
bool "Early printk"
|
||||
depends on SH_STANDARD_BIOS
|
||||
help
|
||||
Say Y here to redirect kernel printk messages to the serial port
|
||||
used by the SH-IPL bootloader, starting very early in the boot
|
||||
process and ending when the kernel's serial console is initialised.
|
||||
This option is only useful while porting the kernel to a new machine,
|
||||
when the kernel may crash or hang before the serial console is
|
||||
initialised. If unsure, say N.
|
||||
|
||||
config 4KSTACKS
|
||||
bool "Use 4Kb for kernel stacks instead of 8Kb"
|
||||
depends on DEBUG_KERNEL && (MMU || BROKEN) && !PAGE_SIZE_64KB
|
||||
|
||||
@ -128,10 +128,6 @@ struct snp_psc_desc {
|
||||
struct psc_entry entries[VMGEXIT_PSC_MAX_ENTRY];
|
||||
} __packed;
|
||||
|
||||
/* Guest message request error codes */
|
||||
#define SNP_GUEST_REQ_INVALID_LEN BIT_ULL(32)
|
||||
#define SNP_GUEST_REQ_ERR_BUSY BIT_ULL(33)
|
||||
|
||||
#define GHCB_MSR_TERM_REQ 0x100
|
||||
#define GHCB_MSR_TERM_REASON_SET_POS 12
|
||||
#define GHCB_MSR_TERM_REASON_SET_MASK 0xf
|
||||
|
||||
@ -9,6 +9,8 @@
|
||||
#define __ASM_ENCRYPTED_STATE_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/sev-guest.h>
|
||||
|
||||
#include <asm/insn.h>
|
||||
#include <asm/sev-common.h>
|
||||
#include <asm/bootparam.h>
|
||||
@ -185,6 +187,9 @@ static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
struct snp_guest_request_ioctl;
|
||||
|
||||
void setup_ghcb(void);
|
||||
void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
|
||||
unsigned long npages);
|
||||
@ -196,7 +201,7 @@ void snp_set_memory_private(unsigned long vaddr, unsigned long npages);
|
||||
void snp_set_wakeup_secondary_cpu(void);
|
||||
bool snp_init(struct boot_params *bp);
|
||||
void __init __noreturn snp_abort(void);
|
||||
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, unsigned long *fw_err);
|
||||
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio);
|
||||
#else
|
||||
static inline void sev_es_ist_enter(struct pt_regs *regs) { }
|
||||
static inline void sev_es_ist_exit(void) { }
|
||||
@ -216,8 +221,7 @@ static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npa
|
||||
static inline void snp_set_wakeup_secondary_cpu(void) { }
|
||||
static inline bool snp_init(struct boot_params *bp) { return false; }
|
||||
static inline void snp_abort(void) { }
|
||||
static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input,
|
||||
unsigned long *fw_err)
|
||||
static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio)
|
||||
{
|
||||
return -ENOTTY;
|
||||
}
|
||||
|
||||
@ -37,6 +37,8 @@ extern int phys_to_target_node(phys_addr_t start);
|
||||
#define phys_to_target_node phys_to_target_node
|
||||
extern int memory_add_physaddr_to_nid(u64 start);
|
||||
#define memory_add_physaddr_to_nid memory_add_physaddr_to_nid
|
||||
extern int numa_fill_memblks(u64 start, u64 end);
|
||||
#define numa_fill_memblks numa_fill_memblks
|
||||
#endif
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
|
||||
@ -518,7 +518,7 @@ copy_mc_to_kernel(void *to, const void *from, unsigned len);
|
||||
#define copy_mc_to_kernel copy_mc_to_kernel
|
||||
|
||||
unsigned long __must_check
|
||||
copy_mc_to_user(void *to, const void *from, unsigned len);
|
||||
copy_mc_to_user(void __user *to, const void *from, unsigned len);
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
@ -100,6 +100,9 @@ static const struct pci_device_id amd_nb_link_ids[] = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F4) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
|
||||
{}
|
||||
};
|
||||
|
||||
@ -2477,7 +2477,7 @@ static void __init srso_select_mitigation(void)
|
||||
pr_info("%s%s\n", srso_strings[srso_mitigation], (has_microcode ? "" : ", no microcode"));
|
||||
|
||||
pred_cmd:
|
||||
if ((boot_cpu_has(X86_FEATURE_SRSO_NO) || srso_cmd == SRSO_CMD_OFF) &&
|
||||
if ((!boot_cpu_has_bug(X86_BUG_SRSO) || srso_cmd == SRSO_CMD_OFF) &&
|
||||
boot_cpu_has(X86_FEATURE_SBPB))
|
||||
x86_pred_cmd = PRED_CMD_SBPB;
|
||||
}
|
||||
|
||||
@ -80,7 +80,7 @@ static struct desc_struct startup_gdt[GDT_ENTRIES] = {
|
||||
* while the kernel still uses a direct mapping.
|
||||
*/
|
||||
static struct desc_ptr startup_gdt_descr = {
|
||||
.size = sizeof(startup_gdt),
|
||||
.size = sizeof(startup_gdt)-1,
|
||||
.address = 0,
|
||||
};
|
||||
|
||||
|
||||
@ -22,6 +22,8 @@
|
||||
#include <linux/efi.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/psp-sev.h>
|
||||
#include <uapi/linux/sev-guest.h>
|
||||
|
||||
#include <asm/cpu_entry_area.h>
|
||||
#include <asm/stacktrace.h>
|
||||
@ -2205,7 +2207,7 @@ static int __init init_sev_config(char *str)
|
||||
}
|
||||
__setup("sev=", init_sev_config);
|
||||
|
||||
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, unsigned long *fw_err)
|
||||
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio)
|
||||
{
|
||||
struct ghcb_state state;
|
||||
struct es_em_ctxt ctxt;
|
||||
@ -2213,8 +2215,7 @@ int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, unsigned
|
||||
struct ghcb *ghcb;
|
||||
int ret;
|
||||
|
||||
if (!fw_err)
|
||||
return -EINVAL;
|
||||
rio->exitinfo2 = SEV_RET_NO_FW_CALL;
|
||||
|
||||
/*
|
||||
* __sev_get_ghcb() needs to run with IRQs disabled because it is using
|
||||
@ -2239,16 +2240,16 @@ int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, unsigned
|
||||
if (ret)
|
||||
goto e_put;
|
||||
|
||||
*fw_err = ghcb->save.sw_exit_info_2;
|
||||
switch (*fw_err) {
|
||||
rio->exitinfo2 = ghcb->save.sw_exit_info_2;
|
||||
switch (rio->exitinfo2) {
|
||||
case 0:
|
||||
break;
|
||||
|
||||
case SNP_GUEST_REQ_ERR_BUSY:
|
||||
case SNP_GUEST_VMM_ERR(SNP_GUEST_VMM_ERR_BUSY):
|
||||
ret = -EAGAIN;
|
||||
break;
|
||||
|
||||
case SNP_GUEST_REQ_INVALID_LEN:
|
||||
case SNP_GUEST_VMM_ERR(SNP_GUEST_VMM_ERR_INVALID_LEN):
|
||||
/* Number of expected pages are returned in RBX */
|
||||
if (exit_code == SVM_VMGEXIT_EXT_GUEST_REQUEST) {
|
||||
input->data_npages = ghcb_get_rbx(ghcb);
|
||||
|
||||
@ -70,23 +70,23 @@ unsigned long __must_check copy_mc_to_kernel(void *dst, const void *src, unsigne
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(copy_mc_to_kernel);
|
||||
|
||||
unsigned long __must_check copy_mc_to_user(void *dst, const void *src, unsigned len)
|
||||
unsigned long __must_check copy_mc_to_user(void __user *dst, const void *src, unsigned len)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
if (copy_mc_fragile_enabled) {
|
||||
__uaccess_begin();
|
||||
ret = copy_mc_fragile(dst, src, len);
|
||||
ret = copy_mc_fragile((__force void *)dst, src, len);
|
||||
__uaccess_end();
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (static_cpu_has(X86_FEATURE_ERMS)) {
|
||||
__uaccess_begin();
|
||||
ret = copy_mc_enhanced_fast_string(dst, src, len);
|
||||
ret = copy_mc_enhanced_fast_string((__force void *)dst, src, len);
|
||||
__uaccess_end();
|
||||
return ret;
|
||||
}
|
||||
|
||||
return copy_user_generic(dst, src, len);
|
||||
return copy_user_generic((__force void *)dst, src, len);
|
||||
}
|
||||
|
||||
@ -9,12 +9,21 @@ bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size)
|
||||
unsigned long vaddr = (unsigned long)unsafe_src;
|
||||
|
||||
/*
|
||||
* Range covering the highest possible canonical userspace address
|
||||
* as well as non-canonical address range. For the canonical range
|
||||
* we also need to include the userspace guard page.
|
||||
* Do not allow userspace addresses. This disallows
|
||||
* normal userspace and the userspace guard page:
|
||||
*/
|
||||
return vaddr >= TASK_SIZE_MAX + PAGE_SIZE &&
|
||||
__is_canonical_address(vaddr, boot_cpu_data.x86_virt_bits);
|
||||
if (vaddr < TASK_SIZE_MAX + PAGE_SIZE)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Allow everything during early boot before 'x86_virt_bits'
|
||||
* is initialized. Needed for instruction decoding in early
|
||||
* exception handlers.
|
||||
*/
|
||||
if (!boot_cpu_data.x86_virt_bits)
|
||||
return true;
|
||||
|
||||
return __is_canonical_address(vaddr, boot_cpu_data.x86_virt_bits);
|
||||
}
|
||||
#else
|
||||
bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size)
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#include <linux/nodemask.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/topology.h>
|
||||
#include <linux/sort.h>
|
||||
|
||||
#include <asm/e820/api.h>
|
||||
#include <asm/proto.h>
|
||||
@ -961,4 +962,83 @@ int memory_add_physaddr_to_nid(u64 start)
|
||||
return nid;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
|
||||
|
||||
static int __init cmp_memblk(const void *a, const void *b)
|
||||
{
|
||||
const struct numa_memblk *ma = *(const struct numa_memblk **)a;
|
||||
const struct numa_memblk *mb = *(const struct numa_memblk **)b;
|
||||
|
||||
return ma->start - mb->start;
|
||||
}
|
||||
|
||||
static struct numa_memblk *numa_memblk_list[NR_NODE_MEMBLKS] __initdata;
|
||||
|
||||
/**
|
||||
* numa_fill_memblks - Fill gaps in numa_meminfo memblks
|
||||
* @start: address to begin fill
|
||||
* @end: address to end fill
|
||||
*
|
||||
* Find and extend numa_meminfo memblks to cover the @start-@end
|
||||
* physical address range, such that the first memblk includes
|
||||
* @start, the last memblk includes @end, and any gaps in between
|
||||
* are filled.
|
||||
*
|
||||
* RETURNS:
|
||||
* 0 : Success
|
||||
* NUMA_NO_MEMBLK : No memblk exists in @start-@end range
|
||||
*/
|
||||
|
||||
int __init numa_fill_memblks(u64 start, u64 end)
|
||||
{
|
||||
struct numa_memblk **blk = &numa_memblk_list[0];
|
||||
struct numa_meminfo *mi = &numa_meminfo;
|
||||
int count = 0;
|
||||
u64 prev_end;
|
||||
|
||||
/*
|
||||
* Create a list of pointers to numa_meminfo memblks that
|
||||
* overlap start, end. Exclude (start == bi->end) since
|
||||
* end addresses in both a CFMWS range and a memblk range
|
||||
* are exclusive.
|
||||
*
|
||||
* This list of pointers is used to make in-place changes
|
||||
* that fill out the numa_meminfo memblks.
|
||||
*/
|
||||
for (int i = 0; i < mi->nr_blks; i++) {
|
||||
struct numa_memblk *bi = &mi->blk[i];
|
||||
|
||||
if (start < bi->end && end >= bi->start) {
|
||||
blk[count] = &mi->blk[i];
|
||||
count++;
|
||||
}
|
||||
}
|
||||
if (!count)
|
||||
return NUMA_NO_MEMBLK;
|
||||
|
||||
/* Sort the list of pointers in memblk->start order */
|
||||
sort(&blk[0], count, sizeof(blk[0]), cmp_memblk, NULL);
|
||||
|
||||
/* Make sure the first/last memblks include start/end */
|
||||
blk[0]->start = min(blk[0]->start, start);
|
||||
blk[count - 1]->end = max(blk[count - 1]->end, end);
|
||||
|
||||
/*
|
||||
* Fill any gaps by tracking the previous memblks
|
||||
* end address and backfilling to it if needed.
|
||||
*/
|
||||
prev_end = blk[0]->end;
|
||||
for (int i = 1; i < count; i++) {
|
||||
struct numa_memblk *curr = blk[i];
|
||||
|
||||
if (prev_end >= curr->start) {
|
||||
if (prev_end < curr->end)
|
||||
prev_end = curr->end;
|
||||
} else {
|
||||
curr->start = prev_end;
|
||||
prev_end = curr->end;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@ -496,8 +496,8 @@ static inline void bio_check_ro(struct bio *bio)
|
||||
if (op_is_write(bio_op(bio)) && bdev_read_only(bio->bi_bdev)) {
|
||||
if (op_is_flush(bio->bi_opf) && !bio_sectors(bio))
|
||||
return;
|
||||
pr_warn("Trying to write to read-only block-device %pg\n",
|
||||
bio->bi_bdev);
|
||||
pr_warn_ratelimited("Trying to write to read-only block-device %pg\n",
|
||||
bio->bi_bdev);
|
||||
/* Older lvm-tools actually trigger this */
|
||||
}
|
||||
}
|
||||
|
||||
@ -158,8 +158,8 @@ static int create_pnp_modalias(struct acpi_device *acpi_dev, char *modalias,
|
||||
return 0;
|
||||
|
||||
len = snprintf(modalias, size, "acpi:");
|
||||
if (len <= 0)
|
||||
return len;
|
||||
if (len >= size)
|
||||
return -ENOMEM;
|
||||
|
||||
size -= len;
|
||||
|
||||
@ -212,8 +212,10 @@ static int create_of_modalias(struct acpi_device *acpi_dev, char *modalias,
|
||||
len = snprintf(modalias, size, "of:N%sT", (char *)buf.pointer);
|
||||
ACPI_FREE(buf.pointer);
|
||||
|
||||
if (len <= 0)
|
||||
return len;
|
||||
if (len >= size)
|
||||
return -ENOMEM;
|
||||
|
||||
size -= len;
|
||||
|
||||
of_compatible = acpi_dev->data.of_compatible;
|
||||
if (of_compatible->type == ACPI_TYPE_PACKAGE) {
|
||||
|
||||
@ -310,11 +310,16 @@ static int __init acpi_parse_cfmws(union acpi_subtable_headers *header,
|
||||
start = cfmws->base_hpa;
|
||||
end = cfmws->base_hpa + cfmws->window_size;
|
||||
|
||||
/* Skip if the SRAT already described the NUMA details for this HPA */
|
||||
node = phys_to_target_node(start);
|
||||
if (node != NUMA_NO_NODE)
|
||||
/*
|
||||
* The SRAT may have already described NUMA details for all,
|
||||
* or a portion of, this CFMWS HPA range. Extend the memblks
|
||||
* found for any portion of the window to cover the entire
|
||||
* window.
|
||||
*/
|
||||
if (!numa_fill_memblks(start, end))
|
||||
return 0;
|
||||
|
||||
/* No SRAT description. Create a new node. */
|
||||
node = acpi_map_pxm_to_node(*fake_pxm);
|
||||
|
||||
if (node == NUMA_NO_NODE) {
|
||||
|
||||
@ -1114,25 +1114,26 @@ static int acpi_data_prop_read(const struct acpi_device_data *data,
|
||||
switch (proptype) {
|
||||
case DEV_PROP_STRING:
|
||||
break;
|
||||
case DEV_PROP_U8 ... DEV_PROP_U64:
|
||||
default:
|
||||
if (obj->type == ACPI_TYPE_BUFFER) {
|
||||
if (nval > obj->buffer.length)
|
||||
return -EOVERFLOW;
|
||||
break;
|
||||
} else {
|
||||
if (nval > obj->package.count)
|
||||
return -EOVERFLOW;
|
||||
}
|
||||
fallthrough;
|
||||
default:
|
||||
if (nval > obj->package.count)
|
||||
return -EOVERFLOW;
|
||||
break;
|
||||
}
|
||||
if (nval == 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (obj->type != ACPI_TYPE_BUFFER)
|
||||
items = obj->package.elements;
|
||||
else
|
||||
if (obj->type == ACPI_TYPE_BUFFER) {
|
||||
if (proptype != DEV_PROP_U8)
|
||||
return -EPROTO;
|
||||
items = obj;
|
||||
} else {
|
||||
items = obj->package.elements;
|
||||
}
|
||||
|
||||
switch (proptype) {
|
||||
case DEV_PROP_U8:
|
||||
|
||||
@ -130,6 +130,16 @@ static int video_detect_force_native(const struct dmi_system_id *d)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int video_detect_portege_r100(const struct dmi_system_id *d)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
/* Search for Trident CyberBlade XP4m32 to confirm Portégé R100 */
|
||||
dev = pci_get_device(PCI_VENDOR_ID_TRIDENT, 0x2100, NULL);
|
||||
if (dev)
|
||||
acpi_backlight_dmi = acpi_backlight_vendor;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dmi_system_id video_detect_dmi_table[] = {
|
||||
/*
|
||||
* Models which should use the vendor backlight interface,
|
||||
@ -268,6 +278,22 @@ static const struct dmi_system_id video_detect_dmi_table[] = {
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* Toshiba Portégé R100 has working both acpi_video and toshiba_acpi
|
||||
* vendor driver. But none of them gets activated as it has a VGA with
|
||||
* no kernel driver (Trident CyberBlade XP4m32).
|
||||
* The DMI strings are generic so check for the VGA chip in callback.
|
||||
*/
|
||||
{
|
||||
.callback = video_detect_portege_r100,
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Portable PC"),
|
||||
DMI_MATCH(DMI_PRODUCT_VERSION, "Version 1.0"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "Portable PC")
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* Models which need acpi_video backlight control where the GPU drivers
|
||||
* do not call acpi_video_register_backlight() because no internal panel
|
||||
|
||||
@ -48,7 +48,7 @@ static ssize_t regmap_name_read_file(struct file *file,
|
||||
name = map->dev->driver->name;
|
||||
|
||||
ret = snprintf(buf, PAGE_SIZE, "%s\n", name);
|
||||
if (ret < 0) {
|
||||
if (ret >= PAGE_SIZE) {
|
||||
kfree(buf);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1702,17 +1702,19 @@ static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
|
||||
}
|
||||
|
||||
if (!map->cache_bypass && map->format.parse_val) {
|
||||
unsigned int ival;
|
||||
unsigned int ival, offset;
|
||||
int val_bytes = map->format.val_bytes;
|
||||
for (i = 0; i < val_len / val_bytes; i++) {
|
||||
ival = map->format.parse_val(val + (i * val_bytes));
|
||||
ret = regcache_write(map,
|
||||
reg + regmap_get_offset(map, i),
|
||||
ival);
|
||||
|
||||
/* Cache the last written value for noinc writes */
|
||||
i = noinc ? val_len - val_bytes : 0;
|
||||
for (; i < val_len; i += val_bytes) {
|
||||
ival = map->format.parse_val(val + i);
|
||||
offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
|
||||
ret = regcache_write(map, reg + offset, ival);
|
||||
if (ret) {
|
||||
dev_err(map->dev,
|
||||
"Error in caching of register: %x ret: %d\n",
|
||||
reg + regmap_get_offset(map, i), ret);
|
||||
reg + offset, ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
@ -250,7 +250,6 @@ static void nbd_dev_remove(struct nbd_device *nbd)
|
||||
struct gendisk *disk = nbd->disk;
|
||||
|
||||
del_gendisk(disk);
|
||||
put_disk(disk);
|
||||
blk_mq_free_tag_set(&nbd->tag_set);
|
||||
|
||||
/*
|
||||
@ -261,7 +260,7 @@ static void nbd_dev_remove(struct nbd_device *nbd)
|
||||
idr_remove(&nbd_index_idr, nbd->index);
|
||||
mutex_unlock(&nbd_index_mutex);
|
||||
destroy_workqueue(nbd->recv_workq);
|
||||
kfree(nbd);
|
||||
put_disk(disk);
|
||||
}
|
||||
|
||||
static void nbd_dev_remove_work(struct work_struct *work)
|
||||
@ -1608,6 +1607,13 @@ static void nbd_release(struct gendisk *disk, fmode_t mode)
|
||||
nbd_put(nbd);
|
||||
}
|
||||
|
||||
static void nbd_free_disk(struct gendisk *disk)
|
||||
{
|
||||
struct nbd_device *nbd = disk->private_data;
|
||||
|
||||
kfree(nbd);
|
||||
}
|
||||
|
||||
static const struct block_device_operations nbd_fops =
|
||||
{
|
||||
.owner = THIS_MODULE,
|
||||
@ -1615,6 +1621,7 @@ static const struct block_device_operations nbd_fops =
|
||||
.release = nbd_release,
|
||||
.ioctl = nbd_ioctl,
|
||||
.compat_ioctl = nbd_ioctl,
|
||||
.free_disk = nbd_free_disk,
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_DEBUG_FS)
|
||||
|
||||
@ -71,7 +71,7 @@ static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
|
||||
while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) {
|
||||
if (!wait)
|
||||
return 0;
|
||||
hwrng_msleep(rng, 1000);
|
||||
hwrng_yield(rng);
|
||||
}
|
||||
|
||||
num_words = rng_readl(priv, RNG_STATUS) >> 24;
|
||||
|
||||
@ -680,6 +680,12 @@ long hwrng_msleep(struct hwrng *rng, unsigned int msecs)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hwrng_msleep);
|
||||
|
||||
long hwrng_yield(struct hwrng *rng)
|
||||
{
|
||||
return wait_for_completion_interruptible_timeout(&rng->dying, 1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hwrng_yield);
|
||||
|
||||
static int __init hwrng_modinit(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@ -58,7 +58,8 @@ struct amd_geode_priv {
|
||||
|
||||
static int geode_rng_data_read(struct hwrng *rng, u32 *data)
|
||||
{
|
||||
void __iomem *mem = (void __iomem *)rng->priv;
|
||||
struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv;
|
||||
void __iomem *mem = priv->membase;
|
||||
|
||||
*data = readl(mem + GEODE_RNG_DATA_REG);
|
||||
|
||||
@ -67,7 +68,8 @@ static int geode_rng_data_read(struct hwrng *rng, u32 *data)
|
||||
|
||||
static int geode_rng_data_present(struct hwrng *rng, int wait)
|
||||
{
|
||||
void __iomem *mem = (void __iomem *)rng->priv;
|
||||
struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv;
|
||||
void __iomem *mem = priv->membase;
|
||||
int data, i;
|
||||
|
||||
for (i = 0; i < 20; i++) {
|
||||
|
||||
@ -510,7 +510,7 @@ static void __init npcm7xx_clk_init(struct device_node *clk_np)
|
||||
return;
|
||||
|
||||
npcm7xx_init_fail:
|
||||
kfree(npcm7xx_clk_data->hws);
|
||||
kfree(npcm7xx_clk_data);
|
||||
npcm7xx_init_np_err:
|
||||
iounmap(clk_base);
|
||||
npcm7xx_init_error:
|
||||
|
||||
@ -213,6 +213,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
|
||||
sclk->info = scmi_proto_clk_ops->info_get(ph, idx);
|
||||
if (!sclk->info) {
|
||||
dev_dbg(dev, "invalid clock info for idx %d\n", idx);
|
||||
devm_kfree(dev, sclk);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
@ -96,6 +96,7 @@ config CLK_IMX8QXP
|
||||
depends on (ARCH_MXC && ARM64) || COMPILE_TEST
|
||||
depends on IMX_SCU && HAVE_ARM_SMCCC
|
||||
select MXC_CLK_SCU
|
||||
select MXC_CLK
|
||||
help
|
||||
Build the driver for IMX8QXP SCU based clocks.
|
||||
|
||||
|
||||
@ -288,8 +288,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
|
||||
void __iomem *base;
|
||||
int err;
|
||||
|
||||
clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
|
||||
IMX8MQ_CLK_END), GFP_KERNEL);
|
||||
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, IMX8MQ_CLK_END), GFP_KERNEL);
|
||||
if (WARN_ON(!clk_hw_data))
|
||||
return -ENOMEM;
|
||||
|
||||
@ -306,10 +305,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
|
||||
hws[IMX8MQ_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
|
||||
base = of_iomap(np, 0);
|
||||
base = devm_of_iomap(dev, np, 0, NULL);
|
||||
of_node_put(np);
|
||||
if (WARN_ON(!base))
|
||||
return -ENOMEM;
|
||||
if (WARN_ON(IS_ERR(base))) {
|
||||
err = PTR_ERR(base);
|
||||
goto unregister_hws;
|
||||
}
|
||||
|
||||
hws[IMX8MQ_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x28, 16, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
|
||||
hws[IMX8MQ_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x18, 16, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
|
||||
@ -395,8 +396,10 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
|
||||
|
||||
np = dev->of_node;
|
||||
base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (WARN_ON(IS_ERR(base)))
|
||||
return PTR_ERR(base);
|
||||
if (WARN_ON(IS_ERR(base))) {
|
||||
err = PTR_ERR(base);
|
||||
goto unregister_hws;
|
||||
}
|
||||
|
||||
/* CORE */
|
||||
hws[IMX8MQ_CLK_A53_DIV] = imx8m_clk_hw_composite_core("arm_a53_div", imx8mq_a53_sels, base + 0x8000);
|
||||
|
||||
@ -148,10 +148,10 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
|
||||
imx_clk_scu("adc0_clk", IMX_SC_R_ADC_0, IMX_SC_PM_CLK_PER);
|
||||
imx_clk_scu("adc1_clk", IMX_SC_R_ADC_1, IMX_SC_PM_CLK_PER);
|
||||
imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER);
|
||||
imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL);
|
||||
imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER);
|
||||
imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0);
|
||||
imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS);
|
||||
imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL);
|
||||
|
||||
/* Audio SS */
|
||||
imx_clk_scu("audio_pll0_clk", IMX_SC_R_AUDIO_PLL_0, IMX_SC_PM_CLK_PLL);
|
||||
|
||||
@ -281,12 +281,13 @@ static void __init of_pll_div_clk_init(struct device_node *node)
|
||||
|
||||
clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,
|
||||
mask, 0, NULL);
|
||||
if (clk) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
} else {
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("%s: error registering divider %s\n", __func__, clk_name);
|
||||
iounmap(reg);
|
||||
return;
|
||||
}
|
||||
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
}
|
||||
CLK_OF_DECLARE(pll_divider_clock, "ti,keystone,pll-divider-clock", of_pll_div_clk_init);
|
||||
|
||||
@ -328,10 +329,12 @@ static void __init of_pll_mux_clk_init(struct device_node *node)
|
||||
clk = clk_register_mux(NULL, clk_name, (const char **)&parents,
|
||||
ARRAY_SIZE(parents) , 0, reg, shift, mask,
|
||||
0, NULL);
|
||||
if (clk)
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
else
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("%s: error registering mux %s\n", __func__, clk_name);
|
||||
return;
|
||||
}
|
||||
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
}
|
||||
CLK_OF_DECLARE(pll_mux_clock, "ti,keystone,pll-mux-clock", of_pll_mux_clk_init);
|
||||
|
||||
|
||||
@ -670,6 +670,8 @@ static int mtk_topckgen_init(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
|
||||
clk_data);
|
||||
@ -749,6 +751,8 @@ static void __init mtk_infrasys_init_early(struct device_node *node)
|
||||
|
||||
if (!infra_clk_data) {
|
||||
infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR);
|
||||
if (!infra_clk_data)
|
||||
return;
|
||||
|
||||
for (i = 0; i < CLK_INFRA_NR; i++)
|
||||
infra_clk_data->hws[i] = ERR_PTR(-EPROBE_DEFER);
|
||||
@ -776,6 +780,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
|
||||
|
||||
if (!infra_clk_data) {
|
||||
infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR);
|
||||
if (!infra_clk_data)
|
||||
return -ENOMEM;
|
||||
} else {
|
||||
for (i = 0; i < CLK_INFRA_NR; i++) {
|
||||
if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER))
|
||||
@ -893,6 +899,8 @@ static int mtk_pericfg_init(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_PERI_NR);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
|
||||
clk_data);
|
||||
|
||||
@ -738,6 +738,8 @@ static int clk_mt6765_apmixed_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
|
||||
|
||||
@ -773,6 +775,8 @@ static int clk_mt6765_top_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks),
|
||||
clk_data);
|
||||
@ -813,6 +817,8 @@ static int clk_mt6765_ifr_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, ifr_clks, ARRAY_SIZE(ifr_clks),
|
||||
clk_data);
|
||||
|
||||
@ -1218,6 +1218,8 @@ static int clk_mt6779_apmixed_probe(struct platform_device *pdev)
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
|
||||
|
||||
@ -1238,6 +1240,8 @@ static int clk_mt6779_top_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
|
||||
clk_data);
|
||||
|
||||
@ -392,6 +392,8 @@ static int mtk_topckgen_init(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
|
||||
clk_data);
|
||||
@ -546,6 +548,8 @@ static void mtk_infrasys_init_early(struct device_node *node)
|
||||
|
||||
if (!infra_clk_data) {
|
||||
infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR);
|
||||
if (!infra_clk_data)
|
||||
return;
|
||||
|
||||
for (i = 0; i < CLK_INFRA_NR; i++)
|
||||
infra_clk_data->hws[i] = ERR_PTR(-EPROBE_DEFER);
|
||||
@ -571,6 +575,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
|
||||
|
||||
if (!infra_clk_data) {
|
||||
infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR);
|
||||
if (!infra_clk_data)
|
||||
return -ENOMEM;
|
||||
} else {
|
||||
for (i = 0; i < CLK_INFRA_NR; i++) {
|
||||
if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER))
|
||||
|
||||
@ -79,6 +79,8 @@ static int clk_mt7629_ethsys_init(struct platform_device *pdev)
|
||||
int r;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data);
|
||||
|
||||
@ -101,6 +103,8 @@ static int clk_mt7629_sgmiisys_init(struct platform_device *pdev)
|
||||
int r;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK,
|
||||
clk_data);
|
||||
|
||||
@ -557,6 +557,8 @@ static int mtk_topckgen_init(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
|
||||
clk_data);
|
||||
@ -580,6 +582,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
|
||||
struct clk_hw_onecell_data *clk_data;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
|
||||
clk_data);
|
||||
@ -603,6 +607,8 @@ static int mtk_pericfg_init(struct platform_device *pdev)
|
||||
return PTR_ERR(base);
|
||||
|
||||
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks),
|
||||
clk_data);
|
||||
|
||||
@ -127,6 +127,7 @@ config IPQ_APSS_6018
|
||||
tristate "IPQ APSS Clock Controller"
|
||||
select IPQ_APSS_PLL
|
||||
depends on QCOM_APCS_IPC || COMPILE_TEST
|
||||
depends on QCOM_SMEM
|
||||
help
|
||||
Support for APSS clock controller on IPQ platforms. The
|
||||
APSS clock controller manages the Mux and enable block that feeds the
|
||||
|
||||
@ -158,17 +158,11 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 index)
|
||||
static unsigned long
|
||||
calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div)
|
||||
{
|
||||
if (hid_div) {
|
||||
rate *= 2;
|
||||
rate /= hid_div + 1;
|
||||
}
|
||||
if (hid_div)
|
||||
rate = mult_frac(rate, 2, hid_div + 1);
|
||||
|
||||
if (mode) {
|
||||
u64 tmp = rate;
|
||||
tmp *= m;
|
||||
do_div(tmp, n);
|
||||
rate = tmp;
|
||||
}
|
||||
if (mode)
|
||||
rate = mult_frac(rate, m, n);
|
||||
|
||||
return rate;
|
||||
}
|
||||
|
||||
@ -245,71 +245,6 @@ static const struct clk_parent_data gcc_xo_gpll0_gpll4_gpll0_early_div[] = {
|
||||
{ .hw = &gpll0_early_div.hw }
|
||||
};
|
||||
|
||||
static const struct freq_tbl ftbl_system_noc_clk_src[] = {
|
||||
F(19200000, P_XO, 1, 0, 0),
|
||||
F(50000000, P_GPLL0_EARLY_DIV, 6, 0, 0),
|
||||
F(100000000, P_GPLL0, 6, 0, 0),
|
||||
F(150000000, P_GPLL0, 4, 0, 0),
|
||||
F(200000000, P_GPLL0, 3, 0, 0),
|
||||
F(240000000, P_GPLL0, 2.5, 0, 0),
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct clk_rcg2 system_noc_clk_src = {
|
||||
.cmd_rcgr = 0x0401c,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_xo_gpll0_gpll0_early_div_map,
|
||||
.freq_tbl = ftbl_system_noc_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "system_noc_clk_src",
|
||||
.parent_data = gcc_xo_gpll0_gpll0_early_div,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_early_div),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct freq_tbl ftbl_config_noc_clk_src[] = {
|
||||
F(19200000, P_XO, 1, 0, 0),
|
||||
F(37500000, P_GPLL0, 16, 0, 0),
|
||||
F(75000000, P_GPLL0, 8, 0, 0),
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct clk_rcg2 config_noc_clk_src = {
|
||||
.cmd_rcgr = 0x0500c,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_xo_gpll0_map,
|
||||
.freq_tbl = ftbl_config_noc_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "config_noc_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct freq_tbl ftbl_periph_noc_clk_src[] = {
|
||||
F(19200000, P_XO, 1, 0, 0),
|
||||
F(37500000, P_GPLL0, 16, 0, 0),
|
||||
F(50000000, P_GPLL0, 12, 0, 0),
|
||||
F(75000000, P_GPLL0, 8, 0, 0),
|
||||
F(100000000, P_GPLL0, 6, 0, 0),
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct clk_rcg2 periph_noc_clk_src = {
|
||||
.cmd_rcgr = 0x06014,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_xo_gpll0_map,
|
||||
.freq_tbl = ftbl_periph_noc_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "periph_noc_clk_src",
|
||||
.parent_data = gcc_xo_gpll0,
|
||||
.num_parents = ARRAY_SIZE(gcc_xo_gpll0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct freq_tbl ftbl_usb30_master_clk_src[] = {
|
||||
F(19200000, P_XO, 1, 0, 0),
|
||||
F(120000000, P_GPLL0, 5, 0, 0),
|
||||
@ -1298,11 +1233,7 @@ static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_mmss_noc_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
.flags = CLK_IGNORE_UNUSED,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1465,11 +1396,6 @@ static struct clk_branch gcc_usb_phy_cfg_ahb2phy_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb_phy_cfg_ahb2phy_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1499,11 +1425,6 @@ static struct clk_branch gcc_sdcc1_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_sdcc1_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1550,11 +1471,6 @@ static struct clk_branch gcc_sdcc2_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_sdcc2_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1584,11 +1500,6 @@ static struct clk_branch gcc_sdcc3_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_sdcc3_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1618,11 +1529,6 @@ static struct clk_branch gcc_sdcc4_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_sdcc4_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1636,11 +1542,6 @@ static struct clk_branch gcc_blsp1_ahb_clk = {
|
||||
.enable_mask = BIT(17),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_blsp1_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -1978,11 +1879,6 @@ static struct clk_branch gcc_blsp2_ahb_clk = {
|
||||
.enable_mask = BIT(15),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_blsp2_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2319,11 +2215,6 @@ static struct clk_branch gcc_pdm_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pdm_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2354,11 +2245,6 @@ static struct clk_branch gcc_prng_ahb_clk = {
|
||||
.enable_mask = BIT(13),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_prng_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2371,11 +2257,6 @@ static struct clk_branch gcc_tsif_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_tsif_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2423,11 +2304,6 @@ static struct clk_branch gcc_boot_rom_ahb_clk = {
|
||||
.enable_mask = BIT(10),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_boot_rom_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2521,11 +2397,6 @@ static struct clk_branch gcc_pcie_0_slv_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_0_slv_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2538,11 +2409,6 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_0_mstr_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2555,11 +2421,6 @@ static struct clk_branch gcc_pcie_0_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_0_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2607,11 +2468,6 @@ static struct clk_branch gcc_pcie_1_slv_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_1_slv_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2624,11 +2480,6 @@ static struct clk_branch gcc_pcie_1_mstr_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_1_mstr_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2641,11 +2492,6 @@ static struct clk_branch gcc_pcie_1_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_1_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2693,11 +2539,6 @@ static struct clk_branch gcc_pcie_2_slv_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_2_slv_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2710,11 +2551,6 @@ static struct clk_branch gcc_pcie_2_mstr_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_2_mstr_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2727,11 +2563,6 @@ static struct clk_branch gcc_pcie_2_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_2_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2779,11 +2610,6 @@ static struct clk_branch gcc_pcie_phy_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_pcie_phy_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -2830,11 +2656,6 @@ static struct clk_branch gcc_ufs_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_ufs_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3061,11 +2882,7 @@ static struct clk_branch gcc_aggre0_snoc_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_aggre0_snoc_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
|
||||
.flags = CLK_IS_CRITICAL,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3078,11 +2895,7 @@ static struct clk_branch gcc_aggre0_cnoc_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_aggre0_cnoc_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
|
||||
.flags = CLK_IS_CRITICAL,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3095,11 +2908,7 @@ static struct clk_branch gcc_smmu_aggre0_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_smmu_aggre0_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
|
||||
.flags = CLK_IS_CRITICAL,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3112,11 +2921,7 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_smmu_aggre0_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
|
||||
.flags = CLK_IS_CRITICAL,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3163,10 +2968,6 @@ static struct clk_branch gcc_dcc_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_dcc_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3179,10 +2980,6 @@ static struct clk_branch gcc_aggre0_noc_mpu_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_aggre0_noc_mpu_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3195,11 +2992,6 @@ static struct clk_branch gcc_qspi_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_qspi_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&periph_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3348,10 +3140,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_mss_cfg_ahb_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&config_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3364,10 +3152,6 @@ static struct clk_branch gcc_mss_mnoc_bimc_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_mss_mnoc_bimc_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3380,10 +3164,6 @@ static struct clk_branch gcc_mss_snoc_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_mss_snoc_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3396,10 +3176,6 @@ static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_mss_q6_bimc_axi_clk",
|
||||
.parent_hws = (const struct clk_hw*[]){
|
||||
&system_noc_clk_src.clkr.hw,
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
@ -3495,9 +3271,6 @@ static struct clk_regmap *gcc_msm8996_clocks[] = {
|
||||
[GPLL0] = &gpll0.clkr,
|
||||
[GPLL4_EARLY] = &gpll4_early.clkr,
|
||||
[GPLL4] = &gpll4.clkr,
|
||||
[SYSTEM_NOC_CLK_SRC] = &system_noc_clk_src.clkr,
|
||||
[CONFIG_NOC_CLK_SRC] = &config_noc_clk_src.clkr,
|
||||
[PERIPH_NOC_CLK_SRC] = &periph_noc_clk_src.clkr,
|
||||
[USB30_MASTER_CLK_SRC] = &usb30_master_clk_src.clkr,
|
||||
[USB30_MOCK_UTMI_CLK_SRC] = &usb30_mock_utmi_clk_src.clkr,
|
||||
[USB3_PHY_AUX_CLK_SRC] = &usb3_phy_aux_clk_src.clkr,
|
||||
|
||||
@ -792,7 +792,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
|
||||
.name = "gcc_sdcc2_apps_clk_src",
|
||||
.parent_data = gcc_parents_6,
|
||||
.num_parents = ARRAY_SIZE(gcc_parents_6),
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.flags = CLK_OPS_PARENT_ENABLE,
|
||||
.ops = &clk_rcg2_floor_ops,
|
||||
},
|
||||
};
|
||||
|
||||
@ -2478,6 +2478,7 @@ static struct clk_branch fd_ahb_clk = {
|
||||
|
||||
static struct clk_branch mnoc_ahb_clk = {
|
||||
.halt_reg = 0x5024,
|
||||
.halt_check = BRANCH_HALT_SKIP,
|
||||
.clkr = {
|
||||
.enable_reg = 0x5024,
|
||||
.enable_mask = BIT(0),
|
||||
@ -2493,6 +2494,7 @@ static struct clk_branch mnoc_ahb_clk = {
|
||||
|
||||
static struct clk_branch bimc_smmu_ahb_clk = {
|
||||
.halt_reg = 0xe004,
|
||||
.halt_check = BRANCH_HALT_SKIP,
|
||||
.hwcg_reg = 0xe004,
|
||||
.hwcg_bit = 1,
|
||||
.clkr = {
|
||||
@ -2510,6 +2512,7 @@ static struct clk_branch bimc_smmu_ahb_clk = {
|
||||
|
||||
static struct clk_branch bimc_smmu_axi_clk = {
|
||||
.halt_reg = 0xe008,
|
||||
.halt_check = BRANCH_HALT_SKIP,
|
||||
.hwcg_reg = 0xe008,
|
||||
.hwcg_bit = 1,
|
||||
.clkr = {
|
||||
@ -2650,11 +2653,13 @@ static struct gdsc camss_cpp_gdsc = {
|
||||
static struct gdsc bimc_smmu_gdsc = {
|
||||
.gdscr = 0xe020,
|
||||
.gds_hw_ctrl = 0xe024,
|
||||
.cxcs = (unsigned int []){ 0xe008 },
|
||||
.cxc_count = 1,
|
||||
.pd = {
|
||||
.name = "bimc_smmu",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.flags = HW_CTRL | ALWAYS_ON,
|
||||
.flags = VOTABLE,
|
||||
};
|
||||
|
||||
static struct clk_regmap *mmcc_msm8998_clocks[] = {
|
||||
|
||||
@ -70,8 +70,21 @@ void cpg_simple_notifier_register(struct raw_notifier_head *notifiers,
|
||||
#define STPnHCK BIT(9 - SDnSRCFC_SHIFT)
|
||||
|
||||
static const struct clk_div_table cpg_sdh_div_table[] = {
|
||||
/*
|
||||
* These values are recommended by the datasheet. Because they come
|
||||
* first, Linux will only use these.
|
||||
*/
|
||||
{ 0, 1 }, { 1, 2 }, { STPnHCK | 2, 4 }, { STPnHCK | 3, 8 },
|
||||
{ STPnHCK | 4, 16 }, { 0, 0 },
|
||||
{ STPnHCK | 4, 16 },
|
||||
/*
|
||||
* These values are not recommended because STPnHCK is wrong. But they
|
||||
* have been seen because of broken firmware. So, we support reading
|
||||
* them but Linux will sanitize them when initializing through
|
||||
* recalc_rate.
|
||||
*/
|
||||
{ STPnHCK | 0, 1 }, { STPnHCK | 1, 2 }, { 2, 4 }, { 3, 8 }, { 4, 16 },
|
||||
/* Sentinel */
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
struct clk * __init cpg_sdh_clk_register(const char *name,
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
* Copyright (C) 2015 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/clk/renesas.h>
|
||||
@ -39,14 +40,13 @@
|
||||
#define WARN_DEBUG(x) do { } while (0)
|
||||
#endif
|
||||
|
||||
#define DIV_RSMASK(v, s, m) ((v >> s) & m)
|
||||
#define GET_SHIFT(val) ((val >> 12) & 0xff)
|
||||
#define GET_WIDTH(val) ((val >> 8) & 0xf)
|
||||
|
||||
#define KDIV(val) DIV_RSMASK(val, 16, 0xffff)
|
||||
#define MDIV(val) DIV_RSMASK(val, 6, 0x3ff)
|
||||
#define PDIV(val) DIV_RSMASK(val, 0, 0x3f)
|
||||
#define SDIV(val) DIV_RSMASK(val, 0, 0x7)
|
||||
#define KDIV(val) ((s16)FIELD_GET(GENMASK(31, 16), val))
|
||||
#define MDIV(val) FIELD_GET(GENMASK(15, 6), val)
|
||||
#define PDIV(val) FIELD_GET(GENMASK(5, 0), val)
|
||||
#define SDIV(val) FIELD_GET(GENMASK(2, 0), val)
|
||||
|
||||
#define CLK_ON_R(reg) (reg)
|
||||
#define CLK_MON_R(reg) (0x180 + (reg))
|
||||
@ -192,7 +192,9 @@ static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
|
||||
u32 off = GET_REG_OFFSET(hwdata->conf);
|
||||
u32 shift = GET_SHIFT(hwdata->conf);
|
||||
const u32 clk_src_266 = 2;
|
||||
u32 bitmask;
|
||||
u32 msk, val, bitmask;
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* As per the HW manual, we should not directly switch from 533 MHz to
|
||||
@ -206,26 +208,30 @@ static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
|
||||
* the index to value mapping is done by adding 1 to the index.
|
||||
*/
|
||||
bitmask = (GENMASK(GET_WIDTH(hwdata->conf) - 1, 0) << shift) << 16;
|
||||
msk = off ? CPG_CLKSTATUS_SELSDHI1_STS : CPG_CLKSTATUS_SELSDHI0_STS;
|
||||
spin_lock_irqsave(&priv->rmw_lock, flags);
|
||||
if (index != clk_src_266) {
|
||||
u32 msk, val;
|
||||
int ret;
|
||||
|
||||
writel(bitmask | ((clk_src_266 + 1) << shift), priv->base + off);
|
||||
|
||||
msk = off ? CPG_CLKSTATUS_SELSDHI1_STS : CPG_CLKSTATUS_SELSDHI0_STS;
|
||||
|
||||
ret = readl_poll_timeout(priv->base + CPG_CLKSTATUS, val,
|
||||
!(val & msk), 100,
|
||||
CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US);
|
||||
if (ret) {
|
||||
dev_err(priv->dev, "failed to switch clk source\n");
|
||||
return ret;
|
||||
}
|
||||
ret = readl_poll_timeout_atomic(priv->base + CPG_CLKSTATUS, val,
|
||||
!(val & msk), 10,
|
||||
CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US);
|
||||
if (ret)
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
writel(bitmask | ((index + 1) << shift), priv->base + off);
|
||||
|
||||
return 0;
|
||||
ret = readl_poll_timeout_atomic(priv->base + CPG_CLKSTATUS, val,
|
||||
!(val & msk), 10,
|
||||
CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US);
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&priv->rmw_lock, flags);
|
||||
|
||||
if (ret)
|
||||
dev_err(priv->dev, "failed to switch clk source\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static u8 rzg2l_cpg_sd_clk_mux_get_parent(struct clk_hw *hw)
|
||||
@ -236,14 +242,8 @@ static u8 rzg2l_cpg_sd_clk_mux_get_parent(struct clk_hw *hw)
|
||||
|
||||
val >>= GET_SHIFT(hwdata->conf);
|
||||
val &= GENMASK(GET_WIDTH(hwdata->conf) - 1, 0);
|
||||
if (val) {
|
||||
val--;
|
||||
} else {
|
||||
/* Prohibited clk source, change it to 533 MHz(reset value) */
|
||||
rzg2l_cpg_sd_clk_mux_set_parent(hw, 0);
|
||||
}
|
||||
|
||||
return val;
|
||||
return val ? val - 1 : 0;
|
||||
}
|
||||
|
||||
static const struct clk_ops rzg2l_cpg_sd_clk_mux_ops = {
|
||||
@ -699,18 +699,18 @@ static unsigned long rzg2l_cpg_pll_clk_recalc_rate(struct clk_hw *hw,
|
||||
struct pll_clk *pll_clk = to_pll(hw);
|
||||
struct rzg2l_cpg_priv *priv = pll_clk->priv;
|
||||
unsigned int val1, val2;
|
||||
unsigned int mult = 1;
|
||||
unsigned int div = 1;
|
||||
u64 rate;
|
||||
|
||||
if (pll_clk->type != CLK_TYPE_SAM_PLL)
|
||||
return parent_rate;
|
||||
|
||||
val1 = readl(priv->base + GET_REG_SAMPLL_CLK1(pll_clk->conf));
|
||||
val2 = readl(priv->base + GET_REG_SAMPLL_CLK2(pll_clk->conf));
|
||||
mult = MDIV(val1) + KDIV(val1) / 65536;
|
||||
div = PDIV(val1) << SDIV(val2);
|
||||
|
||||
return DIV_ROUND_CLOSEST_ULL((u64)parent_rate * mult, div);
|
||||
rate = mul_u64_u32_shr(parent_rate, (MDIV(val1) << 16) + KDIV(val1),
|
||||
16 + SDIV(val2));
|
||||
|
||||
return DIV_ROUND_CLOSEST_ULL(rate, PDIV(val1));
|
||||
}
|
||||
|
||||
static const struct clk_ops rzg2l_cpg_pll_ops = {
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
#define CPG_CLKSTATUS_SELSDHI0_STS BIT(28)
|
||||
#define CPG_CLKSTATUS_SELSDHI1_STS BIT(29)
|
||||
|
||||
#define CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US 20000
|
||||
#define CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US 200
|
||||
|
||||
/* n = 0/1/2 for PLL1/4/6 */
|
||||
#define CPG_SAMPLL_CLK1(n) (0x04 + (16 * n))
|
||||
|
||||
@ -160,7 +160,7 @@ static void __init omap_clk_register_apll(void *user,
|
||||
ad->clk_bypass = __clk_get_hw(clk);
|
||||
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
if (!IS_ERR(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
kfree(init->parent_names);
|
||||
@ -400,7 +400,7 @@ static void __init of_omap2_apll_setup(struct device_node *node)
|
||||
goto cleanup;
|
||||
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
if (!IS_ERR(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
kfree(init);
|
||||
|
||||
@ -197,7 +197,7 @@ static void __init of_dra7_atl_clock_setup(struct device_node *node)
|
||||
|
||||
init.parent_names = parent_names;
|
||||
|
||||
clk = ti_clk_register(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register(node, &clk_hw->hw, name);
|
||||
|
||||
if (!IS_ERR(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
|
||||
@ -475,7 +475,7 @@ void __init ti_clk_add_aliases(void)
|
||||
clkspec.np = np;
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
|
||||
ti_clk_add_alias(NULL, clk, ti_dt_clk_name(np));
|
||||
ti_clk_add_alias(clk, ti_dt_clk_name(np));
|
||||
}
|
||||
}
|
||||
|
||||
@ -528,7 +528,6 @@ void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
|
||||
|
||||
/**
|
||||
* ti_clk_add_alias - add a clock alias for a TI clock
|
||||
* @dev: device alias for this clock
|
||||
* @clk: clock handle to create alias for
|
||||
* @con: connection ID for this clock
|
||||
*
|
||||
@ -536,7 +535,7 @@ void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
|
||||
* and assigns the data to it. Returns 0 if successful, negative error
|
||||
* value otherwise.
|
||||
*/
|
||||
int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
|
||||
int ti_clk_add_alias(struct clk *clk, const char *con)
|
||||
{
|
||||
struct clk_lookup *cl;
|
||||
|
||||
@ -550,8 +549,6 @@ int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
|
||||
if (!cl)
|
||||
return -ENOMEM;
|
||||
|
||||
if (dev)
|
||||
cl->dev_id = dev_name(dev);
|
||||
cl->con_id = con;
|
||||
cl->clk = clk;
|
||||
|
||||
@ -561,8 +558,8 @@ int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
|
||||
}
|
||||
|
||||
/**
|
||||
* ti_clk_register - register a TI clock to the common clock framework
|
||||
* @dev: device for this clock
|
||||
* of_ti_clk_register - register a TI clock to the common clock framework
|
||||
* @node: device node for this clock
|
||||
* @hw: hardware clock handle
|
||||
* @con: connection ID for this clock
|
||||
*
|
||||
@ -570,17 +567,18 @@ int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
|
||||
* alias for it. Returns a handle to the registered clock if successful,
|
||||
* ERR_PTR value in failure.
|
||||
*/
|
||||
struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
|
||||
const char *con)
|
||||
struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
|
||||
const char *con)
|
||||
{
|
||||
struct clk *clk;
|
||||
int ret;
|
||||
|
||||
clk = clk_register(dev, hw);
|
||||
if (IS_ERR(clk))
|
||||
return clk;
|
||||
ret = of_clk_hw_register(node, hw);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
ret = ti_clk_add_alias(dev, clk, con);
|
||||
clk = hw->clk;
|
||||
ret = ti_clk_add_alias(clk, con);
|
||||
if (ret) {
|
||||
clk_unregister(clk);
|
||||
return ERR_PTR(ret);
|
||||
@ -590,8 +588,8 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
|
||||
}
|
||||
|
||||
/**
|
||||
* ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
|
||||
* @dev: device for this clock
|
||||
* of_ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
|
||||
* @node: device node for this clock
|
||||
* @hw: hardware clock handle
|
||||
* @con: connection ID for this clock
|
||||
*
|
||||
@ -600,13 +598,13 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
|
||||
* Returns a handle to the registered clock if successful, ERR_PTR value
|
||||
* in failure.
|
||||
*/
|
||||
struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw,
|
||||
const char *con)
|
||||
struct clk *of_ti_clk_register_omap_hw(struct device_node *node,
|
||||
struct clk_hw *hw, const char *con)
|
||||
{
|
||||
struct clk *clk;
|
||||
struct clk_hw_omap *oclk;
|
||||
|
||||
clk = ti_clk_register(dev, hw, con);
|
||||
clk = of_ti_clk_register(node, hw, con);
|
||||
if (IS_ERR(clk))
|
||||
return clk;
|
||||
|
||||
|
||||
@ -308,7 +308,7 @@ _ti_clkctrl_clk_register(struct omap_clkctrl_provider *provider,
|
||||
init.ops = ops;
|
||||
init.flags = 0;
|
||||
|
||||
clk = ti_clk_register(NULL, clk_hw, init.name);
|
||||
clk = of_ti_clk_register(node, clk_hw, init.name);
|
||||
if (IS_ERR_OR_NULL(clk)) {
|
||||
ret = -EINVAL;
|
||||
goto cleanup;
|
||||
@ -689,7 +689,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
|
||||
init.ops = &omap4_clkctrl_clk_ops;
|
||||
hw->hw.init = &init;
|
||||
|
||||
clk = ti_clk_register_omap_hw(NULL, &hw->hw, init.name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &hw->hw, init.name);
|
||||
if (IS_ERR_OR_NULL(clk))
|
||||
goto cleanup;
|
||||
|
||||
|
||||
@ -199,12 +199,12 @@ extern const struct omap_clkctrl_data dm816_clkctrl_data[];
|
||||
|
||||
typedef void (*ti_of_clk_init_cb_t)(void *, struct device_node *);
|
||||
|
||||
struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
|
||||
const char *con);
|
||||
struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw,
|
||||
const char *con);
|
||||
struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
|
||||
const char *con);
|
||||
struct clk *of_ti_clk_register_omap_hw(struct device_node *node,
|
||||
struct clk_hw *hw, const char *con);
|
||||
const char *ti_dt_clk_name(struct device_node *np);
|
||||
int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con);
|
||||
int ti_clk_add_alias(struct clk *clk, const char *con);
|
||||
void ti_clk_add_aliases(void);
|
||||
|
||||
void ti_clk_latch(struct clk_omap_reg *reg, s8 shift);
|
||||
|
||||
@ -176,7 +176,7 @@ static void __init _register_composite(void *user,
|
||||
&ti_composite_gate_ops, 0);
|
||||
|
||||
if (!IS_ERR(clk)) {
|
||||
ret = ti_clk_add_alias(NULL, clk, name);
|
||||
ret = ti_clk_add_alias(clk, name);
|
||||
if (ret) {
|
||||
clk_unregister(clk);
|
||||
goto cleanup;
|
||||
|
||||
@ -309,7 +309,6 @@ static struct clk *_register_divider(struct device_node *node,
|
||||
u32 flags,
|
||||
struct clk_omap_divider *div)
|
||||
{
|
||||
struct clk *clk;
|
||||
struct clk_init_data init;
|
||||
const char *parent_name;
|
||||
const char *name;
|
||||
@ -326,12 +325,7 @@ static struct clk *_register_divider(struct device_node *node,
|
||||
div->hw.init = &init;
|
||||
|
||||
/* register the clock */
|
||||
clk = ti_clk_register(NULL, &div->hw, name);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
kfree(div);
|
||||
|
||||
return clk;
|
||||
return of_ti_clk_register(node, &div->hw, name);
|
||||
}
|
||||
|
||||
int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
|
||||
|
||||
@ -187,7 +187,7 @@ static void __init _register_dpll(void *user,
|
||||
|
||||
/* register the clock */
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
|
||||
if (!IS_ERR(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
@ -259,7 +259,7 @@ static void _register_dpll_x2(struct device_node *node,
|
||||
#endif
|
||||
|
||||
/* register the clock */
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
kfree(clk_hw);
|
||||
|
||||
@ -54,7 +54,7 @@ static void __init of_ti_fixed_factor_clk_setup(struct device_node *node)
|
||||
if (!IS_ERR(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
of_ti_clk_autoidle_setup(node);
|
||||
ti_clk_add_alias(NULL, clk, clk_name);
|
||||
ti_clk_add_alias(clk, clk_name);
|
||||
}
|
||||
}
|
||||
CLK_OF_DECLARE(ti_fixed_factor_clk, "ti,fixed-factor-clock",
|
||||
|
||||
@ -85,7 +85,7 @@ static int omap36xx_gate_clk_enable_with_hsdiv_restore(struct clk_hw *hw)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct clk *_register_gate(struct device *dev, const char *name,
|
||||
static struct clk *_register_gate(struct device_node *node, const char *name,
|
||||
const char *parent_name, unsigned long flags,
|
||||
struct clk_omap_reg *reg, u8 bit_idx,
|
||||
u8 clk_gate_flags, const struct clk_ops *ops,
|
||||
@ -115,7 +115,7 @@ static struct clk *_register_gate(struct device *dev, const char *name,
|
||||
|
||||
init.flags = flags;
|
||||
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
kfree(clk_hw);
|
||||
@ -158,7 +158,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node,
|
||||
clk_gate_flags |= INVERT_ENABLE;
|
||||
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = _register_gate(NULL, name, parent_name, flags, ®,
|
||||
clk = _register_gate(node, name, parent_name, flags, ®,
|
||||
enable_bit, clk_gate_flags, ops, hw_ops);
|
||||
|
||||
if (!IS_ERR(clk))
|
||||
|
||||
@ -24,7 +24,8 @@ static const struct clk_ops ti_interface_clk_ops = {
|
||||
.is_enabled = &omap2_dflt_clk_is_enabled,
|
||||
};
|
||||
|
||||
static struct clk *_register_interface(struct device *dev, const char *name,
|
||||
static struct clk *_register_interface(struct device_node *node,
|
||||
const char *name,
|
||||
const char *parent_name,
|
||||
struct clk_omap_reg *reg, u8 bit_idx,
|
||||
const struct clk_hw_omap_ops *ops)
|
||||
@ -49,7 +50,7 @@ static struct clk *_register_interface(struct device *dev, const char *name,
|
||||
init.num_parents = 1;
|
||||
init.parent_names = &parent_name;
|
||||
|
||||
clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
|
||||
clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
kfree(clk_hw);
|
||||
@ -80,7 +81,7 @@ static void __init _of_ti_interface_clk_setup(struct device_node *node,
|
||||
}
|
||||
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = _register_interface(NULL, name, parent_name, ®,
|
||||
clk = _register_interface(node, name, parent_name, ®,
|
||||
enable_bit, ops);
|
||||
|
||||
if (!IS_ERR(clk))
|
||||
|
||||
@ -118,7 +118,7 @@ const struct clk_ops ti_clk_mux_ops = {
|
||||
.restore_context = clk_mux_restore_context,
|
||||
};
|
||||
|
||||
static struct clk *_register_mux(struct device *dev, const char *name,
|
||||
static struct clk *_register_mux(struct device_node *node, const char *name,
|
||||
const char * const *parent_names,
|
||||
u8 num_parents, unsigned long flags,
|
||||
struct clk_omap_reg *reg, u8 shift, u32 mask,
|
||||
@ -148,7 +148,7 @@ static struct clk *_register_mux(struct device *dev, const char *name,
|
||||
mux->table = table;
|
||||
mux->hw.init = &init;
|
||||
|
||||
clk = ti_clk_register(dev, &mux->hw, name);
|
||||
clk = of_ti_clk_register(node, &mux->hw, name);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
kfree(mux);
|
||||
@ -207,7 +207,7 @@ static void of_mux_clk_setup(struct device_node *node)
|
||||
mask = (1 << fls(mask)) - 1;
|
||||
|
||||
name = ti_dt_clk_name(node);
|
||||
clk = _register_mux(NULL, name, parent_names, num_parents,
|
||||
clk = _register_mux(node, name, parent_names, num_parents,
|
||||
flags, ®, shift, mask, latch, clk_mux_flags,
|
||||
NULL);
|
||||
|
||||
|
||||
@ -817,8 +817,9 @@ static u64 __arch_timer_check_delta(void)
|
||||
* Note that TVAL is signed, thus has only 31 of its
|
||||
* 32 bits to express magnitude.
|
||||
*/
|
||||
MIDR_ALL_VERSIONS(MIDR_CPU_MODEL(ARM_CPU_IMP_APM,
|
||||
APM_CPU_PART_POTENZA)),
|
||||
MIDR_REV_RANGE(MIDR_CPU_MODEL(ARM_CPU_IMP_APM,
|
||||
APM_CPU_PART_XGENE),
|
||||
APM_CPU_VAR_POTENZA, 0x0, 0xf),
|
||||
{},
|
||||
};
|
||||
|
||||
|
||||
@ -141,6 +141,8 @@ struct dmtimer {
|
||||
struct platform_device *pdev;
|
||||
struct list_head node;
|
||||
struct notifier_block nb;
|
||||
struct notifier_block fclk_nb;
|
||||
unsigned long fclk_rate;
|
||||
};
|
||||
|
||||
static u32 omap_reserved_systimers;
|
||||
@ -254,8 +256,7 @@ static inline void __omap_dm_timer_enable_posted(struct dmtimer *timer)
|
||||
timer->posted = OMAP_TIMER_POSTED;
|
||||
}
|
||||
|
||||
static inline void __omap_dm_timer_stop(struct dmtimer *timer,
|
||||
unsigned long rate)
|
||||
static inline void __omap_dm_timer_stop(struct dmtimer *timer)
|
||||
{
|
||||
u32 l;
|
||||
|
||||
@ -270,7 +271,7 @@ static inline void __omap_dm_timer_stop(struct dmtimer *timer,
|
||||
* Wait for functional clock period x 3.5 to make sure that
|
||||
* timer is stopped
|
||||
*/
|
||||
udelay(3500000 / rate + 1);
|
||||
udelay(3500000 / timer->fclk_rate + 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -349,6 +350,21 @@ static int omap_timer_context_notifier(struct notifier_block *nb,
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static int omap_timer_fclk_notifier(struct notifier_block *nb,
|
||||
unsigned long event, void *data)
|
||||
{
|
||||
struct clk_notifier_data *clk_data = data;
|
||||
struct dmtimer *timer = container_of(nb, struct dmtimer, fclk_nb);
|
||||
|
||||
switch (event) {
|
||||
case POST_RATE_CHANGE:
|
||||
timer->fclk_rate = clk_data->new_rate;
|
||||
return NOTIFY_OK;
|
||||
default:
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
}
|
||||
|
||||
static int omap_dm_timer_reset(struct dmtimer *timer)
|
||||
{
|
||||
u32 l, timeout = 100000;
|
||||
@ -742,7 +758,6 @@ static int omap_dm_timer_stop(struct omap_dm_timer *cookie)
|
||||
{
|
||||
struct dmtimer *timer;
|
||||
struct device *dev;
|
||||
unsigned long rate = 0;
|
||||
|
||||
timer = to_dmtimer(cookie);
|
||||
if (unlikely(!timer))
|
||||
@ -750,10 +765,7 @@ static int omap_dm_timer_stop(struct omap_dm_timer *cookie)
|
||||
|
||||
dev = &timer->pdev->dev;
|
||||
|
||||
if (!timer->omap1)
|
||||
rate = clk_get_rate(timer->fclk);
|
||||
|
||||
__omap_dm_timer_stop(timer, rate);
|
||||
__omap_dm_timer_stop(timer);
|
||||
|
||||
pm_runtime_put_sync(dev);
|
||||
|
||||
@ -1112,6 +1124,14 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
|
||||
timer->fclk = devm_clk_get(dev, "fck");
|
||||
if (IS_ERR(timer->fclk))
|
||||
return PTR_ERR(timer->fclk);
|
||||
|
||||
timer->fclk_nb.notifier_call = omap_timer_fclk_notifier;
|
||||
ret = devm_clk_notifier_register(dev, timer->fclk,
|
||||
&timer->fclk_nb);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
timer->fclk_rate = clk_get_rate(timer->fclk);
|
||||
} else {
|
||||
timer->fclk = ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
@ -566,7 +566,8 @@ static int chachapoly_setkey(struct crypto_aead *aead, const u8 *key,
|
||||
if (keylen != CHACHA_KEY_SIZE + saltlen)
|
||||
return -EINVAL;
|
||||
|
||||
ctx->cdata.key_virt = key;
|
||||
memcpy(ctx->key, key, keylen);
|
||||
ctx->cdata.key_virt = ctx->key;
|
||||
ctx->cdata.keylen = keylen - saltlen;
|
||||
|
||||
return chachapoly_set_sh_desc(aead);
|
||||
|
||||
@ -639,7 +639,8 @@ static int chachapoly_setkey(struct crypto_aead *aead, const u8 *key,
|
||||
if (keylen != CHACHA_KEY_SIZE + saltlen)
|
||||
return -EINVAL;
|
||||
|
||||
ctx->cdata.key_virt = key;
|
||||
memcpy(ctx->key, key, keylen);
|
||||
ctx->cdata.key_virt = ctx->key;
|
||||
ctx->cdata.keylen = keylen - saltlen;
|
||||
|
||||
return chachapoly_set_sh_desc(aead);
|
||||
|
||||
@ -443,10 +443,10 @@ static int __sev_init_ex_locked(int *error)
|
||||
|
||||
static int __sev_platform_init_locked(int *error)
|
||||
{
|
||||
int rc = 0, psp_ret = SEV_RET_NO_FW_CALL;
|
||||
struct psp_device *psp = psp_master;
|
||||
struct sev_device *sev;
|
||||
int rc = 0, psp_ret = -1;
|
||||
int (*init_function)(int *error);
|
||||
struct sev_device *sev;
|
||||
|
||||
if (!psp || !psp->sev_data)
|
||||
return -ENODEV;
|
||||
@ -474,9 +474,11 @@ static int __sev_platform_init_locked(int *error)
|
||||
* initialization function should succeed by replacing the state
|
||||
* with a reset state.
|
||||
*/
|
||||
dev_err(sev->dev, "SEV: retrying INIT command because of SECURE_DATA_INVALID error. Retrying once to reset PSP SEV state.");
|
||||
dev_err(sev->dev,
|
||||
"SEV: retrying INIT command because of SECURE_DATA_INVALID error. Retrying once to reset PSP SEV state.");
|
||||
rc = init_function(&psp_ret);
|
||||
}
|
||||
|
||||
if (error)
|
||||
*error = psp_ret;
|
||||
|
||||
|
||||
@ -3,6 +3,6 @@ obj-$(CONFIG_CRYPTO_DEV_HISI_HPRE) += hpre/
|
||||
obj-$(CONFIG_CRYPTO_DEV_HISI_SEC) += sec/
|
||||
obj-$(CONFIG_CRYPTO_DEV_HISI_SEC2) += sec2/
|
||||
obj-$(CONFIG_CRYPTO_DEV_HISI_QM) += hisi_qm.o
|
||||
hisi_qm-objs = qm.o sgl.o
|
||||
hisi_qm-objs = qm.o sgl.o debugfs.o
|
||||
obj-$(CONFIG_CRYPTO_DEV_HISI_ZIP) += zip/
|
||||
obj-$(CONFIG_CRYPTO_DEV_HISI_TRNG) += trng/
|
||||
|
||||
1097
drivers/crypto/hisilicon/debugfs.c
Normal file
1097
drivers/crypto/hisilicon/debugfs.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -431,8 +431,11 @@ static u32 uacce_mode = UACCE_MODE_NOUACCE;
|
||||
module_param_cb(uacce_mode, &hpre_uacce_mode_ops, &uacce_mode, 0444);
|
||||
MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
|
||||
|
||||
static bool pf_q_num_flag;
|
||||
static int pf_q_num_set(const char *val, const struct kernel_param *kp)
|
||||
{
|
||||
pf_q_num_flag = true;
|
||||
|
||||
return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_HPRE_PF);
|
||||
}
|
||||
|
||||
@ -1031,7 +1034,7 @@ static int hpre_cluster_debugfs_init(struct hisi_qm *qm)
|
||||
|
||||
for (i = 0; i < clusters_num; i++) {
|
||||
ret = snprintf(buf, HPRE_DBGFS_VAL_MAX_LEN, "cluster%d", i);
|
||||
if (ret < 0)
|
||||
if (ret >= HPRE_DBGFS_VAL_MAX_LEN)
|
||||
return -EINVAL;
|
||||
tmp_d = debugfs_create_dir(buf, qm->debug.debug_root);
|
||||
|
||||
@ -1101,8 +1104,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm)
|
||||
|
||||
qm->debug.sqe_mask_offset = HPRE_SQE_MASK_OFFSET;
|
||||
qm->debug.sqe_mask_len = HPRE_SQE_MASK_LEN;
|
||||
ret = hisi_qm_diff_regs_init(qm, hpre_diff_regs,
|
||||
ARRAY_SIZE(hpre_diff_regs));
|
||||
ret = hisi_qm_regs_debugfs_init(qm, hpre_diff_regs, ARRAY_SIZE(hpre_diff_regs));
|
||||
if (ret) {
|
||||
dev_warn(dev, "Failed to init HPRE diff regs!\n");
|
||||
goto debugfs_remove;
|
||||
@ -1121,7 +1123,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm)
|
||||
return 0;
|
||||
|
||||
failed_to_create:
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));
|
||||
debugfs_remove:
|
||||
debugfs_remove_recursive(qm->debug.debug_root);
|
||||
return ret;
|
||||
@ -1129,7 +1131,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm)
|
||||
|
||||
static void hpre_debugfs_exit(struct hisi_qm *qm)
|
||||
{
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hpre_diff_regs));
|
||||
|
||||
debugfs_remove_recursive(qm->debug.debug_root);
|
||||
}
|
||||
@ -1156,6 +1158,8 @@ static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
|
||||
qm->qp_num = pf_q_num;
|
||||
qm->debug.curr_qm_qp_num = pf_q_num;
|
||||
qm->qm_list = &hpre_devices;
|
||||
if (pf_q_num_flag)
|
||||
set_bit(QM_MODULE_PARAM, &qm->misc_ctl);
|
||||
}
|
||||
|
||||
ret = hisi_qm_init(qm);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
86
drivers/crypto/hisilicon/qm_common.h
Normal file
86
drivers/crypto/hisilicon/qm_common.h
Normal file
@ -0,0 +1,86 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* Copyright (c) 2022 HiSilicon Limited. */
|
||||
#ifndef QM_COMMON_H
|
||||
#define QM_COMMON_H
|
||||
|
||||
#define QM_DBG_READ_LEN 256
|
||||
|
||||
struct qm_cqe {
|
||||
__le32 rsvd0;
|
||||
__le16 cmd_id;
|
||||
__le16 rsvd1;
|
||||
__le16 sq_head;
|
||||
__le16 sq_num;
|
||||
__le16 rsvd2;
|
||||
__le16 w7;
|
||||
};
|
||||
|
||||
struct qm_eqe {
|
||||
__le32 dw0;
|
||||
};
|
||||
|
||||
struct qm_aeqe {
|
||||
__le32 dw0;
|
||||
};
|
||||
|
||||
struct qm_sqc {
|
||||
__le16 head;
|
||||
__le16 tail;
|
||||
__le32 base_l;
|
||||
__le32 base_h;
|
||||
__le32 dw3;
|
||||
__le16 w8;
|
||||
__le16 rsvd0;
|
||||
__le16 pasid;
|
||||
__le16 w11;
|
||||
__le16 cq_num;
|
||||
__le16 w13;
|
||||
__le32 rsvd1;
|
||||
};
|
||||
|
||||
struct qm_cqc {
|
||||
__le16 head;
|
||||
__le16 tail;
|
||||
__le32 base_l;
|
||||
__le32 base_h;
|
||||
__le32 dw3;
|
||||
__le16 w8;
|
||||
__le16 rsvd0;
|
||||
__le16 pasid;
|
||||
__le16 w11;
|
||||
__le32 dw6;
|
||||
__le32 rsvd1;
|
||||
};
|
||||
|
||||
struct qm_eqc {
|
||||
__le16 head;
|
||||
__le16 tail;
|
||||
__le32 base_l;
|
||||
__le32 base_h;
|
||||
__le32 dw3;
|
||||
__le32 rsvd[2];
|
||||
__le32 dw6;
|
||||
};
|
||||
|
||||
struct qm_aeqc {
|
||||
__le16 head;
|
||||
__le16 tail;
|
||||
__le32 base_l;
|
||||
__le32 base_h;
|
||||
__le32 dw3;
|
||||
__le32 rsvd[2];
|
||||
__le32 dw6;
|
||||
};
|
||||
|
||||
static const char * const qm_s[] = {
|
||||
"init", "start", "close", "stop",
|
||||
};
|
||||
|
||||
void *hisi_qm_ctx_alloc(struct hisi_qm *qm, size_t ctx_size,
|
||||
dma_addr_t *dma_addr);
|
||||
void hisi_qm_ctx_free(struct hisi_qm *qm, size_t ctx_size,
|
||||
const void *ctx_addr, dma_addr_t *dma_addr);
|
||||
void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm);
|
||||
void hisi_qm_set_algqos_init(struct hisi_qm *qm);
|
||||
|
||||
#endif
|
||||
@ -312,8 +312,11 @@ static int sec_diff_regs_show(struct seq_file *s, void *unused)
|
||||
}
|
||||
DEFINE_SHOW_ATTRIBUTE(sec_diff_regs);
|
||||
|
||||
static bool pf_q_num_flag;
|
||||
static int sec_pf_q_num_set(const char *val, const struct kernel_param *kp)
|
||||
{
|
||||
pf_q_num_flag = true;
|
||||
|
||||
return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_SEC_PF);
|
||||
}
|
||||
|
||||
@ -899,8 +902,7 @@ static int sec_debugfs_init(struct hisi_qm *qm)
|
||||
qm->debug.sqe_mask_offset = SEC_SQE_MASK_OFFSET;
|
||||
qm->debug.sqe_mask_len = SEC_SQE_MASK_LEN;
|
||||
|
||||
ret = hisi_qm_diff_regs_init(qm, sec_diff_regs,
|
||||
ARRAY_SIZE(sec_diff_regs));
|
||||
ret = hisi_qm_regs_debugfs_init(qm, sec_diff_regs, ARRAY_SIZE(sec_diff_regs));
|
||||
if (ret) {
|
||||
dev_warn(dev, "Failed to init SEC diff regs!\n");
|
||||
goto debugfs_remove;
|
||||
@ -915,7 +917,7 @@ static int sec_debugfs_init(struct hisi_qm *qm)
|
||||
return 0;
|
||||
|
||||
failed_to_create:
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(sec_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));
|
||||
debugfs_remove:
|
||||
debugfs_remove_recursive(sec_debugfs_root);
|
||||
return ret;
|
||||
@ -923,7 +925,7 @@ static int sec_debugfs_init(struct hisi_qm *qm)
|
||||
|
||||
static void sec_debugfs_exit(struct hisi_qm *qm)
|
||||
{
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(sec_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(sec_diff_regs));
|
||||
|
||||
debugfs_remove_recursive(qm->debug.debug_root);
|
||||
}
|
||||
@ -1123,6 +1125,8 @@ static int sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
|
||||
qm->qp_num = pf_q_num;
|
||||
qm->debug.curr_qm_qp_num = pf_q_num;
|
||||
qm->qm_list = &sec_devices;
|
||||
if (pf_q_num_flag)
|
||||
set_bit(QM_MODULE_PARAM, &qm->misc_ctl);
|
||||
} else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) {
|
||||
/*
|
||||
* have no way to get qm configure in VM in v1 hardware,
|
||||
|
||||
@ -365,8 +365,11 @@ static u32 uacce_mode = UACCE_MODE_NOUACCE;
|
||||
module_param_cb(uacce_mode, &zip_uacce_mode_ops, &uacce_mode, 0444);
|
||||
MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
|
||||
|
||||
static bool pf_q_num_flag;
|
||||
static int pf_q_num_set(const char *val, const struct kernel_param *kp)
|
||||
{
|
||||
pf_q_num_flag = true;
|
||||
|
||||
return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_ZIP_PF);
|
||||
}
|
||||
|
||||
@ -849,8 +852,7 @@ static int hisi_zip_debugfs_init(struct hisi_qm *qm)
|
||||
qm->debug.sqe_mask_offset = HZIP_SQE_MASK_OFFSET;
|
||||
qm->debug.sqe_mask_len = HZIP_SQE_MASK_LEN;
|
||||
qm->debug.debug_root = dev_d;
|
||||
ret = hisi_qm_diff_regs_init(qm, hzip_diff_regs,
|
||||
ARRAY_SIZE(hzip_diff_regs));
|
||||
ret = hisi_qm_regs_debugfs_init(qm, hzip_diff_regs, ARRAY_SIZE(hzip_diff_regs));
|
||||
if (ret) {
|
||||
dev_warn(dev, "Failed to init ZIP diff regs!\n");
|
||||
goto debugfs_remove;
|
||||
@ -869,7 +871,7 @@ static int hisi_zip_debugfs_init(struct hisi_qm *qm)
|
||||
return 0;
|
||||
|
||||
failed_to_create:
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));
|
||||
debugfs_remove:
|
||||
debugfs_remove_recursive(hzip_debugfs_root);
|
||||
return ret;
|
||||
@ -895,7 +897,7 @@ static void hisi_zip_debug_regs_clear(struct hisi_qm *qm)
|
||||
|
||||
static void hisi_zip_debugfs_exit(struct hisi_qm *qm)
|
||||
{
|
||||
hisi_qm_diff_regs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));
|
||||
hisi_qm_regs_debugfs_uninit(qm, ARRAY_SIZE(hzip_diff_regs));
|
||||
|
||||
debugfs_remove_recursive(qm->debug.debug_root);
|
||||
|
||||
@ -1141,6 +1143,8 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
|
||||
qm->qp_num = pf_q_num;
|
||||
qm->debug.curr_qm_qp_num = pf_q_num;
|
||||
qm->qm_list = &zip_devices;
|
||||
if (pf_q_num_flag)
|
||||
set_bit(QM_MODULE_PARAM, &qm->misc_ctl);
|
||||
} else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) {
|
||||
/*
|
||||
* have no way to get qm configure in VM in v1 hardware,
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user