Merge 6.1.56 into android14-6.1-lts
Changes in 6.1.56 NFS: Fix error handling for O_DIRECT write scheduling NFS: Fix O_DIRECT locking issues NFS: More O_DIRECT accounting fixes for error paths NFS: Use the correct commit info in nfs_join_page_group() NFS: More fixes for nfs_direct_write_reschedule_io() NFS/pNFS: Report EINVAL errors from connect() to the server SUNRPC: Mark the cred for revalidation if the server rejects it NFSv4.1: use EXCHGID4_FLAG_USE_PNFS_DS for DS server NFSv4.1: fix pnfs MDS=DS session trunking media: v4l: Use correct dependency for camera sensor drivers media: via: Use correct dependency for camera sensor drivers netfs: Only call folio_start_fscache() one time for each folio dm: fix a race condition in retrieve_deps btrfs: improve error message after failure to add delayed dir index item btrfs: remove BUG() after failure to insert delayed dir index item ext4: replace the traditional ternary conditional operator with with max()/min() ext4: move setting of trimmed bit into ext4_try_to_trim_range() ext4: do not let fstrim block system suspend netfilter: nf_tables: don't skip expired elements during walk netfilter: nf_tables: GC transaction API to avoid race with control plane netfilter: nf_tables: adapt set backend to use GC transaction API netfilter: nft_set_hash: mark set element as dead when deleting from packet path netfilter: nf_tables: remove busy mark and gc batch API netfilter: nf_tables: don't fail inserts if duplicate has expired netfilter: nf_tables: fix GC transaction races with netns and netlink event exit path netfilter: nf_tables: GC transaction race with netns dismantle netfilter: nf_tables: GC transaction race with abort path netfilter: nf_tables: use correct lock to protect gc_list netfilter: nf_tables: defer gc run if previous batch is still pending netfilter: nft_set_rbtree: skip sync GC for new elements in this transaction netfilter: nft_set_rbtree: use read spinlock to avoid datapath contention netfilter: nft_set_pipapo: call nft_trans_gc_queue_sync() in catchall GC netfilter: nft_set_pipapo: stop GC iteration if GC transaction allocation fails netfilter: nft_set_hash: try later when GC hits EAGAIN on iteration netfilter: nf_tables: fix memleak when more than 255 elements expired ASoC: meson: spdifin: start hw on dai probe netfilter: nf_tables: disallow element removal on anonymous sets bpf: Avoid deadlock when using queue and stack maps from NMI ASoC: rt5640: Revert "Fix sleep in atomic context" ASoC: rt5640: Fix IRQ not being free-ed for HDA jack detect mode ALSA: hda/realtek: Splitting the UX3402 into two separate models netfilter: conntrack: fix extension size table selftests: tls: swap the TX and RX sockets in some tests net/core: Fix ETH_P_1588 flow dissector ASoC: hdaudio.c: Add missing check for devm_kstrdup ASoC: imx-audmix: Fix return error with devm_clk_get() octeon_ep: fix tx dma unmap len values in SG iavf: do not process adminq tasks when __IAVF_IN_REMOVE_TASK is set ASoC: SOF: core: Only call sof_ops_free() on remove if the probe was successful iavf: add iavf_schedule_aq_request() helper iavf: schedule a request immediately after add/delete vlan i40e: Fix VF VLAN offloading when port VLAN is configured netfilter, bpf: Adjust timeouts of non-confirmed CTs in bpf_ct_insert_entry() ionic: fix 16bit math issue when PAGE_SIZE >= 64KB igc: Fix infinite initialization loop with early XDP redirect ipv4: fix null-deref in ipv4_link_failure scsi: iscsi_tcp: restrict to TCP sockets powerpc/perf/hv-24x7: Update domain value check dccp: fix dccp_v4_err()/dccp_v6_err() again x86/mm, kexec, ima: Use memblock_free_late() from ima_free_kexec_buffer() net: hsr: Properly parse HSRv1 supervisor frames. platform/x86: intel_scu_ipc: Check status after timeout in busy_loop() platform/x86: intel_scu_ipc: Check status upon timeout in ipc_wait_for_interrupt() platform/x86: intel_scu_ipc: Don't override scu in intel_scu_ipc_dev_simple_command() platform/x86: intel_scu_ipc: Fail IPC send if still busy x86/srso: Fix srso_show_state() side effect x86/srso: Fix SBPB enablement for spec_rstack_overflow=off net: hns3: add cmdq check for vf periodic service task net: hns3: fix GRE checksum offload issue net: hns3: only enable unicast promisc when mac table full net: hns3: fix fail to delete tc flower rules during reset issue net: hns3: add 5ms delay before clear firmware reset irq source net: bridge: use DEV_STATS_INC() team: fix null-ptr-deref when team device type is changed net: rds: Fix possible NULL-pointer dereference netfilter: nf_tables: disable toggling dormant table state more than once netfilter: ipset: Fix race between IPSET_CMD_CREATE and IPSET_CMD_SWAP i915/pmu: Move execlist stats initialization to execlist specific setup locking/seqlock: Do the lockdep annotation before locking in do_write_seqcount_begin_nested() net: ena: Flush XDP packets on error. bnxt_en: Flush XDP for bnxt_poll_nitroa0()'s NAPI octeontx2-pf: Do xdp_do_flush() after redirects. igc: Expose tx-usecs coalesce setting to user proc: nommu: /proc/<pid>/maps: release mmap read lock proc: nommu: fix empty /proc/<pid>/maps cifs: Fix UAF in cifs_demultiplex_thread() gpio: tb10x: Fix an error handling path in tb10x_gpio_probe() i2c: mux: demux-pinctrl: check the return value of devm_kstrdup() i2c: mux: gpio: Add missing fwnode_handle_put() i2c: xiic: Correct return value check for xiic_reinit() ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys EA6500 V2 ARM: dts: samsung: exynos4210-i9100: Fix LCD screen's physical size ARM: dts: qcom: msm8974pro-castor: correct inverted X of touchscreen ARM: dts: qcom: msm8974pro-castor: correct touchscreen function names ARM: dts: qcom: msm8974pro-castor: correct touchscreen syna,nosleep-mode f2fs: optimize iteration over sparse directories f2fs: get out of a repeat loop when getting a locked data page s390/pkey: fix PKEY_TYPE_EP11_AES handling in PKEY_CLR2SECK2 IOCTL arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved wifi: ath11k: fix tx status reporting in encap offload mode wifi: ath11k: Cleanup mac80211 references on failure during tx_complete scsi: qla2xxx: Select qpair depending on which CPU post_cmd() gets called scsi: qla2xxx: Use raw_smp_processor_id() instead of smp_processor_id() drm/amdkfd: Flush TLB after unmapping for GFX v9.4.3 drm/amdkfd: Insert missing TLB flush on GFX10 and later btrfs: reset destination buffer when read_extent_buffer() gets invalid range vfio/mdev: Fix a null-ptr-deref bug for mdev_unregister_parent() MIPS: Alchemy: only build mmc support helpers if au1xmmc is enabled spi: spi-gxp: BUG: Correct spi write return value drm/bridge: ti-sn65dsi83: Do not generate HFP/HBP/HSA and EOT packet bus: ti-sysc: Use fsleep() instead of usleep_range() in sysc_reset() bus: ti-sysc: Fix missing AM35xx SoC matching firmware: arm_scmi: Harden perf domain info access firmware: arm_scmi: Fixup perf power-cost/microwatt support power: supply: mt6370: Fix missing error code in mt6370_chg_toggle_cfo() clk: sprd: Fix thm_parents incorrect configuration clk: tegra: fix error return case for recalc_rate ARM: dts: omap: correct indentation ARM: dts: ti: omap: Fix bandgap thermal cells addressing for omap3/4 ARM: dts: Unify pwm-omap-dmtimer node names ARM: dts: Unify pinctrl-single pin group nodes for omap4 ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot bus: ti-sysc: Fix SYSC_QUIRK_SWSUP_SIDLE_ACT handling for uart wake-up power: supply: ucs1002: fix error code in ucs1002_get_property() firmware: imx-dsp: Fix an error handling path in imx_dsp_setup_channels() xtensa: add default definition for XCHAL_HAVE_DIV32 xtensa: iss/network: make functions static xtensa: boot: don't add include-dirs xtensa: umulsidi3: fix conditional expression xtensa: boot/lib: fix function prototypes power: supply: rk817: Fix node refcount leak selftests/powerpc: Use CLEAN macro to fix make warning selftests/powerpc: Pass make context to children selftests/powerpc: Fix emit_tests to work with run_kselftest.sh soc: imx8m: Enable OCOTP clock for imx8mm before reading registers arm64: dts: imx: Add imx8mm-prt8mm.dtb to build firmware: arm_ffa: Don't set the memory region attributes for MEM_LEND gpio: pmic-eic-sprd: Add can_sleep flag for PMIC EIC chip i2c: npcm7xx: Fix callback completion ordering x86/reboot: VMCLEAR active VMCSes before emergency reboot ceph: drop messages from MDS when unmounting dma-debug: don't call __dma_entry_alloc_check_leak() under free_entries_lock bpf: Annotate bpf_long_memcpy with data_race spi: sun6i: reduce DMA RX transfer width to single byte spi: sun6i: fix race between DMA RX transfer completion and RX FIFO drain nvme-fc: Prevent null pointer dereference in nvme_fc_io_getuuid() parisc: sba: Fix compile warning wrt list of SBA devices parisc: iosapic.c: Fix sparse warnings parisc: drivers: Fix sparse warning parisc: irq: Make irq_stack_union static to avoid sparse warning scsi: qedf: Add synchronization between I/O completions and abort scsi: ufs: core: Move __ufshcd_send_uic_cmd() outside host_lock scsi: ufs: core: Poll HCS.UCRDY before issuing a UIC command selftests/ftrace: Correctly enable event in instance-event.tc ring-buffer: Avoid softlockup in ring_buffer_resize() btrfs: assert delayed node locked when removing delayed item selftests: fix dependency checker script ring-buffer: Do not attempt to read past "commit" net/smc: bugfix for smcr v2 server connect success statistic ata: sata_mv: Fix incorrect string length computation in mv_dump_mem() platform/mellanox: mlxbf-bootctl: add NET dependency into Kconfig platform/x86: asus-wmi: Support 2023 ROG X16 tablet mode thermal/of: add missing of_node_put() drm/amd/display: Don't check registers, if using AUX BL control drm/amdgpu/soc21: don't remap HDP registers for SR-IOV drm/amdgpu/nbio4.3: set proper rmmio_remap.reg_offset for SR-IOV drm/amdgpu: Handle null atom context in VBIOS info ioctl riscv: errata: fix T-Head dcache.cva encoding scsi: pm80xx: Use phy-specific SAS address when sending PHY_START command scsi: pm80xx: Avoid leaking tags when processing OPC_INB_SET_CONTROLLER_CONFIG command smb3: correct places where ENOTSUPP is used instead of preferred EOPNOTSUPP ata: libata-eh: do not clear ATA_PFLAG_EH_PENDING in ata_eh_reset() spi: nxp-fspi: reset the FLSHxCR1 registers spi: stm32: add a delay before SPI disable ASoC: fsl: imx-pcm-rpmsg: Add SNDRV_PCM_INFO_BATCH flag spi: intel-pci: Add support for Granite Rapids SPI serial flash bpf: Clarify error expectations from bpf_clone_redirect ALSA: hda: intel-sdw-acpi: Use u8 type for link index ASoC: cs42l42: Ensure a reset pulse meets minimum pulse width. ASoC: cs42l42: Don't rely on GPIOD_OUT_LOW to set RESET initially low firmware: cirrus: cs_dsp: Only log list of algorithms in debug build memblock tests: fix warning: "__ALIGN_KERNEL" redefined memblock tests: fix warning ‘struct seq_file’ declared inside parameter list ASoC: imx-rpmsg: Set ignore_pmdown_time for dai_link media: vb2: frame_vector.c: replace WARN_ONCE with a comment NFSv4.1: fix zero value filehandle in post open getattr ASoC: SOF: Intel: MTL: Reduce the DSP init timeout powerpc/watchpoints: Disable preemption in thread_change_pc() powerpc/watchpoint: Disable pagefaults when getting user instruction powerpc/watchpoints: Annotate atomic context in more places ncsi: Propagate carrier gain/loss events to the NCSI controller net: hsr: Add __packed to struct hsr_sup_tlv. tsnep: Fix NAPI scheduling tsnep: Fix NAPI polling with budget 0 LoongArch: Set all reserved memblocks on Node#0 at initialization fbdev/sh7760fb: Depend on FB=y perf build: Define YYNOMEM as YYNOABORT for bison < 3.81 nvme-pci: factor the iod mempool creation into a helper nvme-pci: factor out a nvme_pci_alloc_dev helper nvme-pci: do not set the NUMA node of device if it has none wifi: ath11k: Don't drop tx_status when peer cannot be found scsi: qla2xxx: Fix NULL pointer dereference in target mode nvme-pci: always return an ERR_PTR from nvme_pci_alloc_dev smack: Record transmuting in smk_transmuted smack: Retrieve transmuting information in smack_inode_getsecurity() iommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range x86/sgx: Resolves SECS reclaim vs. page fault for EAUG race x86/srso: Add SRSO mitigation for Hygon processors KVM: SVM: INTERCEPT_RDTSCP is never intercepted anyway KVM: SVM: Fix TSC_AUX virtualization setup KVM: x86/mmu: Open code leaf invalidation from mmu_notifier KVM: x86/mmu: Do not filter address spaces in for_each_tdp_mmu_root_yield_safe() mptcp: fix bogus receive window shrinkage with multiple subflows misc: rtsx: Fix some platforms can not boot and move the l1ss judgment to probe Revert "tty: n_gsm: fix UAF in gsm_cleanup_mux" serial: 8250_port: Check IRQ data before use nilfs2: fix potential use after free in nilfs_gccache_submit_read_data() netfilter: nf_tables: disallow rule removal from chain binding ALSA: hda: Disable power save for solving pop issue on Lenovo ThinkCentre M70q LoongArch: Define relocation types for ABI v2.10 LoongArch: numa: Fix high_memory calculation ata: libata-scsi: link ata port and scsi device ata: libata-scsi: ignore reserved bits for REPORT SUPPORTED OPERATION CODES io_uring/fs: remove sqe->rw_flags checking from LINKAT i2c: i801: unregister tco_pdev in i801_probe() error path ASoC: amd: yc: Fix non-functional mic on Lenovo 82QF and 82UG kernel/sched: Modify initial boot task idle setup sched/rt: Fix live lock between select_fallback_rq() and RT push netfilter: nf_tables: fix kdoc warnings after gc rework Revert "SUNRPC dont update timeout value on connection reset" timers: Tag (hr)timer softirq as hotplug safe drm/tests: Fix incorrect argument in drm_test_mm_insert_range arm64: defconfig: remove CONFIG_COMMON_CLK_NPCM8XX=y mm/damon/vaddr-test: fix memory leak in damon_do_test_apply_three_regions() mm/slab_common: fix slab_caches list corruption after kmem_cache_destroy() mm: memcontrol: fix GFP_NOFS recursion in memory.high enforcement ring-buffer: Update "shortest_full" in polling btrfs: properly report 0 avail for very full file systems media: uvcvideo: Fix OOB read bpf: Add override check to kprobe multi link attach bpf: Fix BTF_ID symbol generation collision bpf: Fix BTF_ID symbol generation collision in tools/ net: thunderbolt: Fix TCPv6 GSO checksum calculation fs/smb/client: Reset password pointer to NULL ata: libata-core: Fix ata_port_request_pm() locking ata: libata-core: Fix port and device removal ata: libata-core: Do not register PM operations for SAS ports ata: libata-sata: increase PMP SRST timeout to 10s drm/i915/gt: Fix reservation address in ggtt_reserve_guc_top power: supply: rk817: Add missing module alias power: supply: ab8500: Set typing and props fs: binfmt_elf_efpic: fix personality for ELF-FDPIC drm/amdkfd: Use gpu_offset for user queue's wptr drm/meson: fix memory leak on ->hpd_notify callback memcg: drop kmem.limit_in_bytes mm, memcg: reconsider kmem.limit_in_bytes deprecation ASoC: amd: yc: Fix a non-functional mic on Lenovo 82TL Linux 6.1.56 Change-Id: Id110614d91d6d60fb6c7622c5af82f219a84a30f Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
commit
2950de8b2d
@ -91,8 +91,13 @@ Brief summary of control files.
|
||||
memory.oom_control set/show oom controls.
|
||||
memory.numa_stat show the number of memory usage per numa
|
||||
node
|
||||
memory.kmem.limit_in_bytes This knob is deprecated and writing to
|
||||
it will return -ENOTSUPP.
|
||||
memory.kmem.limit_in_bytes Deprecated knob to set and read the kernel
|
||||
memory hard limit. Kernel hard limit is not
|
||||
supported since 5.16. Writing any value to
|
||||
do file will not have any effect same as if
|
||||
nokmem kernel parameter was specified.
|
||||
Kernel memory is still charged and reported
|
||||
by memory.kmem.usage_in_bytes.
|
||||
memory.kmem.usage_in_bytes show current kernel memory allocation
|
||||
memory.kmem.failcnt show the number of kernel memory usage
|
||||
hits limits
|
||||
|
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 1
|
||||
SUBLEVEL = 55
|
||||
SUBLEVEL = 56
|
||||
EXTRAVERSION =
|
||||
NAME = Curry Ramen
|
||||
|
||||
|
@ -103,8 +103,9 @@ panel-info {
|
||||
|
||||
};
|
||||
|
||||
guardian_beeper: dmtimer-pwm@7 {
|
||||
guardian_beeper: pwm-7 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
#pwm-cells = <3>;
|
||||
ti,timers = <&timer7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&guardian_beeper_pins>;
|
||||
|
@ -150,7 +150,7 @@ bl: backlight {
|
||||
enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
|
||||
};
|
||||
|
||||
pwm11: dmtimer-pwm@11 {
|
||||
pwm11: pwm-11 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
|
@ -19,7 +19,8 @@ chosen {
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>;
|
||||
reg = <0x00000000 0x08000000>,
|
||||
<0x88000000 0x08000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
|
@ -201,8 +201,8 @@ lcd@0 {
|
||||
power-on-delay = <10>;
|
||||
reset-delay = <10>;
|
||||
|
||||
panel-width-mm = <90>;
|
||||
panel-height-mm = <154>;
|
||||
panel-width-mm = <56>;
|
||||
panel-height-mm = <93>;
|
||||
|
||||
display-timings {
|
||||
timing {
|
||||
|
@ -59,7 +59,7 @@ led2 {
|
||||
};
|
||||
};
|
||||
|
||||
pwm10: dmtimer-pwm {
|
||||
pwm10: pwm-10 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
|
@ -133,7 +133,7 @@ soundcard {
|
||||
dais = <&mcbsp2_port>, <&mcbsp3_port>;
|
||||
};
|
||||
|
||||
pwm8: dmtimer-pwm-8 {
|
||||
pwm8: pwm-8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vibrator_direction_pin>;
|
||||
|
||||
@ -143,7 +143,7 @@ pwm8: dmtimer-pwm-8 {
|
||||
ti,clock-source = <0x01>;
|
||||
};
|
||||
|
||||
pwm9: dmtimer-pwm-9 {
|
||||
pwm9: pwm-9 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vibrator_enable_pin>;
|
||||
|
||||
@ -352,13 +352,13 @@ isl29030@44 {
|
||||
&omap4_pmx_core {
|
||||
|
||||
/* hdmi_hpd.gpio_63 */
|
||||
hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
|
||||
hdmi_hpd_gpio: hdmi-hpd-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
hdq_pins: pinmux_hdq_pins {
|
||||
hdq_pins: hdq-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* 0x4a100120 hdq_sio.hdq_sio aa27 */
|
||||
OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
|
||||
@ -366,7 +366,7 @@ OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
|
||||
};
|
||||
|
||||
/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
dss_hdmi_pins: dss-hdmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
|
||||
@ -380,7 +380,7 @@ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
|
||||
* devices. Off mode value should be tested if we have off mode working
|
||||
* later on.
|
||||
*/
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
mmc3_pins: mmc3-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
|
||||
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
|
||||
@ -406,40 +406,40 @@ OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
};
|
||||
|
||||
/* gpmc_ncs0.gpio_50 */
|
||||
poweroff_gpio: pinmux_poweroff_pins {
|
||||
poweroff_gpio: poweroff-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
/* kpd_row0.gpio_178 */
|
||||
tmp105_irq: pinmux_tmp105_irq {
|
||||
tmp105_irq: tmp105-irq-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
|
||||
usb_gpio_mux_sel1: usb-gpio-mux-sel1-pins {
|
||||
/* gpio_60 */
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
touchscreen_pins: pinmux_touchscreen_pins {
|
||||
touchscreen_pins: touchscreen-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
als_proximity_pins: pinmux_als_proximity_pins {
|
||||
als_proximity_pins: als-proximity-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
|
||||
usb_mdm6600_pins: usb-mdm6600-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
|
||||
OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
|
||||
@ -476,7 +476,7 @@ OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
usb_ulpi_pins: pinmux_usb_ulpi_pins {
|
||||
usb_ulpi_pins: usb-ulpi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x196, MUX_MODE7)
|
||||
OMAP4_IOPAD(0x198, MUX_MODE7)
|
||||
@ -496,7 +496,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
};
|
||||
|
||||
/* usb0_otg_dp and usb0_otg_dm */
|
||||
usb_utmi_pins: pinmux_usb_utmi_pins {
|
||||
usb_utmi_pins: usb-utmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
|
||||
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
|
||||
@ -521,7 +521,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||||
* when not used. If needed, we can add rts pin remux later based
|
||||
* on power measurements.
|
||||
*/
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
uart1_pins: uart1-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
|
||||
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
@ -538,7 +538,7 @@ OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
};
|
||||
|
||||
/* uart3_tx_irtx and uart3_rx_irrx */
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
uart3_pins: uart3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x196, MUX_MODE7)
|
||||
OMAP4_IOPAD(0x198, MUX_MODE7)
|
||||
@ -557,7 +557,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: pinmux_uart4_pins {
|
||||
uart4_pins: uart4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
|
||||
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
|
||||
@ -566,7 +566,7 @@ OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
mcbsp2_pins: mcbsp2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
|
||||
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
|
||||
@ -575,7 +575,7 @@ OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp3_pins: pinmux_mcbsp3_pins {
|
||||
mcbsp3_pins: mcbsp3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
|
||||
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
|
||||
@ -584,13 +584,13 @@ OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
vibrator_direction_pin: pinmux_vibrator_direction_pin {
|
||||
vibrator_direction_pin: vibrator-direction-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1) /* dmtimer8_pwm_evt (gpio_27) */
|
||||
>;
|
||||
};
|
||||
|
||||
vibrator_enable_pin: pinmux_vibrator_enable_pin {
|
||||
vibrator_enable_pin: vibrator-enable-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
|
||||
>;
|
||||
@ -598,7 +598,7 @@ OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
|
||||
usb_gpio_mux_sel2: usb-gpio-mux-sel2-pins {
|
||||
/* gpio_wk0 */
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
|
||||
@ -614,12 +614,12 @@ &rng_target {
|
||||
/* Configure pwm clock source for timers 8 & 9 */
|
||||
&timer8 {
|
||||
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&sys_clkin_ck>;
|
||||
assigned-clock-parents = <&sys_32k_ck>;
|
||||
};
|
||||
|
||||
&timer9 {
|
||||
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&sys_clkin_ck>;
|
||||
assigned-clock-parents = <&sys_32k_ck>;
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -8,9 +8,9 @@
|
||||
|
||||
/ {
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a: regulator-vdd33a {
|
||||
|
@ -12,9 +12,9 @@
|
||||
|
||||
/ {
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a: regulator-vdd33a {
|
||||
|
@ -11,12 +11,12 @@ / {
|
||||
model = "CompuLab CM-T3517";
|
||||
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
|
||||
|
||||
vmmc: regulator-vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
vmmc: regulator-vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
wl12xx_vmmc2: wl12xx_vmmc2 {
|
||||
compatible = "regulator-fixed";
|
||||
|
@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal {
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
coefficients = <0 20000>;
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&bandgap 0>;
|
||||
thermal-sensors = <&bandgap>;
|
||||
|
||||
cpu_trips: trips {
|
||||
cpu_alert0: cpu_alert {
|
||||
|
@ -147,7 +147,7 @@ backlight: backlight {
|
||||
pinctrl-0 = <&backlight_pins>;
|
||||
};
|
||||
|
||||
pwm11: dmtimer-pwm {
|
||||
pwm11: pwm-11 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
ti,timers = <&timer11>;
|
||||
#pwm-cells = <3>;
|
||||
@ -332,7 +332,7 @@ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
gps_pins: pinmux_gps_pins {
|
||||
pinctrl-single,pins = <
|
||||
@ -869,8 +869,8 @@ &mcbsp4 { /* GSM voice PCM */
|
||||
};
|
||||
|
||||
&hdqw1w {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdq_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdq_pins>;
|
||||
};
|
||||
|
||||
/* image signal processor within OMAP3 SoC */
|
||||
|
@ -301,5 +301,5 @@ &usb_otg_hs {
|
||||
|
||||
&vaux1 {
|
||||
/* Needed for ads7846 */
|
||||
regulator-name = "vcc";
|
||||
regulator-name = "vcc";
|
||||
};
|
||||
|
@ -156,7 +156,7 @@ battery: n900-battery {
|
||||
io-channel-names = "temp", "bsi", "vbat";
|
||||
};
|
||||
|
||||
pwm9: dmtimer-pwm {
|
||||
pwm9: pwm-9 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
#pwm-cells = <3>;
|
||||
ti,timers = <&timer9>;
|
||||
@ -236,27 +236,27 @@ gpmc_pins: pinmux_gpmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* address lines */
|
||||
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
|
||||
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
|
||||
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
|
||||
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
|
||||
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
|
||||
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
|
||||
|
||||
/* data lines, gpmc_d0..d7 not muxable according to TRM */
|
||||
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
|
||||
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
|
||||
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
|
||||
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
|
||||
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
|
||||
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
|
||||
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
|
||||
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
|
||||
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
|
||||
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
|
||||
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
|
||||
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
|
||||
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
|
||||
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
|
||||
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
|
||||
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
|
||||
|
||||
/*
|
||||
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
|
||||
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
|
||||
*/
|
||||
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
|
||||
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
|
||||
>;
|
||||
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
|
||||
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
@ -738,12 +738,12 @@ tpa6130a2: tpa6130a2@60 {
|
||||
|
||||
si4713: si4713@63 {
|
||||
compatible = "silabs,si4713";
|
||||
reg = <0x63>;
|
||||
reg = <0x63>;
|
||||
|
||||
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
|
||||
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
|
||||
vio-supply = <&vio>;
|
||||
vdd-supply = <&vaux1>;
|
||||
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
|
||||
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
|
||||
vio-supply = <&vio>;
|
||||
vdd-supply = <&vaux1>;
|
||||
};
|
||||
|
||||
bq24150a: bq24150a@6b {
|
||||
|
@ -23,9 +23,9 @@ memory@80000000 {
|
||||
};
|
||||
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a: regulator-vdd33a {
|
||||
@ -84,28 +84,28 @@ OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -205,22 +205,22 @@ wlcore: wlcore@2 {
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
|
@ -12,21 +12,24 @@ cpu_thermal: cpu_thermal {
|
||||
polling-delay-passive = <250>; /* milliseconds */
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&bandgap 0>;
|
||||
/*
|
||||
* See 44xx files for single sensor addressing, omap5 and dra7 need
|
||||
* also sensor ID for addressing.
|
||||
*/
|
||||
thermal-sensors = <&bandgap 0>;
|
||||
|
||||
cpu_trips: trips {
|
||||
cpu_alert0: cpu_alert {
|
||||
temperature = <100000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "passive";
|
||||
};
|
||||
cpu_crit: cpu_crit {
|
||||
temperature = <125000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cpu_alert0: cpu_alert {
|
||||
temperature = <100000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "passive";
|
||||
};
|
||||
cpu_crit: cpu_crit {
|
||||
temperature = <125000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cpu_cooling_maps: cooling-maps {
|
||||
map0 {
|
||||
|
@ -62,33 +62,33 @@ &button_pins
|
||||
&smsc_pins
|
||||
>;
|
||||
|
||||
led_pins: pinmux_led_pins {
|
||||
led_pins: led-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
|
||||
>;
|
||||
};
|
||||
|
||||
button_pins: pinmux_button_pins {
|
||||
button_pins: button-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
i2c2_pins: i2c2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
i2c3_pins: i2c3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc_pins: pinmux_smsc_pins {
|
||||
smsc_pins: smsc-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x068, PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
|
||||
OMAP4_IOPAD(0x06a, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
|
||||
@ -96,7 +96,7 @@ OMAP4_IOPAD(0x070, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48: amdix enab
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
dss_hdmi_pins: dss-hdmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
|
@ -73,14 +73,14 @@ &twl6040_pins
|
||||
&hsusbb1_pins
|
||||
>;
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
twl6040_pins: twl6040-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_nxt.gpio_160 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
mcbsp1_pins: mcbsp1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
@ -89,7 +89,7 @@ OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
hsusbb1_pins: hsusbb1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
@ -106,34 +106,34 @@ OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_u
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb1phy_pins: pinmux_hsusb1phy_pins {
|
||||
hsusb1phy_pins: hsusb1phy-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x08c, PIN_OUTPUT | MUX_MODE3) /* gpmc_wait1.gpio_62 */
|
||||
>;
|
||||
};
|
||||
|
||||
w2cbw0015_pins: pinmux_w2cbw0015_pins {
|
||||
w2cbw0015_pins: w2cbw0015-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
i2c4_pins: i2c4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
mmc1_pins: mmc1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_cmd */
|
||||
@ -144,7 +144,7 @@ OMAP4_IOPAD(0x0ec, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc5_pins: pinmux_mmc5_pins {
|
||||
mmc5_pins: mmc5-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk */
|
||||
OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_cmd */
|
||||
|
@ -35,42 +35,42 @@ led-2 {
|
||||
&omap4_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
uart3_pins: uart3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
|
||||
OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
i2c2_pins: i2c2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
i2c3_pins: i2c3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
i2c4_pins: i2c4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
mmc2_pins: mmc2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x040, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0 */
|
||||
OMAP4_IOPAD(0x042, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat1 */
|
||||
@ -85,7 +85,7 @@ OMAP4_IOPAD(0x084, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_cmd */
|
||||
>;
|
||||
};
|
||||
|
||||
usb_otg_hs_pins: pinmux_usb_otg_hs_pins {
|
||||
usb_otg_hs_pins: usb-otg-hs-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x194, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usba0_otg_ce */
|
||||
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0) /* usba0_otg_dp */
|
||||
|
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
&omap4_pmx_core {
|
||||
mcpdm_pins: pinmux_mcpdm_pins {
|
||||
mcpdm_pins: mcpdm-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */
|
||||
OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
|
@ -237,14 +237,14 @@ &tpd12s015_pins
|
||||
&hsusbb1_pins
|
||||
>;
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
twl6040_pins: twl6040-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
mcbsp1_pins: mcbsp1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
@ -253,7 +253,7 @@ OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
dss_dpi_pins: dss-dpi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
|
||||
OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
|
||||
@ -288,13 +288,13 @@ OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
tfp410_pins: tfp410-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3) /* gpio_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
dss_hdmi_pins: dss-hdmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
@ -302,7 +302,7 @@ OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
tpd12s015_pins: tpd12s015-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
@ -310,7 +310,7 @@ OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
hsusbb1_pins: hsusbb1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
@ -327,28 +327,28 @@ OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_u
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
i2c2_pins: i2c2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
i2c3_pins: i2c3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
i2c4_pins: i2c4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
@ -359,7 +359,7 @@ OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
* wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
|
||||
* REVISIT: Are the pull-ups needed for GPIO 48 and 49?
|
||||
*/
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
wl12xx_gpio: wl12xx-gpio-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||
OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
|
||||
@ -369,7 +369,7 @@ OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
|
||||
};
|
||||
|
||||
/* wl12xx GPIO inputs and SDIO pins */
|
||||
wl12xx_pins: pinmux_wl12xx_pins {
|
||||
wl12xx_pins: wl12xx-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
|
||||
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
@ -382,7 +382,7 @@ OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
button_pins: pinmux_button_pins {
|
||||
button_pins: button-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_121 */
|
||||
>;
|
||||
@ -390,7 +390,7 @@ OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_121 */
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
led_wkgpio_pins: pinmux_leds_wkpins {
|
||||
led_wkgpio_pins: leds-wkpins-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
|
||||
OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
|
@ -38,26 +38,26 @@ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
led_gpio_pins: gpio_led_pmx {
|
||||
led_gpio_pins: gpio-led-pmx-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
|
||||
>;
|
||||
};
|
||||
|
||||
button_pins: pinmux_button_pins {
|
||||
button_pins: button-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0fc, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
|
||||
>;
|
||||
};
|
||||
|
||||
bt_pins: pinmux_bt_pins {
|
||||
bt_pins: bt-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 - BTEN */
|
||||
OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 - BTWAKEUP */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
uart2_pins: uart2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts - HCI */
|
||||
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
|
@ -214,7 +214,7 @@ &dss_hdmi_pins
|
||||
&tpd12s015_pins
|
||||
>;
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
uart2_pins: uart2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
@ -223,7 +223,7 @@ OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
uart3_pins: uart3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
@ -232,21 +232,21 @@ OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: pinmux_uart4_pins {
|
||||
uart4_pins: uart4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
|
||||
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
twl6040_pins: twl6040-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
dmic_pins: pinmux_dmic_pins {
|
||||
dmic_pins: dmic-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
|
||||
OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
|
||||
@ -255,7 +255,7 @@ OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
mcbsp1_pins: mcbsp1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
@ -264,7 +264,7 @@ OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
mcbsp2_pins: mcbsp2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
|
||||
OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
|
||||
@ -273,7 +273,7 @@ OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1_pins: pinmux_mcspi1_pins {
|
||||
mcspi1_pins: mcspi1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
@ -282,7 +282,7 @@ OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
dss_hdmi_pins: dss-hdmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
@ -290,7 +290,7 @@ OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
tpd12s015_pins: tpd12s015-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
@ -298,28 +298,28 @@ OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
i2c2_pins: i2c2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
i2c3_pins: i2c3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
i2c4_pins: i2c4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
@ -327,14 +327,14 @@ OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
};
|
||||
|
||||
/* wl12xx GPIO output for WLAN_EN */
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
wl12xx_gpio: wl12xx-gpio-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO inputs and SDIO pins */
|
||||
wl12xx_pins: pinmux_wl12xx_pins {
|
||||
wl12xx_pins: wl12xx-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
@ -347,13 +347,13 @@ OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
};
|
||||
|
||||
/* gpio_48 for ENET_ENABLE */
|
||||
enet_enable_gpio: pinmux_enet_enable_gpio {
|
||||
enet_enable_gpio: enet-enable-gpio-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a24.gpio_48 */
|
||||
>;
|
||||
};
|
||||
|
||||
ks8851_pins: pinmux_ks8851_pins {
|
||||
ks8851_pins: ks8851-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* ENET_INT */
|
||||
OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.gpio_34 */
|
||||
|
@ -60,7 +60,7 @@ hdmi_connector_in: endpoint {
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
uart1_pins: uart1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi1_cs2.uart1_cts */
|
||||
OMAP4_IOPAD(0x13e, PIN_OUTPUT | MUX_MODE1) /* mcspi1_cs3.uart1_rts */
|
||||
@ -69,7 +69,7 @@ OMAP4_IOPAD(0x128, PIN_OUTPUT | MUX_MODE1) /* i2c2_sda.uart1_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1_pins: pinmux_mcspi1_pins {
|
||||
mcspi1_pins: mcspi1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
@ -78,13 +78,13 @@ OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp_pins: pinmux_mcsasp_pins {
|
||||
mcasp_pins: mcsasp-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f8, PIN_OUTPUT | MUX_MODE2) /* mcbsp2_dr.abe_mcasp_axr */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
dss_dpi_pins: dss-dpi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
|
||||
OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
|
||||
@ -117,7 +117,7 @@ OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
dss_hdmi_pins: dss-hdmi-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
@ -125,14 +125,14 @@ OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
i2c4_pins: i2c4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc5_pins: pinmux_mmc5_pins {
|
||||
mmc5_pins: mmc5-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE3) /* abe_mcbsp2_clkx.gpio_110 */
|
||||
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
@ -144,32 +144,32 @@ OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_led_pins: pinmux_gpio_led_pins {
|
||||
gpio_led_pins: gpio-led-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x17e, PIN_OUTPUT | MUX_MODE3) /* kpd_col4.gpio_172 */
|
||||
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3) /* kpd_col5.gpio_173 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_key_pins: pinmux_gpio_key_pins {
|
||||
gpio_key_pins: gpio-key-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x1a2, PIN_INPUT | MUX_MODE3) /* sys_boot0.gpio_184 */
|
||||
>;
|
||||
};
|
||||
|
||||
ks8851_irq_pins: pinmux_ks8851_irq_pins {
|
||||
ks8851_irq_pins: ks8851-irq-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x17c, PIN_INPUT_PULLUP | MUX_MODE3) /* kpd_col3.gpio_171 */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_hpd_pins: pinmux_hdmi_hpd_pins {
|
||||
hdmi_hpd_pins: hdmi-hpd-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
>;
|
||||
};
|
||||
|
||||
backlight_pins: pinmux_backlight_pins {
|
||||
backlight_pins: backlight-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
|
||||
>;
|
||||
|
@ -19,7 +19,7 @@ wl12xx_vmmc: wl12xx_vmmc {
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
uart2_pins: uart2-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
@ -28,7 +28,7 @@ OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_ctrl_pins: pinmux_wl12xx_ctrl_pins {
|
||||
wl12xx_ctrl_pins: wl12xx-ctrl-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x062, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a17.gpio_41 (WLAN_IRQ) */
|
||||
OMAP4_IOPAD(0x064, PIN_OUTPUT | MUX_MODE3) /* gpmc_a18.gpio_42 (BT_EN) */
|
||||
@ -36,7 +36,7 @@ OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 (WLAN_EN) */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc4_pins: pinmux_mmc4_pins {
|
||||
mmc4_pins: mmc4-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x154, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_clk.sdmmc4_clk */
|
||||
OMAP4_IOPAD(0x156, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_simo.sdmmc4_cmd */
|
||||
|
@ -65,21 +65,21 @@ &omap4_pmx_core {
|
||||
&hsusbb1_pins
|
||||
>;
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
twl6040_pins: twl6040-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x19c, PIN_OUTPUT | MUX_MODE3) /* fref_clk2_out.gpio_182 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
tsc2004_pins: pinmux_tsc2004_pins {
|
||||
tsc2004_pins: tsc2004-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x090, PIN_INPUT | MUX_MODE3) /* gpmc_ncs4.gpio_101 (irq) */
|
||||
OMAP4_IOPAD(0x092, PIN_OUTPUT | MUX_MODE3) /* gpmc_ncs5.gpio_102 (rst) */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
uart3_pins: uart3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
@ -88,7 +88,7 @@ OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
hsusbb1_pins: hsusbb1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
@ -105,27 +105,27 @@ OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_u
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_phy_rst_pins: pinmux_hsusbb1_phy_rst_pins {
|
||||
hsusbb1_phy_rst_pins: hsusbb1-phy-rst-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x18c, PIN_OUTPUT | MUX_MODE3) /* kpd_row2.gpio_177 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
i2c3_pins: i2c3-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
mmc1_pins: mmc1-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
@ -144,19 +144,19 @@ &hsusbb1_hub_rst_pins
|
||||
&lan7500_rst_pins
|
||||
>;
|
||||
|
||||
hsusbb1_phy_clk_pins: pinmux_hsusbb1_phy_clk_pins {
|
||||
hsusbb1_phy_clk_pins: hsusbb1-phy-clk-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x058, PIN_OUTPUT | MUX_MODE0) /* fref_clk3_out */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_hub_rst_pins: pinmux_hsusbb1_hub_rst_pins {
|
||||
hsusbb1_hub_rst_pins: hsusbb1-hub-rst-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x042, PIN_OUTPUT | MUX_MODE3) /* gpio_wk1 */
|
||||
>;
|
||||
};
|
||||
|
||||
lan7500_rst_pins: pinmux_lan7500_rst_pins {
|
||||
lan7500_rst_pins: lan7500-rst-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x040, PIN_OUTPUT | MUX_MODE3) /* gpio_wk0 */
|
||||
>;
|
||||
|
@ -69,6 +69,7 @@ abb_iva: regulator-abb-iva {
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
thermal-sensors = <&bandgap>;
|
||||
coefficients = <0 20000>;
|
||||
};
|
||||
|
||||
|
@ -79,6 +79,7 @@ abb_iva: regulator-abb-iva {
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
thermal-sensors = <&bandgap>;
|
||||
coefficients = <348 (-9301)>;
|
||||
};
|
||||
|
||||
|
@ -84,36 +84,36 @@ led1 {
|
||||
};
|
||||
|
||||
lcd0: display {
|
||||
compatible = "startek,startek-kd050c", "panel-dpi";
|
||||
label = "lcd";
|
||||
compatible = "startek,startek-kd050c", "panel-dpi";
|
||||
label = "lcd";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
|
||||
enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
|
||||
enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <33000000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <40>;
|
||||
hsync-len = <43>;
|
||||
vback-porch = <29>;
|
||||
vfront-porch = <13>;
|
||||
vsync-len = <3>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <1>;
|
||||
pixelclk-active = <1>;
|
||||
};
|
||||
panel-timing {
|
||||
clock-frequency = <33000000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <40>;
|
||||
hsync-len = <43>;
|
||||
vback-porch = <29>;
|
||||
vfront-porch = <13>;
|
||||
vsync-len = <3>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <1>;
|
||||
pixelclk-active = <1>;
|
||||
};
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_lcd_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_lcd_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi0: connector0 {
|
||||
compatible = "hdmi-connector";
|
||||
@ -644,8 +644,8 @@ &usbhsehci {
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
extcon = <&extcon_usb3>;
|
||||
vbus-supply = <&smps10_out1_reg>;
|
||||
extcon = <&extcon_usb3>;
|
||||
vbus-supply = <&smps10_out1_reg>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
|
@ -124,15 +124,15 @@ synaptics@2c {
|
||||
|
||||
syna,startup-delay-ms = <10>;
|
||||
|
||||
rmi-f01@1 {
|
||||
rmi4-f01@1 {
|
||||
reg = <0x1>;
|
||||
syna,nosleep = <1>;
|
||||
syna,nosleep-mode = <1>;
|
||||
};
|
||||
|
||||
rmi-f11@11 {
|
||||
rmi4-f11@11 {
|
||||
reg = <0x11>;
|
||||
syna,f11-flip-x = <1>;
|
||||
syna,sensor-type = <1>;
|
||||
touchscreen-inverted-x;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -19,7 +19,7 @@ &twl6030_wkup_pins
|
||||
};
|
||||
|
||||
&omap4_pmx_wkup {
|
||||
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
|
||||
twl6030_wkup_pins: twl6030-wkup-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
|
||||
>;
|
||||
@ -27,7 +27,7 @@ OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
twl6030_pins: pinmux_twl6030_pins {
|
||||
twl6030_pins: twl6030-pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
|
||||
>;
|
||||
|
@ -62,6 +62,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-osm-s.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
|
||||
|
@ -100,6 +100,14 @@ hdmi_con: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
/* Cont splash region set up by the bootloader */
|
||||
cont_splash_mem: framebuffer@9d400000 {
|
||||
reg = <0x0 0x9d400000 0x0 0x2400000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
lt9611_1v8: lt9611-vdd18-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "LT9611_1V8";
|
||||
@ -512,6 +520,7 @@ &i2c14 {
|
||||
};
|
||||
|
||||
&mdss {
|
||||
memory-region = <&cont_splash_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -1050,7 +1050,6 @@ CONFIG_COMMON_CLK_FSL_SAI=y
|
||||
CONFIG_COMMON_CLK_S2MPS11=y
|
||||
CONFIG_COMMON_CLK_PWM=y
|
||||
CONFIG_COMMON_CLK_VC5=y
|
||||
CONFIG_COMMON_CLK_NPCM8XX=y
|
||||
CONFIG_COMMON_CLK_BD718XX=m
|
||||
CONFIG_CLK_RASPBERRYPI=m
|
||||
CONFIG_CLK_IMX8MM=y
|
||||
|
@ -111,6 +111,15 @@
|
||||
#define R_LARCH_TLS_GD_HI20 98
|
||||
#define R_LARCH_32_PCREL 99
|
||||
#define R_LARCH_RELAX 100
|
||||
#define R_LARCH_DELETE 101
|
||||
#define R_LARCH_ALIGN 102
|
||||
#define R_LARCH_PCREL20_S2 103
|
||||
#define R_LARCH_CFA 104
|
||||
#define R_LARCH_ADD6 105
|
||||
#define R_LARCH_SUB6 106
|
||||
#define R_LARCH_ADD_ULEB128 107
|
||||
#define R_LARCH_SUB_ULEB128 108
|
||||
#define R_LARCH_64_PCREL 109
|
||||
|
||||
#ifndef ELF_ARCH
|
||||
|
||||
|
@ -50,7 +50,6 @@ void __init memblock_init(void)
|
||||
}
|
||||
|
||||
memblock_set_current_limit(PFN_PHYS(max_low_pfn));
|
||||
memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
|
||||
|
||||
/* Reserve the first 2MB */
|
||||
memblock_reserve(PHYS_OFFSET, 0x200000);
|
||||
@ -58,4 +57,7 @@ void __init memblock_init(void)
|
||||
/* Reserve the kernel text/data/bss */
|
||||
memblock_reserve(__pa_symbol(&_text),
|
||||
__pa_symbol(&_end) - __pa_symbol(&_text));
|
||||
|
||||
memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
|
||||
memblock_set_node(0, PHYS_ADDR_MAX, &memblock.reserved, 0);
|
||||
}
|
||||
|
@ -376,7 +376,7 @@ typedef int (*reloc_rela_handler)(struct module *mod, u32 *location, Elf_Addr v,
|
||||
|
||||
/* The handlers for known reloc types */
|
||||
static reloc_rela_handler reloc_rela_handlers[] = {
|
||||
[R_LARCH_NONE ... R_LARCH_RELAX] = apply_r_larch_error,
|
||||
[R_LARCH_NONE ... R_LARCH_64_PCREL] = apply_r_larch_error,
|
||||
|
||||
[R_LARCH_NONE] = apply_r_larch_none,
|
||||
[R_LARCH_32] = apply_r_larch_32,
|
||||
|
@ -453,7 +453,7 @@ void __init paging_init(void)
|
||||
|
||||
void __init mem_init(void)
|
||||
{
|
||||
high_memory = (void *) __va(get_num_physpages() << PAGE_SHIFT);
|
||||
high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
|
||||
memblock_free_all();
|
||||
setup_zero_pages(); /* This comes from node 0 */
|
||||
}
|
||||
|
@ -164,6 +164,7 @@ static struct platform_device db1x00_audio_dev = {
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
|
||||
{
|
||||
mmc_detect_change(ptr, msecs_to_jiffies(500));
|
||||
@ -369,6 +370,7 @@ static struct platform_device db1100_mmc1_dev = {
|
||||
.num_resources = ARRAY_SIZE(au1100_mmc1_res),
|
||||
.resource = au1100_mmc1_res,
|
||||
};
|
||||
#endif /* CONFIG_MMC_AU1X */
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
@ -432,8 +434,10 @@ static struct platform_device *db1x00_devs[] = {
|
||||
|
||||
static struct platform_device *db1100_devs[] = {
|
||||
&au1100_lcd_device,
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
&db1100_mmc0_dev,
|
||||
&db1100_mmc1_dev,
|
||||
#endif
|
||||
};
|
||||
|
||||
int __init db1000_dev_setup(void)
|
||||
|
@ -326,6 +326,7 @@ static struct platform_device db1200_ide_dev = {
|
||||
|
||||
/**********************************************************************/
|
||||
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
/* SD carddetects: they're supposed to be edge-triggered, but ack
|
||||
* doesn't seem to work (CPLD Rev 2). Instead, the screaming one
|
||||
* is disabled and its counterpart enabled. The 200ms timeout is
|
||||
@ -584,6 +585,7 @@ static struct platform_device pb1200_mmc1_dev = {
|
||||
.num_resources = ARRAY_SIZE(au1200_mmc1_res),
|
||||
.resource = au1200_mmc1_res,
|
||||
};
|
||||
#endif /* CONFIG_MMC_AU1X */
|
||||
|
||||
/**********************************************************************/
|
||||
|
||||
@ -751,7 +753,9 @@ static struct platform_device db1200_audiodma_dev = {
|
||||
static struct platform_device *db1200_devs[] __initdata = {
|
||||
NULL, /* PSC0, selected by S6.8 */
|
||||
&db1200_ide_dev,
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
&db1200_mmc0_dev,
|
||||
#endif
|
||||
&au1200_lcd_dev,
|
||||
&db1200_eth_dev,
|
||||
&db1200_nand_dev,
|
||||
@ -762,7 +766,9 @@ static struct platform_device *db1200_devs[] __initdata = {
|
||||
};
|
||||
|
||||
static struct platform_device *pb1200_devs[] __initdata = {
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
&pb1200_mmc1_dev,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Some peripheral base addresses differ on the PB1200 */
|
||||
|
@ -450,6 +450,7 @@ static struct platform_device db1300_ide_dev = {
|
||||
|
||||
/**********************************************************************/
|
||||
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
|
||||
{
|
||||
disable_irq_nosync(irq);
|
||||
@ -632,6 +633,7 @@ static struct platform_device db1300_sd0_dev = {
|
||||
.resource = au1300_sd0_res,
|
||||
.num_resources = ARRAY_SIZE(au1300_sd0_res),
|
||||
};
|
||||
#endif /* CONFIG_MMC_AU1X */
|
||||
|
||||
/**********************************************************************/
|
||||
|
||||
@ -767,8 +769,10 @@ static struct platform_device *db1300_dev[] __initdata = {
|
||||
&db1300_5waysw_dev,
|
||||
&db1300_nand_dev,
|
||||
&db1300_ide_dev,
|
||||
#ifdef CONFIG_MMC_AU1X
|
||||
&db1300_sd0_dev,
|
||||
&db1300_sd1_dev,
|
||||
#endif
|
||||
&db1300_lcd_dev,
|
||||
&db1300_ac97_dev,
|
||||
&db1300_i2s_dev,
|
||||
|
@ -86,6 +86,9 @@ struct sba_device {
|
||||
struct ioc ioc[MAX_IOC];
|
||||
};
|
||||
|
||||
/* list of SBA's in system, see drivers/parisc/sba_iommu.c */
|
||||
extern struct sba_device *sba_list;
|
||||
|
||||
#define ASTRO_RUNWAY_PORT 0x582
|
||||
#define IKE_MERCED_PORT 0x803
|
||||
#define REO_MERCED_PORT 0x804
|
||||
|
@ -924,9 +924,9 @@ static __init void qemu_header(void)
|
||||
pr_info("#define PARISC_MODEL \"%s\"\n\n",
|
||||
boot_cpu_data.pdc.sys_model_name);
|
||||
|
||||
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
|
||||
pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
|
||||
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
|
||||
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
|
||||
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
|
||||
#undef p
|
||||
|
||||
|
@ -368,7 +368,7 @@ union irq_stack_union {
|
||||
volatile unsigned int lock[1];
|
||||
};
|
||||
|
||||
DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
|
||||
static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
|
||||
.slock = { 1,1,1,1 },
|
||||
};
|
||||
#endif
|
||||
|
@ -505,11 +505,13 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
|
||||
struct arch_hw_breakpoint *info;
|
||||
int i;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
for (i = 0; i < nr_wp_slots(); i++) {
|
||||
if (unlikely(tsk->thread.last_hit_ubp[i]))
|
||||
goto reset;
|
||||
}
|
||||
return;
|
||||
goto out;
|
||||
|
||||
reset:
|
||||
regs_set_return_msr(regs, regs->msr & ~MSR_SE);
|
||||
@ -518,6 +520,9 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
|
||||
__set_breakpoint(i, info);
|
||||
tsk->thread.last_hit_ubp[i] = NULL;
|
||||
}
|
||||
|
||||
out:
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static bool is_larx_stcx_instr(int type)
|
||||
@ -632,6 +637,11 @@ static void handle_p10dd1_spurious_exception(struct arch_hw_breakpoint **info,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Handle a DABR or DAWR exception.
|
||||
*
|
||||
* Called in atomic context.
|
||||
*/
|
||||
int hw_breakpoint_handler(struct die_args *args)
|
||||
{
|
||||
bool err = false;
|
||||
@ -758,6 +768,8 @@ NOKPROBE_SYMBOL(hw_breakpoint_handler);
|
||||
|
||||
/*
|
||||
* Handle single-step exceptions following a DABR hit.
|
||||
*
|
||||
* Called in atomic context.
|
||||
*/
|
||||
static int single_step_dabr_instruction(struct die_args *args)
|
||||
{
|
||||
@ -815,6 +827,8 @@ NOKPROBE_SYMBOL(single_step_dabr_instruction);
|
||||
|
||||
/*
|
||||
* Handle debug exception notifications.
|
||||
*
|
||||
* Called in atomic context.
|
||||
*/
|
||||
int hw_breakpoint_exceptions_notify(
|
||||
struct notifier_block *unused, unsigned long val, void *data)
|
||||
|
@ -131,8 +131,13 @@ void wp_get_instr_detail(struct pt_regs *regs, ppc_inst_t *instr,
|
||||
int *type, int *size, unsigned long *ea)
|
||||
{
|
||||
struct instruction_op op;
|
||||
int err;
|
||||
|
||||
if (__get_user_instr(*instr, (void __user *)regs->nip))
|
||||
pagefault_disable();
|
||||
err = __get_user_instr(*instr, (void __user *)regs->nip);
|
||||
pagefault_enable();
|
||||
|
||||
if (err)
|
||||
return;
|
||||
|
||||
analyse_instr(&op, regs, *instr);
|
||||
|
@ -1431,7 +1431,7 @@ static int h_24x7_event_init(struct perf_event *event)
|
||||
}
|
||||
|
||||
domain = event_get_domain(event);
|
||||
if (domain >= HV_PERF_DOMAIN_MAX) {
|
||||
if (domain == 0 || domain >= HV_PERF_DOMAIN_MAX) {
|
||||
pr_devel("invalid domain %d\n", domain);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -100,7 +100,7 @@ asm volatile(ALTERNATIVE( \
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01001 rs1 000 00000 0001011
|
||||
* dcache.cva rs1 (clean, virtual address)
|
||||
* 0000001 00100 rs1 000 00000 0001011
|
||||
* 0000001 00101 rs1 000 00000 0001011
|
||||
*
|
||||
* dcache.cipa rs1 (clean then invalidate, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
@ -113,7 +113,7 @@ asm volatile(ALTERNATIVE( \
|
||||
* 0000000 11001 00000 000 00000 0001011
|
||||
*/
|
||||
#define THEAD_inval_A0 ".long 0x0265000b"
|
||||
#define THEAD_clean_A0 ".long 0x0245000b"
|
||||
#define THEAD_clean_A0 ".long 0x0255000b"
|
||||
#define THEAD_flush_A0 ".long 0x0275000b"
|
||||
#define THEAD_SYNC_S ".long 0x0190000b"
|
||||
|
||||
|
@ -208,8 +208,6 @@ int arch_kimage_file_post_load_cleanup(struct kimage *image);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
typedef void crash_vmclear_fn(void);
|
||||
extern crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;
|
||||
extern void kdump_nmi_shootdown_cpus(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
@ -25,6 +25,8 @@ void __noreturn machine_real_restart(unsigned int type);
|
||||
#define MRR_BIOS 0
|
||||
#define MRR_APM 1
|
||||
|
||||
typedef void crash_vmclear_fn(void);
|
||||
extern crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;
|
||||
void cpu_emergency_disable_virtualization(void);
|
||||
|
||||
typedef void (*nmi_shootdown_cb)(int, struct pt_regs*);
|
||||
|
@ -2414,7 +2414,7 @@ static void __init srso_select_mitigation(void)
|
||||
|
||||
switch (srso_cmd) {
|
||||
case SRSO_CMD_OFF:
|
||||
return;
|
||||
goto pred_cmd;
|
||||
|
||||
case SRSO_CMD_MICROCODE:
|
||||
if (has_microcode) {
|
||||
@ -2692,7 +2692,7 @@ static ssize_t srso_show_state(char *buf)
|
||||
|
||||
return sysfs_emit(buf, "%s%s\n",
|
||||
srso_strings[srso_mitigation],
|
||||
(cpu_has_ibpb_brtype_microcode() ? "" : ", no microcode"));
|
||||
boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ? "" : ", no microcode");
|
||||
}
|
||||
|
||||
static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
|
||||
|
@ -1282,7 +1282,7 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
|
||||
VULNBL_AMD(0x15, RETBLEED),
|
||||
VULNBL_AMD(0x16, RETBLEED),
|
||||
VULNBL_AMD(0x17, RETBLEED | SMT_RSB | SRSO),
|
||||
VULNBL_HYGON(0x18, RETBLEED | SMT_RSB),
|
||||
VULNBL_HYGON(0x18, RETBLEED | SMT_RSB | SRSO),
|
||||
VULNBL_AMD(0x19, SRSO),
|
||||
{}
|
||||
};
|
||||
|
@ -235,6 +235,21 @@ static struct sgx_epc_page *sgx_encl_eldu(struct sgx_encl_page *encl_page,
|
||||
return epc_page;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ensure the SECS page is not swapped out. Must be called with encl->lock
|
||||
* to protect the enclave states including SECS and ensure the SECS page is
|
||||
* not swapped out again while being used.
|
||||
*/
|
||||
static struct sgx_epc_page *sgx_encl_load_secs(struct sgx_encl *encl)
|
||||
{
|
||||
struct sgx_epc_page *epc_page = encl->secs.epc_page;
|
||||
|
||||
if (!epc_page)
|
||||
epc_page = sgx_encl_eldu(&encl->secs, NULL);
|
||||
|
||||
return epc_page;
|
||||
}
|
||||
|
||||
static struct sgx_encl_page *__sgx_encl_load_page(struct sgx_encl *encl,
|
||||
struct sgx_encl_page *entry)
|
||||
{
|
||||
@ -248,11 +263,9 @@ static struct sgx_encl_page *__sgx_encl_load_page(struct sgx_encl *encl,
|
||||
return entry;
|
||||
}
|
||||
|
||||
if (!(encl->secs.epc_page)) {
|
||||
epc_page = sgx_encl_eldu(&encl->secs, NULL);
|
||||
if (IS_ERR(epc_page))
|
||||
return ERR_CAST(epc_page);
|
||||
}
|
||||
epc_page = sgx_encl_load_secs(encl);
|
||||
if (IS_ERR(epc_page))
|
||||
return ERR_CAST(epc_page);
|
||||
|
||||
epc_page = sgx_encl_eldu(entry, encl->secs.epc_page);
|
||||
if (IS_ERR(epc_page))
|
||||
@ -339,6 +352,13 @@ static vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma,
|
||||
|
||||
mutex_lock(&encl->lock);
|
||||
|
||||
epc_page = sgx_encl_load_secs(encl);
|
||||
if (IS_ERR(epc_page)) {
|
||||
if (PTR_ERR(epc_page) == -EBUSY)
|
||||
vmret = VM_FAULT_NOPAGE;
|
||||
goto err_out_unlock;
|
||||
}
|
||||
|
||||
epc_page = sgx_alloc_epc_page(encl_page, false);
|
||||
if (IS_ERR(epc_page)) {
|
||||
if (PTR_ERR(epc_page) == -EBUSY)
|
||||
|
@ -48,38 +48,12 @@ struct crash_memmap_data {
|
||||
unsigned int type;
|
||||
};
|
||||
|
||||
/*
|
||||
* This is used to VMCLEAR all VMCSs loaded on the
|
||||
* processor. And when loading kvm_intel module, the
|
||||
* callback function pointer will be assigned.
|
||||
*
|
||||
* protected by rcu.
|
||||
*/
|
||||
crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss = NULL;
|
||||
EXPORT_SYMBOL_GPL(crash_vmclear_loaded_vmcss);
|
||||
|
||||
static inline void cpu_crash_vmclear_loaded_vmcss(void)
|
||||
{
|
||||
crash_vmclear_fn *do_vmclear_operation = NULL;
|
||||
|
||||
rcu_read_lock();
|
||||
do_vmclear_operation = rcu_dereference(crash_vmclear_loaded_vmcss);
|
||||
if (do_vmclear_operation)
|
||||
do_vmclear_operation();
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
|
||||
|
||||
static void kdump_nmi_callback(int cpu, struct pt_regs *regs)
|
||||
{
|
||||
crash_save_cpu(regs, cpu);
|
||||
|
||||
/*
|
||||
* VMCLEAR VMCSs loaded on all cpus if needed.
|
||||
*/
|
||||
cpu_crash_vmclear_loaded_vmcss();
|
||||
|
||||
/*
|
||||
* Disable Intel PT to stop its logging
|
||||
*/
|
||||
@ -133,11 +107,6 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
|
||||
|
||||
crash_smp_send_stop();
|
||||
|
||||
/*
|
||||
* VMCLEAR VMCSs loaded on this cpu if needed.
|
||||
*/
|
||||
cpu_crash_vmclear_loaded_vmcss();
|
||||
|
||||
cpu_emergency_disable_virtualization();
|
||||
|
||||
/*
|
||||
|
@ -787,6 +787,26 @@ void machine_crash_shutdown(struct pt_regs *regs)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This is used to VMCLEAR all VMCSs loaded on the
|
||||
* processor. And when loading kvm_intel module, the
|
||||
* callback function pointer will be assigned.
|
||||
*
|
||||
* protected by rcu.
|
||||
*/
|
||||
crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;
|
||||
EXPORT_SYMBOL_GPL(crash_vmclear_loaded_vmcss);
|
||||
|
||||
static inline void cpu_crash_vmclear_loaded_vmcss(void)
|
||||
{
|
||||
crash_vmclear_fn *do_vmclear_operation = NULL;
|
||||
|
||||
rcu_read_lock();
|
||||
do_vmclear_operation = rcu_dereference(crash_vmclear_loaded_vmcss);
|
||||
if (do_vmclear_operation)
|
||||
do_vmclear_operation();
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
/* This is the CPU performing the emergency shutdown work. */
|
||||
int crashing_cpu = -1;
|
||||
@ -798,6 +818,8 @@ int crashing_cpu = -1;
|
||||
*/
|
||||
void cpu_emergency_disable_virtualization(void)
|
||||
{
|
||||
cpu_crash_vmclear_loaded_vmcss();
|
||||
|
||||
cpu_emergency_vmxoff();
|
||||
cpu_emergency_svm_disable();
|
||||
}
|
||||
|
@ -363,15 +363,11 @@ static void __init add_early_ima_buffer(u64 phys_addr)
|
||||
#if defined(CONFIG_HAVE_IMA_KEXEC) && !defined(CONFIG_OF_FLATTREE)
|
||||
int __init ima_free_kexec_buffer(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
if (!ima_kexec_buffer_size)
|
||||
return -ENOENT;
|
||||
|
||||
rc = memblock_phys_free(ima_kexec_buffer_phys,
|
||||
ima_kexec_buffer_size);
|
||||
if (rc)
|
||||
return rc;
|
||||
memblock_free_late(ima_kexec_buffer_phys,
|
||||
ima_kexec_buffer_size);
|
||||
|
||||
ima_kexec_buffer_phys = 0;
|
||||
ima_kexec_buffer_size = 0;
|
||||
|
@ -6079,7 +6079,6 @@ static bool kvm_rmap_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_e
|
||||
void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
|
||||
{
|
||||
bool flush;
|
||||
int i;
|
||||
|
||||
if (WARN_ON_ONCE(gfn_end <= gfn_start))
|
||||
return;
|
||||
@ -6090,11 +6089,8 @@ void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
|
||||
|
||||
flush = kvm_rmap_zap_gfn_range(kvm, gfn_start, gfn_end);
|
||||
|
||||
if (is_tdp_mmu_enabled(kvm)) {
|
||||
for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
|
||||
flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
|
||||
gfn_end, true, flush);
|
||||
}
|
||||
if (is_tdp_mmu_enabled(kvm))
|
||||
flush = kvm_tdp_mmu_zap_leafs(kvm, gfn_start, gfn_end, flush);
|
||||
|
||||
if (flush)
|
||||
kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
|
||||
|
@ -222,8 +222,12 @@ static struct kvm_mmu_page *tdp_mmu_next_root(struct kvm *kvm,
|
||||
#define for_each_valid_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared) \
|
||||
__for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared, true)
|
||||
|
||||
#define for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id) \
|
||||
__for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, false, false)
|
||||
#define for_each_tdp_mmu_root_yield_safe(_kvm, _root) \
|
||||
for (_root = tdp_mmu_next_root(_kvm, NULL, false, false); \
|
||||
_root; \
|
||||
_root = tdp_mmu_next_root(_kvm, _root, false, false)) \
|
||||
if (!kvm_lockdep_assert_mmu_lock_held(_kvm, false)) { \
|
||||
} else
|
||||
|
||||
/*
|
||||
* Iterate over all TDP MMU roots. Requires that mmu_lock be held for write,
|
||||
@ -955,13 +959,12 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root,
|
||||
* true if a TLB flush is needed before releasing the MMU lock, i.e. if one or
|
||||
* more SPTEs were zapped since the MMU lock was last acquired.
|
||||
*/
|
||||
bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start, gfn_t end,
|
||||
bool can_yield, bool flush)
|
||||
bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, gfn_t start, gfn_t end, bool flush)
|
||||
{
|
||||
struct kvm_mmu_page *root;
|
||||
|
||||
for_each_tdp_mmu_root_yield_safe(kvm, root, as_id)
|
||||
flush = tdp_mmu_zap_leafs(kvm, root, start, end, can_yield, flush);
|
||||
for_each_tdp_mmu_root_yield_safe(kvm, root)
|
||||
flush = tdp_mmu_zap_leafs(kvm, root, start, end, true, flush);
|
||||
|
||||
return flush;
|
||||
}
|
||||
@ -969,7 +972,6 @@ bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start, gfn_t end,
|
||||
void kvm_tdp_mmu_zap_all(struct kvm *kvm)
|
||||
{
|
||||
struct kvm_mmu_page *root;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Zap all roots, including invalid roots, as all SPTEs must be dropped
|
||||
@ -983,10 +985,8 @@ void kvm_tdp_mmu_zap_all(struct kvm *kvm)
|
||||
* is being destroyed or the userspace VMM has exited. In both cases,
|
||||
* KVM_RUN is unreachable, i.e. no vCPUs will ever service the request.
|
||||
*/
|
||||
for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
|
||||
for_each_tdp_mmu_root_yield_safe(kvm, root, i)
|
||||
tdp_mmu_zap_root(kvm, root, false);
|
||||
}
|
||||
for_each_tdp_mmu_root_yield_safe(kvm, root)
|
||||
tdp_mmu_zap_root(kvm, root, false);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1221,8 +1221,13 @@ int kvm_tdp_mmu_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
|
||||
bool kvm_tdp_mmu_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range,
|
||||
bool flush)
|
||||
{
|
||||
return kvm_tdp_mmu_zap_leafs(kvm, range->slot->as_id, range->start,
|
||||
range->end, range->may_block, flush);
|
||||
struct kvm_mmu_page *root;
|
||||
|
||||
__for_each_tdp_mmu_root_yield_safe(kvm, root, range->slot->as_id, false, false)
|
||||
flush = tdp_mmu_zap_leafs(kvm, root, range->start, range->end,
|
||||
range->may_block, flush);
|
||||
|
||||
return flush;
|
||||
}
|
||||
|
||||
typedef bool (*tdp_handler_t)(struct kvm *kvm, struct tdp_iter *iter,
|
||||
|
@ -15,8 +15,7 @@ __must_check static inline bool kvm_tdp_mmu_get_root(struct kvm_mmu_page *root)
|
||||
void kvm_tdp_mmu_put_root(struct kvm *kvm, struct kvm_mmu_page *root,
|
||||
bool shared);
|
||||
|
||||
bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start,
|
||||
gfn_t end, bool can_yield, bool flush);
|
||||
bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, gfn_t start, gfn_t end, bool flush);
|
||||
bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp);
|
||||
void kvm_tdp_mmu_zap_all(struct kvm *kvm);
|
||||
void kvm_tdp_mmu_invalidate_all_roots(struct kvm *kvm);
|
||||
|
@ -2941,6 +2941,32 @@ int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in)
|
||||
count, in);
|
||||
}
|
||||
|
||||
static void sev_es_vcpu_after_set_cpuid(struct vcpu_svm *svm)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = &svm->vcpu;
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_V_TSC_AUX)) {
|
||||
bool v_tsc_aux = guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) ||
|
||||
guest_cpuid_has(vcpu, X86_FEATURE_RDPID);
|
||||
|
||||
set_msr_interception(vcpu, svm->msrpm, MSR_TSC_AUX, v_tsc_aux, v_tsc_aux);
|
||||
}
|
||||
}
|
||||
|
||||
void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = &svm->vcpu;
|
||||
struct kvm_cpuid_entry2 *best;
|
||||
|
||||
/* For sev guests, the memory encryption bit is not reserved in CR3. */
|
||||
best = kvm_find_cpuid_entry(vcpu, 0x8000001F);
|
||||
if (best)
|
||||
vcpu->arch.reserved_gpa_bits &= ~(1UL << (best->ebx & 0x3f));
|
||||
|
||||
if (sev_es_guest(svm->vcpu.kvm))
|
||||
sev_es_vcpu_after_set_cpuid(svm);
|
||||
}
|
||||
|
||||
static void sev_es_init_vmcb(struct vcpu_svm *svm)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = &svm->vcpu;
|
||||
@ -2987,14 +3013,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
|
||||
set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
|
||||
set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
|
||||
set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_V_TSC_AUX) &&
|
||||
(guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP) ||
|
||||
guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDPID))) {
|
||||
set_msr_interception(vcpu, svm->msrpm, MSR_TSC_AUX, 1, 1);
|
||||
if (guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP))
|
||||
svm_clr_intercept(svm, INTERCEPT_RDTSCP);
|
||||
}
|
||||
}
|
||||
|
||||
void sev_init_vmcb(struct vcpu_svm *svm)
|
||||
|
@ -4173,7 +4173,6 @@ static bool svm_has_emulated_msr(struct kvm *kvm, u32 index)
|
||||
static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct vcpu_svm *svm = to_svm(vcpu);
|
||||
struct kvm_cpuid_entry2 *best;
|
||||
|
||||
vcpu->arch.xsaves_enabled = guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
|
||||
boot_cpu_has(X86_FEATURE_XSAVE) &&
|
||||
@ -4198,12 +4197,8 @@ static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
|
||||
|
||||
svm_recalc_instruction_intercepts(vcpu, svm);
|
||||
|
||||
/* For sev guests, the memory encryption bit is not reserved in CR3. */
|
||||
if (sev_guest(vcpu->kvm)) {
|
||||
best = kvm_find_cpuid_entry(vcpu, 0x8000001F);
|
||||
if (best)
|
||||
vcpu->arch.reserved_gpa_bits &= ~(1UL << (best->ebx & 0x3f));
|
||||
}
|
||||
if (sev_guest(vcpu->kvm))
|
||||
sev_vcpu_after_set_cpuid(svm);
|
||||
|
||||
init_vmcb_after_set_cpuid(vcpu);
|
||||
}
|
||||
|
@ -677,6 +677,7 @@ void __init sev_hardware_setup(void);
|
||||
void sev_hardware_unsetup(void);
|
||||
int sev_cpu_init(struct svm_cpu_data *sd);
|
||||
void sev_init_vmcb(struct vcpu_svm *svm);
|
||||
void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm);
|
||||
void sev_free_vcpu(struct kvm_vcpu *vcpu);
|
||||
int sev_handle_vmgexit(struct kvm_vcpu *vcpu);
|
||||
int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in);
|
||||
|
@ -40,7 +40,7 @@
|
||||
#include <asm/idtentry.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq_remapping.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/perf_event.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/mshyperv.h>
|
||||
@ -702,7 +702,6 @@ static int vmx_set_guest_uret_msr(struct vcpu_vmx *vmx,
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
static void crash_vmclear_local_loaded_vmcss(void)
|
||||
{
|
||||
int cpu = raw_smp_processor_id();
|
||||
@ -712,7 +711,6 @@ static void crash_vmclear_local_loaded_vmcss(void)
|
||||
loaded_vmcss_on_cpu_link)
|
||||
vmcs_clear(v->vmcs);
|
||||
}
|
||||
#endif /* CONFIG_KEXEC_CORE */
|
||||
|
||||
static void __loaded_vmcs_clear(void *arg)
|
||||
{
|
||||
@ -8522,10 +8520,9 @@ static void __vmx_exit(void)
|
||||
{
|
||||
allow_smaller_maxphyaddr = false;
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
RCU_INIT_POINTER(crash_vmclear_loaded_vmcss, NULL);
|
||||
synchronize_rcu();
|
||||
#endif
|
||||
|
||||
vmx_cleanup_l1d_flush();
|
||||
}
|
||||
|
||||
@ -8598,10 +8595,9 @@ static int __init vmx_init(void)
|
||||
pi_init_cpu(cpu);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
rcu_assign_pointer(crash_vmclear_loaded_vmcss,
|
||||
crash_vmclear_local_loaded_vmcss);
|
||||
#endif
|
||||
|
||||
vmx_check_vmcs12_offsets();
|
||||
|
||||
/*
|
||||
|
@ -9,8 +9,7 @@
|
||||
|
||||
|
||||
# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)
|
||||
KBUILD_CFLAGS += -fno-builtin -Iarch/$(ARCH)/boot/include
|
||||
HOSTFLAGS += -Iarch/$(ARCH)/boot/include
|
||||
KBUILD_CFLAGS += -fno-builtin
|
||||
|
||||
subdir-y := lib
|
||||
targets += vmlinux.bin vmlinux.bin.gz
|
||||
|
@ -4,13 +4,14 @@
|
||||
/* bits taken from ppc */
|
||||
|
||||
extern void *avail_ram, *end_avail;
|
||||
void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp);
|
||||
|
||||
void exit (void)
|
||||
static void exit(void)
|
||||
{
|
||||
for (;;);
|
||||
}
|
||||
|
||||
void *zalloc(unsigned size)
|
||||
static void *zalloc(unsigned int size)
|
||||
{
|
||||
void *p = avail_ram;
|
||||
|
||||
|
@ -6,6 +6,10 @@
|
||||
|
||||
#include <variant/core.h>
|
||||
|
||||
#ifndef XCHAL_HAVE_DIV32
|
||||
#define XCHAL_HAVE_DIV32 0
|
||||
#endif
|
||||
|
||||
#ifndef XCHAL_HAVE_EXCLUSIVE
|
||||
#define XCHAL_HAVE_EXCLUSIVE 0
|
||||
#endif
|
||||
|
@ -3,7 +3,9 @@
|
||||
#include <asm/asmmacro.h>
|
||||
#include <asm/core.h>
|
||||
|
||||
#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
|
||||
#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32 || XCHAL_HAVE_MAC16
|
||||
#define XCHAL_NO_MUL 0
|
||||
#else
|
||||
#define XCHAL_NO_MUL 1
|
||||
#endif
|
||||
|
||||
|
@ -201,7 +201,7 @@ static int tuntap_write(struct iss_net_private *lp, struct sk_buff **skb)
|
||||
return simc_write(lp->tp.info.tuntap.fd, (*skb)->data, (*skb)->len);
|
||||
}
|
||||
|
||||
unsigned short tuntap_protocol(struct sk_buff *skb)
|
||||
static unsigned short tuntap_protocol(struct sk_buff *skb)
|
||||
{
|
||||
return eth_type_trans(skb, skb->dev);
|
||||
}
|
||||
@ -441,7 +441,7 @@ static int iss_net_change_mtu(struct net_device *dev, int new_mtu)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
void iss_net_user_timer_expire(struct timer_list *unused)
|
||||
static void iss_net_user_timer_expire(struct timer_list *unused)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -4981,17 +4981,19 @@ static void ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
|
||||
struct ata_link *link;
|
||||
unsigned long flags;
|
||||
|
||||
/* Previous resume operation might still be in
|
||||
* progress. Wait for PM_PENDING to clear.
|
||||
*/
|
||||
if (ap->pflags & ATA_PFLAG_PM_PENDING) {
|
||||
ata_port_wait_eh(ap);
|
||||
WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
|
||||
}
|
||||
|
||||
/* request PM ops to EH */
|
||||
spin_lock_irqsave(ap->lock, flags);
|
||||
|
||||
/*
|
||||
* A previous PM operation might still be in progress. Wait for
|
||||
* ATA_PFLAG_PM_PENDING to clear.
|
||||
*/
|
||||
if (ap->pflags & ATA_PFLAG_PM_PENDING) {
|
||||
spin_unlock_irqrestore(ap->lock, flags);
|
||||
ata_port_wait_eh(ap);
|
||||
spin_lock_irqsave(ap->lock, flags);
|
||||
}
|
||||
|
||||
/* Request PM operation to EH */
|
||||
ap->pm_mesg = mesg;
|
||||
ap->pflags |= ATA_PFLAG_PM_PENDING;
|
||||
ata_for_each_link(link, ap, HOST_FIRST) {
|
||||
@ -5003,10 +5005,8 @@ static void ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
|
||||
|
||||
spin_unlock_irqrestore(ap->lock, flags);
|
||||
|
||||
if (!async) {
|
||||
if (!async)
|
||||
ata_port_wait_eh(ap);
|
||||
WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@ -5173,7 +5173,7 @@ EXPORT_SYMBOL_GPL(ata_host_resume);
|
||||
#endif
|
||||
|
||||
const struct device_type ata_port_type = {
|
||||
.name = "ata_port",
|
||||
.name = ATA_PORT_TYPE_NAME,
|
||||
#ifdef CONFIG_PM
|
||||
.pm = &ata_port_pm_ops,
|
||||
#endif
|
||||
@ -5906,11 +5906,30 @@ static void ata_port_detach(struct ata_port *ap)
|
||||
if (!ap->ops->error_handler)
|
||||
goto skip_eh;
|
||||
|
||||
/* tell EH we're leaving & flush EH */
|
||||
/* Wait for any ongoing EH */
|
||||
ata_port_wait_eh(ap);
|
||||
|
||||
mutex_lock(&ap->scsi_scan_mutex);
|
||||
spin_lock_irqsave(ap->lock, flags);
|
||||
|
||||
/* Remove scsi devices */
|
||||
ata_for_each_link(link, ap, HOST_FIRST) {
|
||||
ata_for_each_dev(dev, link, ALL) {
|
||||
if (dev->sdev) {
|
||||
spin_unlock_irqrestore(ap->lock, flags);
|
||||
scsi_remove_device(dev->sdev);
|
||||
spin_lock_irqsave(ap->lock, flags);
|
||||
dev->sdev = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Tell EH to disable all devices */
|
||||
ap->pflags |= ATA_PFLAG_UNLOADING;
|
||||
ata_port_schedule_eh(ap);
|
||||
|
||||
spin_unlock_irqrestore(ap->lock, flags);
|
||||
mutex_unlock(&ap->scsi_scan_mutex);
|
||||
|
||||
/* wait till EH commits suicide */
|
||||
ata_port_wait_eh(ap);
|
||||
|
@ -2704,18 +2704,11 @@ int ata_eh_reset(struct ata_link *link, int classify,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Some controllers can't be frozen very well and may set spurious
|
||||
* error conditions during reset. Clear accumulated error
|
||||
* information and re-thaw the port if frozen. As reset is the
|
||||
* final recovery action and we cross check link onlineness against
|
||||
* device classification later, no hotplug event is lost by this.
|
||||
*/
|
||||
/* clear cached SError */
|
||||
spin_lock_irqsave(link->ap->lock, flags);
|
||||
memset(&link->eh_info, 0, sizeof(link->eh_info));
|
||||
link->eh_info.serror = 0;
|
||||
if (slave)
|
||||
memset(&slave->eh_info, 0, sizeof(link->eh_info));
|
||||
ap->pflags &= ~ATA_PFLAG_EH_PENDING;
|
||||
slave->eh_info.serror = 0;
|
||||
spin_unlock_irqrestore(link->ap->lock, flags);
|
||||
|
||||
if (ap->pflags & ATA_PFLAG_FROZEN)
|
||||
|
@ -1118,6 +1118,42 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ata_scsi_slave_alloc - Early setup of SCSI device
|
||||
* @sdev: SCSI device to examine
|
||||
*
|
||||
* This is called from scsi_alloc_sdev() when the scsi device
|
||||
* associated with an ATA device is scanned on a port.
|
||||
*
|
||||
* LOCKING:
|
||||
* Defined by SCSI layer. We don't really care.
|
||||
*/
|
||||
|
||||
int ata_scsi_slave_alloc(struct scsi_device *sdev)
|
||||
{
|
||||
struct ata_port *ap = ata_shost_to_port(sdev->host);
|
||||
struct device_link *link;
|
||||
|
||||
ata_scsi_sdev_config(sdev);
|
||||
|
||||
/*
|
||||
* Create a link from the ata_port device to the scsi device to ensure
|
||||
* that PM does suspend/resume in the correct order: the scsi device is
|
||||
* consumer (child) and the ata port the supplier (parent).
|
||||
*/
|
||||
link = device_link_add(&sdev->sdev_gendev, &ap->tdev,
|
||||
DL_FLAG_STATELESS |
|
||||
DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
|
||||
if (!link) {
|
||||
ata_port_err(ap, "Failed to create link to scsi device %s\n",
|
||||
dev_name(&sdev->sdev_gendev));
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ata_scsi_slave_alloc);
|
||||
|
||||
/**
|
||||
* ata_scsi_slave_config - Set SCSI device attributes
|
||||
* @sdev: SCSI device to examine
|
||||
@ -1134,14 +1170,11 @@ int ata_scsi_slave_config(struct scsi_device *sdev)
|
||||
{
|
||||
struct ata_port *ap = ata_shost_to_port(sdev->host);
|
||||
struct ata_device *dev = __ata_scsi_find_dev(ap, sdev);
|
||||
int rc = 0;
|
||||
|
||||
ata_scsi_sdev_config(sdev);
|
||||
|
||||
if (dev)
|
||||
rc = ata_scsi_dev_config(sdev, dev);
|
||||
return ata_scsi_dev_config(sdev, dev);
|
||||
|
||||
return rc;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
|
||||
|
||||
@ -1168,6 +1201,8 @@ void ata_scsi_slave_destroy(struct scsi_device *sdev)
|
||||
if (!ap->ops->error_handler)
|
||||
return;
|
||||
|
||||
device_link_remove(&sdev->sdev_gendev, &ap->tdev);
|
||||
|
||||
spin_lock_irqsave(ap->lock, flags);
|
||||
dev = __ata_scsi_find_dev(ap, sdev);
|
||||
if (dev && dev->sdev) {
|
||||
@ -4197,7 +4232,7 @@ void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd)
|
||||
break;
|
||||
|
||||
case MAINTENANCE_IN:
|
||||
if (scsicmd[1] == MI_REPORT_SUPPORTED_OPERATION_CODES)
|
||||
if ((scsicmd[1] & 0x1f) == MI_REPORT_SUPPORTED_OPERATION_CODES)
|
||||
ata_scsi_rbuf_fill(&args, ata_scsiop_maint_in);
|
||||
else
|
||||
ata_scsi_set_invalid_field(dev, cmd, 1, 0xff);
|
||||
|
@ -266,6 +266,10 @@ void ata_tport_delete(struct ata_port *ap)
|
||||
put_device(dev);
|
||||
}
|
||||
|
||||
static const struct device_type ata_port_sas_type = {
|
||||
.name = ATA_PORT_TYPE_NAME,
|
||||
};
|
||||
|
||||
/** ata_tport_add - initialize a transport ATA port structure
|
||||
*
|
||||
* @parent: parent device
|
||||
@ -283,7 +287,10 @@ int ata_tport_add(struct device *parent,
|
||||
struct device *dev = &ap->tdev;
|
||||
|
||||
device_initialize(dev);
|
||||
dev->type = &ata_port_type;
|
||||
if (ap->flags & ATA_FLAG_SAS_HOST)
|
||||
dev->type = &ata_port_sas_type;
|
||||
else
|
||||
dev->type = &ata_port_type;
|
||||
|
||||
dev->parent = parent;
|
||||
ata_host_get(ap->host);
|
||||
|
@ -30,6 +30,8 @@ enum {
|
||||
ATA_DNXFER_QUIET = (1 << 31),
|
||||
};
|
||||
|
||||
#define ATA_PORT_TYPE_NAME "ata_port"
|
||||
|
||||
extern atomic_t ata_print_id;
|
||||
extern int atapi_passthru16;
|
||||
extern int libata_fua;
|
||||
|
@ -1255,8 +1255,8 @@ static void mv_dump_mem(struct device *dev, void __iomem *start, unsigned bytes)
|
||||
|
||||
for (b = 0; b < bytes; ) {
|
||||
for (w = 0, o = 0; b < bytes && w < 4; w++) {
|
||||
o += snprintf(linebuf + o, sizeof(linebuf) - o,
|
||||
"%08x ", readl(start + b));
|
||||
o += scnprintf(linebuf + o, sizeof(linebuf) - o,
|
||||
"%08x ", readl(start + b));
|
||||
b += sizeof(u32);
|
||||
}
|
||||
dev_dbg(dev, "%s: %p: %s\n",
|
||||
|
@ -38,6 +38,7 @@ enum sysc_soc {
|
||||
SOC_2420,
|
||||
SOC_2430,
|
||||
SOC_3430,
|
||||
SOC_AM35,
|
||||
SOC_3630,
|
||||
SOC_4430,
|
||||
SOC_4460,
|
||||
@ -1119,6 +1120,11 @@ static int sysc_enable_module(struct device *dev)
|
||||
if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE |
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT)) {
|
||||
best_mode = SYSC_IDLE_NO;
|
||||
|
||||
/* Clear WAKEUP */
|
||||
if (regbits->enwkup_shift >= 0 &&
|
||||
ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
|
||||
reg &= ~BIT(regbits->enwkup_shift);
|
||||
} else {
|
||||
best_mode = fls(ddata->cfg.sidlemodes) - 1;
|
||||
if (best_mode > SYSC_IDLE_MASK) {
|
||||
@ -1246,6 +1252,13 @@ static int sysc_disable_module(struct device *dev)
|
||||
}
|
||||
}
|
||||
|
||||
if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) {
|
||||
/* Set WAKEUP */
|
||||
if (regbits->enwkup_shift >= 0 &&
|
||||
ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
|
||||
reg |= BIT(regbits->enwkup_shift);
|
||||
}
|
||||
|
||||
reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
|
||||
reg |= best_mode << regbits->sidle_shift;
|
||||
if (regbits->autoidle_shift >= 0 &&
|
||||
@ -1540,16 +1553,16 @@ struct sysc_revision_quirk {
|
||||
static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
||||
/* These drivers need to be fixed to not use pm_runtime_irq_safe() */
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
/* Uarts on omap4 and later */
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
|
||||
|
||||
/* Quirks that need to be set based on the module address */
|
||||
SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
|
||||
@ -1878,7 +1891,7 @@ static void sysc_pre_reset_quirk_dss(struct sysc *ddata)
|
||||
dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
|
||||
__func__, val, irq_mask);
|
||||
|
||||
if (sysc_soc->soc == SOC_3430) {
|
||||
if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) {
|
||||
/* Clear DSS_SDI_CONTROL */
|
||||
sysc_write(ddata, 0x44, 0);
|
||||
|
||||
@ -2166,8 +2179,7 @@ static int sysc_reset(struct sysc *ddata)
|
||||
}
|
||||
|
||||
if (ddata->cfg.srst_udelay)
|
||||
usleep_range(ddata->cfg.srst_udelay,
|
||||
ddata->cfg.srst_udelay * 2);
|
||||
fsleep(ddata->cfg.srst_udelay);
|
||||
|
||||
if (ddata->post_reset_quirk)
|
||||
ddata->post_reset_quirk(ddata);
|
||||
@ -3043,6 +3055,7 @@ static void ti_sysc_idle(struct work_struct *work)
|
||||
static const struct soc_device_attribute sysc_soc_match[] = {
|
||||
SOC_FLAG("OMAP242*", SOC_2420),
|
||||
SOC_FLAG("OMAP243*", SOC_2430),
|
||||
SOC_FLAG("AM35*", SOC_AM35),
|
||||
SOC_FLAG("OMAP3[45]*", SOC_3430),
|
||||
SOC_FLAG("OMAP3[67]*", SOC_3630),
|
||||
SOC_FLAG("OMAP443*", SOC_4430),
|
||||
@ -3249,7 +3262,7 @@ static int sysc_check_active_timer(struct sysc *ddata)
|
||||
* can be dropped if we stop supporting old beagleboard revisions
|
||||
* A to B4 at some point.
|
||||
*/
|
||||
if (sysc_soc->soc == SOC_3430)
|
||||
if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35)
|
||||
error = -ENXIO;
|
||||
else
|
||||
error = -EBUSY;
|
||||
|
@ -394,8 +394,6 @@ find_quicksilver(struct device *dev, void *data)
|
||||
static int __init
|
||||
parisc_agp_init(void)
|
||||
{
|
||||
extern struct sba_device *sba_list;
|
||||
|
||||
int err = -1;
|
||||
struct parisc_device *sba = NULL, *lba = NULL;
|
||||
struct lba_device *lbadev = NULL;
|
||||
|
@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
|
||||
0x250, 0, 3, UMS512_MUX_FLAG);
|
||||
|
||||
static const struct clk_parent_data thm_parents[] = {
|
||||
{ .fw_name = "ext-32m" },
|
||||
{ .fw_name = "ext-32k" },
|
||||
{ .hw = &clk_250k.hw },
|
||||
};
|
||||
static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,
|
||||
|
@ -159,7 +159,7 @@ static unsigned long tegra_bpmp_clk_recalc_rate(struct clk_hw *hw,
|
||||
|
||||
err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
|
||||
if (err < 0)
|
||||
return err;
|
||||
return 0;
|
||||
|
||||
return response.rate;
|
||||
}
|
||||
|
@ -397,6 +397,19 @@ static u32 ffa_get_num_pages_sg(struct scatterlist *sg)
|
||||
return num_pages;
|
||||
}
|
||||
|
||||
static u8 ffa_memory_attributes_get(u32 func_id)
|
||||
{
|
||||
/*
|
||||
* For the memory lend or donate operation, if the receiver is a PE or
|
||||
* a proxy endpoint, the owner/sender must not specify the attributes
|
||||
*/
|
||||
if (func_id == FFA_FN_NATIVE(MEM_LEND) ||
|
||||
func_id == FFA_MEM_LEND)
|
||||
return 0;
|
||||
|
||||
return FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK | FFA_MEM_INNER_SHAREABLE;
|
||||
}
|
||||
|
||||
static int
|
||||
ffa_setup_and_transmit(u32 func_id, void *buffer, u32 max_fragsize,
|
||||
struct ffa_mem_ops_args *args)
|
||||
@ -413,8 +426,7 @@ ffa_setup_and_transmit(u32 func_id, void *buffer, u32 max_fragsize,
|
||||
mem_region->tag = args->tag;
|
||||
mem_region->flags = args->flags;
|
||||
mem_region->sender_id = drv_info->vm_id;
|
||||
mem_region->attributes = FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK |
|
||||
FFA_MEM_INNER_SHAREABLE;
|
||||
mem_region->attributes = ffa_memory_attributes_get(func_id);
|
||||
ep_mem_access = &mem_region->ep_mem_access[0];
|
||||
|
||||
for (idx = 0; idx < args->nattrs; idx++, ep_mem_access++) {
|
||||
|
@ -139,7 +139,7 @@ struct perf_dom_info {
|
||||
|
||||
struct scmi_perf_info {
|
||||
u32 version;
|
||||
int num_domains;
|
||||
u16 num_domains;
|
||||
enum scmi_power_scale power_scale;
|
||||
u64 stats_addr;
|
||||
u32 stats_size;
|
||||
@ -356,11 +356,26 @@ static int scmi_perf_mb_limits_set(const struct scmi_protocol_handle *ph,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline struct perf_dom_info *
|
||||
scmi_perf_domain_lookup(const struct scmi_protocol_handle *ph, u32 domain)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
|
||||
if (domain >= pi->num_domains)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
return pi->dom_info + domain;
|
||||
}
|
||||
|
||||
static int scmi_perf_limits_set(const struct scmi_protocol_handle *ph,
|
||||
u32 domain, u32 max_perf, u32 min_perf)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
struct perf_dom_info *dom;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
if (PROTOCOL_REV_MAJOR(pi->version) >= 0x3 && !max_perf && !min_perf)
|
||||
return -EINVAL;
|
||||
@ -408,8 +423,11 @@ static int scmi_perf_mb_limits_get(const struct scmi_protocol_handle *ph,
|
||||
static int scmi_perf_limits_get(const struct scmi_protocol_handle *ph,
|
||||
u32 domain, u32 *max_perf, u32 *min_perf)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
struct perf_dom_info *dom;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
if (dom->fc_info && dom->fc_info[PERF_FC_LIMIT].get_addr) {
|
||||
struct scmi_fc_info *fci = &dom->fc_info[PERF_FC_LIMIT];
|
||||
@ -449,8 +467,11 @@ static int scmi_perf_mb_level_set(const struct scmi_protocol_handle *ph,
|
||||
static int scmi_perf_level_set(const struct scmi_protocol_handle *ph,
|
||||
u32 domain, u32 level, bool poll)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
struct perf_dom_info *dom;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
if (dom->fc_info && dom->fc_info[PERF_FC_LEVEL].set_addr) {
|
||||
struct scmi_fc_info *fci = &dom->fc_info[PERF_FC_LEVEL];
|
||||
@ -490,8 +511,11 @@ static int scmi_perf_mb_level_get(const struct scmi_protocol_handle *ph,
|
||||
static int scmi_perf_level_get(const struct scmi_protocol_handle *ph,
|
||||
u32 domain, u32 *level, bool poll)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
struct perf_dom_info *dom;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
if (dom->fc_info && dom->fc_info[PERF_FC_LEVEL].get_addr) {
|
||||
*level = ioread32(dom->fc_info[PERF_FC_LEVEL].get_addr);
|
||||
@ -574,13 +598,14 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph,
|
||||
unsigned long freq;
|
||||
struct scmi_opp *opp;
|
||||
struct perf_dom_info *dom;
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
|
||||
domain = scmi_dev_domain_id(dev);
|
||||
if (domain < 0)
|
||||
return domain;
|
||||
return -EINVAL;
|
||||
|
||||
dom = pi->dom_info + domain;
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) {
|
||||
freq = opp->perf * dom->mult_factor;
|
||||
@ -603,14 +628,17 @@ static int
|
||||
scmi_dvfs_transition_latency_get(const struct scmi_protocol_handle *ph,
|
||||
struct device *dev)
|
||||
{
|
||||
int domain;
|
||||
struct perf_dom_info *dom;
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
int domain = scmi_dev_domain_id(dev);
|
||||
|
||||
domain = scmi_dev_domain_id(dev);
|
||||
if (domain < 0)
|
||||
return domain;
|
||||
return -EINVAL;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
dom = pi->dom_info + domain;
|
||||
/* uS to nS */
|
||||
return dom->opp[dom->opp_count - 1].trans_latency_us * 1000;
|
||||
}
|
||||
@ -618,8 +646,11 @@ scmi_dvfs_transition_latency_get(const struct scmi_protocol_handle *ph,
|
||||
static int scmi_dvfs_freq_set(const struct scmi_protocol_handle *ph, u32 domain,
|
||||
unsigned long freq, bool poll)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
struct perf_dom_info *dom;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
return scmi_perf_level_set(ph, domain, freq / dom->mult_factor, poll);
|
||||
}
|
||||
@ -630,11 +661,14 @@ static int scmi_dvfs_freq_get(const struct scmi_protocol_handle *ph, u32 domain,
|
||||
int ret;
|
||||
u32 level;
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
|
||||
ret = scmi_perf_level_get(ph, domain, &level, poll);
|
||||
if (!ret)
|
||||
if (!ret) {
|
||||
struct perf_dom_info *dom = pi->dom_info + domain;
|
||||
|
||||
/* Note domain is validated implicitly by scmi_perf_level_get */
|
||||
*freq = level * dom->mult_factor;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -643,15 +677,14 @@ static int scmi_dvfs_est_power_get(const struct scmi_protocol_handle *ph,
|
||||
u32 domain, unsigned long *freq,
|
||||
unsigned long *power)
|
||||
{
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
struct perf_dom_info *dom;
|
||||
unsigned long opp_freq;
|
||||
int idx, ret = -EINVAL;
|
||||
struct scmi_opp *opp;
|
||||
|
||||
dom = pi->dom_info + domain;
|
||||
if (!dom)
|
||||
return -EIO;
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return PTR_ERR(dom);
|
||||
|
||||
for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) {
|
||||
opp_freq = opp->perf * dom->mult_factor;
|
||||
@ -670,10 +703,16 @@ static int scmi_dvfs_est_power_get(const struct scmi_protocol_handle *ph,
|
||||
static bool scmi_fast_switch_possible(const struct scmi_protocol_handle *ph,
|
||||
struct device *dev)
|
||||
{
|
||||
int domain;
|
||||
struct perf_dom_info *dom;
|
||||
struct scmi_perf_info *pi = ph->get_priv(ph);
|
||||
|
||||
dom = pi->dom_info + scmi_dev_domain_id(dev);
|
||||
domain = scmi_dev_domain_id(dev);
|
||||
if (domain < 0)
|
||||
return false;
|
||||
|
||||
dom = scmi_perf_domain_lookup(ph, domain);
|
||||
if (IS_ERR(dom))
|
||||
return false;
|
||||
|
||||
return dom->fc_info && dom->fc_info[PERF_FC_LEVEL].set_addr;
|
||||
}
|
||||
@ -819,6 +858,8 @@ static int scmi_perf_protocol_init(const struct scmi_protocol_handle *ph)
|
||||
if (!pinfo)
|
||||
return -ENOMEM;
|
||||
|
||||
pinfo->version = version;
|
||||
|
||||
ret = scmi_perf_attributes_get(ph, pinfo);
|
||||
if (ret)
|
||||
return ret;
|
||||
@ -838,8 +879,6 @@ static int scmi_perf_protocol_init(const struct scmi_protocol_handle *ph)
|
||||
scmi_perf_domain_init_fc(ph, domain, &dom->fc_info);
|
||||
}
|
||||
|
||||
pinfo->version = version;
|
||||
|
||||
return ph->set_priv(ph, pinfo);
|
||||
}
|
||||
|
||||
|
@ -1821,15 +1821,15 @@ static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp)
|
||||
return PTR_ERR(adsp2_alg);
|
||||
|
||||
for (i = 0; i < n_algs; i++) {
|
||||
cs_dsp_info(dsp,
|
||||
"%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
|
||||
i, be32_to_cpu(adsp2_alg[i].alg.id),
|
||||
(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
|
||||
(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
|
||||
be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
|
||||
be32_to_cpu(adsp2_alg[i].xm),
|
||||
be32_to_cpu(adsp2_alg[i].ym),
|
||||
be32_to_cpu(adsp2_alg[i].zm));
|
||||
cs_dsp_dbg(dsp,
|
||||
"%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
|
||||
i, be32_to_cpu(adsp2_alg[i].alg.id),
|
||||
(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
|
||||
(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
|
||||
be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
|
||||
be32_to_cpu(adsp2_alg[i].xm),
|
||||
be32_to_cpu(adsp2_alg[i].ym),
|
||||
be32_to_cpu(adsp2_alg[i].zm));
|
||||
|
||||
alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM,
|
||||
adsp2_alg[i].alg.id,
|
||||
@ -1954,14 +1954,14 @@ static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp)
|
||||
return PTR_ERR(halo_alg);
|
||||
|
||||
for (i = 0; i < n_algs; i++) {
|
||||
cs_dsp_info(dsp,
|
||||
"%d: ID %x v%d.%d.%d XM@%x YM@%x\n",
|
||||
i, be32_to_cpu(halo_alg[i].alg.id),
|
||||
(be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16,
|
||||
(be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8,
|
||||
be32_to_cpu(halo_alg[i].alg.ver) & 0xff,
|
||||
be32_to_cpu(halo_alg[i].xm_base),
|
||||
be32_to_cpu(halo_alg[i].ym_base));
|
||||
cs_dsp_dbg(dsp,
|
||||
"%d: ID %x v%d.%d.%d XM@%x YM@%x\n",
|
||||
i, be32_to_cpu(halo_alg[i].alg.id),
|
||||
(be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16,
|
||||
(be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8,
|
||||
be32_to_cpu(halo_alg[i].alg.ver) & 0xff,
|
||||
be32_to_cpu(halo_alg[i].xm_base),
|
||||
be32_to_cpu(halo_alg[i].ym_base));
|
||||
|
||||
ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id,
|
||||
halo_alg[i].alg.ver,
|
||||
|
@ -115,6 +115,7 @@ static int imx_dsp_setup_channels(struct imx_dsp_ipc *dsp_ipc)
|
||||
dsp_chan->idx = i % 2;
|
||||
dsp_chan->ch = mbox_request_channel_byname(cl, chan_name);
|
||||
if (IS_ERR(dsp_chan->ch)) {
|
||||
kfree(dsp_chan->name);
|
||||
ret = PTR_ERR(dsp_chan->ch);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to request mbox chan %s ret %d\n",
|
||||
|
@ -337,6 +337,7 @@ static int sprd_pmic_eic_probe(struct platform_device *pdev)
|
||||
pmic_eic->chip.set_config = sprd_pmic_eic_set_config;
|
||||
pmic_eic->chip.set = sprd_pmic_eic_set;
|
||||
pmic_eic->chip.get = sprd_pmic_eic_get;
|
||||
pmic_eic->chip.can_sleep = true;
|
||||
|
||||
pmic_eic->intc.name = dev_name(&pdev->dev);
|
||||
pmic_eic->intc.irq_mask = sprd_pmic_eic_irq_mask;
|
||||
|
@ -195,7 +195,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev)
|
||||
handle_edge_irq, IRQ_NOREQUEST, IRQ_NOPROBE,
|
||||
IRQ_GC_INIT_MASK_CACHE);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err_remove_domain;
|
||||
|
||||
gc = tb10x_gpio->domain->gc->gc[0];
|
||||
gc->reg_base = tb10x_gpio->base;
|
||||
@ -209,6 +209,10 @@ static int tb10x_gpio_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_remove_domain:
|
||||
irq_domain_remove(tb10x_gpio->domain);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int tb10x_gpio_remove(struct platform_device *pdev)
|
||||
|
@ -896,12 +896,17 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
|
||||
struct atom_context *atom_context;
|
||||
|
||||
atom_context = adev->mode_info.atom_context;
|
||||
memcpy(vbios_info.name, atom_context->name, sizeof(atom_context->name));
|
||||
memcpy(vbios_info.vbios_pn, atom_context->vbios_pn, sizeof(atom_context->vbios_pn));
|
||||
vbios_info.version = atom_context->version;
|
||||
memcpy(vbios_info.vbios_ver_str, atom_context->vbios_ver_str,
|
||||
sizeof(atom_context->vbios_ver_str));
|
||||
memcpy(vbios_info.date, atom_context->date, sizeof(atom_context->date));
|
||||
if (atom_context) {
|
||||
memcpy(vbios_info.name, atom_context->name,
|
||||
sizeof(atom_context->name));
|
||||
memcpy(vbios_info.vbios_pn, atom_context->vbios_pn,
|
||||
sizeof(atom_context->vbios_pn));
|
||||
vbios_info.version = atom_context->version;
|
||||
memcpy(vbios_info.vbios_ver_str, atom_context->vbios_ver_str,
|
||||
sizeof(atom_context->vbios_ver_str));
|
||||
memcpy(vbios_info.date, atom_context->date,
|
||||
sizeof(atom_context->date));
|
||||
}
|
||||
|
||||
return copy_to_user(out, &vbios_info,
|
||||
min((size_t)size, sizeof(vbios_info))) ? -EFAULT : 0;
|
||||
|
@ -344,6 +344,9 @@ static void nbio_v4_3_init_registers(struct amdgpu_device *adev)
|
||||
data &= ~RCC_DEV0_EPF2_STRAP2__STRAP_NO_SOFT_RESET_DEV0_F2_MASK;
|
||||
WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);
|
||||
}
|
||||
if (amdgpu_sriov_vf(adev))
|
||||
adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
|
||||
regBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
|
||||
}
|
||||
|
||||
static u32 nbio_v4_3_get_rom_offset(struct amdgpu_device *adev)
|
||||
|
@ -755,7 +755,7 @@ static int soc21_common_hw_init(void *handle)
|
||||
* for the purpose of expose those registers
|
||||
* to process space
|
||||
*/
|
||||
if (adev->nbio.funcs->remap_hdp_registers)
|
||||
if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev))
|
||||
adev->nbio.funcs->remap_hdp_registers(adev);
|
||||
/* enable the doorbell aperture */
|
||||
soc21_enable_doorbell_aperture(adev, true);
|
||||
|
@ -201,7 +201,7 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
|
||||
|
||||
if (q->wptr_bo) {
|
||||
wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1);
|
||||
queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off;
|
||||
queue_input.wptr_mc_addr = amdgpu_bo_gpu_offset(q->wptr_bo) + wptr_addr_off;
|
||||
}
|
||||
|
||||
queue_input.is_kfd_process = 1;
|
||||
|
@ -1349,9 +1349,8 @@ void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type);
|
||||
|
||||
static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev)
|
||||
{
|
||||
return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
|
||||
(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) &&
|
||||
dev->adev->sdma.instance[0].fw_version >= 18) ||
|
||||
return KFD_GC_VERSION(dev) > IP_VERSION(9, 4, 2) ||
|
||||
(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) ||
|
||||
KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
|
||||
}
|
||||
|
||||
|
@ -973,7 +973,9 @@ void dce110_edp_backlight_control(
|
||||
return;
|
||||
}
|
||||
|
||||
if (link->panel_cntl) {
|
||||
if (link->panel_cntl && !(link->dpcd_sink_ext_caps.bits.oled ||
|
||||
link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
|
||||
link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1)) {
|
||||
bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
|
||||
|
||||
if ((enable && is_backlight_on) || (!enable && !is_backlight_on)) {
|
||||
|
@ -643,7 +643,9 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
|
||||
|
||||
dsi->lanes = dsi_lanes;
|
||||
dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST;
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
||||
MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
|
||||
MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
|
||||
|
||||
ret = devm_mipi_dsi_attach(dev, dsi);
|
||||
if (ret < 0) {
|
||||
|
@ -541,7 +541,6 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id,
|
||||
DRIVER_CAPS(i915)->has_logical_contexts = true;
|
||||
|
||||
ewma__engine_latency_init(&engine->latency);
|
||||
seqcount_init(&engine->stats.execlists.lock);
|
||||
|
||||
ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier);
|
||||
|
||||
|
@ -3546,6 +3546,8 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine)
|
||||
logical_ring_default_vfuncs(engine);
|
||||
logical_ring_default_irqs(engine);
|
||||
|
||||
seqcount_init(&engine->stats.execlists.lock);
|
||||
|
||||
if (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)
|
||||
rcs_submission_override(engine);
|
||||
|
||||
|
@ -500,20 +500,31 @@ void intel_ggtt_unbind_vma(struct i915_address_space *vm,
|
||||
vm->clear_range(vm, vma_res->start, vma_res->vma_size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Reserve the top of the GuC address space for firmware images. Addresses
|
||||
* beyond GUC_GGTT_TOP in the GuC address space are inaccessible by GuC,
|
||||
* which makes for a suitable range to hold GuC/HuC firmware images if the
|
||||
* size of the GGTT is 4G. However, on a 32-bit platform the size of the GGTT
|
||||
* is limited to 2G, which is less than GUC_GGTT_TOP, but we reserve a chunk
|
||||
* of the same size anyway, which is far more than needed, to keep the logic
|
||||
* in uc_fw_ggtt_offset() simple.
|
||||
*/
|
||||
#define GUC_TOP_RESERVE_SIZE (SZ_4G - GUC_GGTT_TOP)
|
||||
|
||||
static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
|
||||
{
|
||||
u64 size;
|
||||
u64 offset;
|
||||
int ret;
|
||||
|
||||
if (!intel_uc_uses_guc(&ggtt->vm.gt->uc))
|
||||
return 0;
|
||||
|
||||
GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
|
||||
size = ggtt->vm.total - GUC_GGTT_TOP;
|
||||
GEM_BUG_ON(ggtt->vm.total <= GUC_TOP_RESERVE_SIZE);
|
||||
offset = ggtt->vm.total - GUC_TOP_RESERVE_SIZE;
|
||||
|
||||
ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &ggtt->uc_fw, size,
|
||||
GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
|
||||
PIN_NOEVICT);
|
||||
ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &ggtt->uc_fw,
|
||||
GUC_TOP_RESERVE_SIZE, offset,
|
||||
I915_COLOR_UNEVICTABLE, PIN_NOEVICT);
|
||||
if (ret)
|
||||
drm_dbg(&ggtt->vm.i915->drm,
|
||||
"Failed to reserve top of GGTT for GuC\n");
|
||||
|
@ -332,6 +332,8 @@ static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,
|
||||
return;
|
||||
|
||||
cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
|
||||
|
||||
kfree(edid);
|
||||
} else
|
||||
cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
|
||||
}
|
||||
|
@ -939,7 +939,7 @@ static void drm_test_mm_insert_range(struct kunit *test)
|
||||
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max - 1));
|
||||
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max / 2));
|
||||
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,
|
||||
max / 2, max / 2));
|
||||
max / 2, max));
|
||||
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,
|
||||
max / 4 + 1, 3 * max / 4 - 1));
|
||||
|
||||
|
@ -1754,6 +1754,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
|
||||
"SMBus I801 adapter at %04lx", priv->smba);
|
||||
err = i2c_add_adapter(&priv->adapter);
|
||||
if (err) {
|
||||
platform_device_unregister(priv->tco_pdev);
|
||||
i801_acpi_remove(priv);
|
||||
return err;
|
||||
}
|
||||
|
@ -696,6 +696,7 @@ static void npcm_i2c_callback(struct npcm_i2c *bus,
|
||||
{
|
||||
struct i2c_msg *msgs;
|
||||
int msgs_num;
|
||||
bool do_complete = false;
|
||||
|
||||
msgs = bus->msgs;
|
||||
msgs_num = bus->msgs_num;
|
||||
@ -724,23 +725,17 @@ static void npcm_i2c_callback(struct npcm_i2c *bus,
|
||||
msgs[1].flags & I2C_M_RD)
|
||||
msgs[1].len = info;
|
||||
}
|
||||
if (completion_done(&bus->cmd_complete) == false)
|
||||
complete(&bus->cmd_complete);
|
||||
break;
|
||||
|
||||
do_complete = true;
|
||||
break;
|
||||
case I2C_NACK_IND:
|
||||
/* MASTER transmit got a NACK before tx all bytes */
|
||||
bus->cmd_err = -ENXIO;
|
||||
if (bus->master_or_slave == I2C_MASTER)
|
||||
complete(&bus->cmd_complete);
|
||||
|
||||
do_complete = true;
|
||||
break;
|
||||
case I2C_BUS_ERR_IND:
|
||||
/* Bus error */
|
||||
bus->cmd_err = -EAGAIN;
|
||||
if (bus->master_or_slave == I2C_MASTER)
|
||||
complete(&bus->cmd_complete);
|
||||
|
||||
do_complete = true;
|
||||
break;
|
||||
case I2C_WAKE_UP_IND:
|
||||
/* I2C wake up */
|
||||
@ -754,6 +749,8 @@ static void npcm_i2c_callback(struct npcm_i2c *bus,
|
||||
if (bus->slave)
|
||||
bus->master_or_slave = I2C_SLAVE;
|
||||
#endif
|
||||
if (do_complete)
|
||||
complete(&bus->cmd_complete);
|
||||
}
|
||||
|
||||
static u8 npcm_i2c_fifo_usage(struct npcm_i2c *bus)
|
||||
|
@ -420,7 +420,7 @@ static irqreturn_t xiic_process(int irq, void *dev_id)
|
||||
* reset the IP instead of just flush fifos
|
||||
*/
|
||||
ret = xiic_reinit(i2c);
|
||||
if (!ret)
|
||||
if (ret < 0)
|
||||
dev_dbg(i2c->adap.dev.parent, "reinit failed\n");
|
||||
|
||||
if (i2c->rx_msg) {
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user