drivers:iio:stm:tmos:st_sths34pf80: Add support to TMOS ST MEMS driver

Add support of TMOS ST MEMS IIO sensor with the following features:

 - Tobject sensor data (compensation can be enabled / disabled)
 - Tambient sensor data
 - Tpresence sensor data and event generation
 - Tmotion sensor data and event generation
 - Tambient_shock sensor data and event generation
 - LPF configurable
 - Hysteresis and Threshold setting
 - Supported ODR are 0.25, 0.5, 1, 2, 4, 8, 15 and 30 Hz
 - Support reset algo procedure

Signed-off-by: Mario Tesi <mario.tesi@st.com>
Change-Id: I74b8b50baf91693230a195300b3660591d32605e
Reviewed-on: https://gerrit.st.com/c/linuxandroidopen/stm-ldd-iio/+/315094
Tested-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Matteo DAMENO <matteo.dameno@st.com>

Documentation/devicetree/bindings/iio/stm/tmos/sths34pf80.txt

@@ -0,0 +1,47 @@
+* sths34pf80 driver for TMOS MEMS sensors
+
+Required properties for bindings:
+- compatible: must be "st,sths34pf80"
+
+Required properties for the i2c bindings:
+- reg: i2c slave address.
+
+Required properties for the spi bindings:
+- reg:               the SPI chip select index.
+- spi-max-frequency: maximal bus speed, should be set to 10000000 unless
+                     constrained by external circuitry.
+- spi-3wire:         device supports 3-wire SPI communication only.
+
+Optional properties for all bus drivers:
+- interrupt-parent:  identifies the controller node as interrupt-parent
+                     (please see kernel Documentation).
+- interrupts:        interrupt pin (please see kernel Documentation).
+- vdd-supply:        an optional regulator that needs to be on to provide VDD
+                     power to the sensor.
+- vddio-supply:      an optional regulator that needs to be on to provide the
+                     VDD IO power to the sensor.
+- interrupts:        interrupt mapping for IRQ. It should be configured
+                     with flags IRQ_TYPE_EDGE_BOTH.
+
+                     Refer to interrupt-controller/interrupts.txt for
+                     generic interrupt client node bindings.
+
+Example for an i2c device node (i2c address 0x5a):
+
+sths34pf80@5a {
+	compatible = "st,sths34pf80";
+	reg = <0x5a>;
+	interrupt-parent = <&gpio>;
+	interrupts = <26 IRQ_TYPE_EDGE_BOTH>;
+};
+
+Example for an spi device node:
+
+sths34pf80@0 {
+	spi-max-frequency = <1000000>;
+	compatible = "st,sths34pf80";
+	reg = <0>;
+	spi-3wire;
+	interrupt-parent = <&gpio>;
+	interrupts = <13 IRQ_TYPE_EDGE_BOTH>;
+};

drivers/iio/stm/Kconfig

@@ -14,6 +14,7 @@ source "drivers/iio/stm/imu/Kconfig"
 source "drivers/iio/stm/magnetometer/Kconfig"
 source "drivers/iio/stm/pressure/Kconfig"
 source "drivers/iio/stm/temperature/Kconfig"
+source "drivers/iio/stm/tmos/Kconfig"
 
 endif # IIO_STM
 

drivers/iio/stm/Makefile

@@ -9,3 +9,4 @@ obj-$(CONFIG_IIO_STM) += imu/
 obj-$(CONFIG_IIO_STM) += magnetometer/
 obj-$(CONFIG_IIO_STM) += pressure/
 obj-$(CONFIG_IIO_STM) += temperature/
+obj-$(CONFIG_IIO_STM) += tmos/

drivers/iio/stm/tmos/Kconfig

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# IIO tmos drivers configuration
+#
+# When adding new entries keep the list in alphabetical order
+
+menu "Tmos"
+
+source "drivers/iio/stm/tmos/st_sths34pf80/Kconfig"
+
+endmenu

drivers/iio/stm/tmos/Makefile

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Makefile for Tmos
+#
+
+# When adding new entries keep the list in alphabetical order
+obj-y += st_sths34pf80/

drivers/iio/stm/tmos/st_sths34pf80/Kconfig

@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config IIO_ST_STHS34PF80
+	tristate "STMicroelectronics STHS34PF80 sensor"
+	depends on (I2C || SPI)
+	select IIO_BUFFER
+	select IIO_KFIFO_BUF
+	select IIO_ST_STHS34PF80_I2C if (I2C)
+	select IIO_ST_STHS34PF80_SPI if (SPI_MASTER)
+	help
+	  Say yes here to build support for STMicroelectronics
+	  STHS34PF80 tmos sensor.
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called st_sths34pf80.
+
+config IIO_ST_STHS34PF80_I2C
+	tristate
+	select REGMAP_I2C
+	depends on IIO_ST_STHS34PF80
+
+config IIO_ST_STHS34PF80_SPI
+	tristate
+	select REGMAP_SPI
+	depends on IIO_ST_STHS34PF80

drivers/iio/stm/tmos/st_sths34pf80/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+obj-$(CONFIG_IIO_ST_STHS34PF80) += st_sths34pf80_core.o
+obj-$(CONFIG_IIO_ST_STHS34PF80_I2C) += st_sths34pf80_i2c.o
+obj-$(CONFIG_IIO_ST_STHS34PF80_SPI) += st_sths34pf80_spi.o

drivers/iio/stm/tmos/st_sths34pf80/st_sths34pf80.h

@@ -0,0 +1,403 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * STMicroelectronics st_sths34pf80 sensor driver
+ *
+ * MEMS Software Solutions Team
+ *
+ * Copyright 2022 STMicroelectronics Inc.
+ */
+
+#ifndef ST_STHS34PF80_H
+#define ST_STHS34PF80_H
+
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/iio/iio.h>
+#include <linux/regmap.h>
+
+#define ST_STHS34PF80_TCOMP
+
+#define ST_STHS34PF80_ODR_EXPAND(odr, uodr)	(((odr) * 1000000) + (uodr))
+
+#define ST_STHS34PF80_DEV_NAME			"sths34pf80"
+
+/* register map */
+#define ST_STHS34PF80_LPF1_ADDR			0x0c
+#define ST_STHS34PF80_LPF_P_M_MASK		GENMASK(5, 3)
+#define ST_STHS34PF80_LPF_M_MASK		GENMASK(2, 0)
+
+#define ST_STHS34PF80_LPF2_ADDR			0x0d
+#define ST_STHS34PF80_LPF_P_MASK		GENMASK(5, 3)
+#define ST_STHS34PF80_LPF_A_T_MASK		GENMASK(2, 0)
+
+#define ST_STHS34PF80_WHOAMI_ADDR		0x0f
+#define ST_STHS34PF80_WHOAMI_VAL		0xd3
+
+#define ST_STHS34PF80_AVG_TRIM_ADDR		0x10
+#define ST_STHS34PF80_AVG_T_MASK		GENMASK(5, 4)
+#define ST_STHS34PF80_AVG_TMOS_MASK		GENMASK(2, 0)
+
+#define ST_STHS34PF80_SENSITIVITY_DATA_ADDR	0x1d
+
+#define ST_STHS34PF80_CTRL1_ADDR		0x20
+#define ST_STHS34PF80_BDU_MASK			BIT(4)
+#define ST_STHS34PF80_ODR_MASK			GENMASK(3, 0)
+
+#define ST_STHS34PF80_CTRL2_ADDR		0x21
+#define ST_STHS34PF80_BOOT_MASK			BIT(7)
+#define ST_STHS34PF80_FUNC_CFG_ACCESS_MASK	BIT(4)
+#define ST_STHS34PF80_ONE_SHOT_MASK		BIT(0)
+
+#define ST_STHS34PF80_CTRL3_ADDR		0x22
+#define ST_STHS34PF80_INT_H_L_MASK		BIT(7)
+#define ST_STHS34PF80_PP_OD_MASK		BIT(6)
+#define ST_STHS34PF80_INT_MSK_MASK		GENMASK(5, 3)
+#define ST_STHS34PF80_INT_MSK2_MASK		BIT(5)
+#define ST_STHS34PF80_INT_MSK1_MASK		BIT(4)
+#define ST_STHS34PF80_INT_MSK0_MASK		BIT(3)
+#define ST_STHS34PF80_INT_LATCHED_MASK		BIT(2)
+#define ST_STHS34PF80_IEN_MASK			GENMASK(1, 0)
+
+#define ST_STHS34PF80_IEN_DRDY_VAL		0x01
+#define ST_STHS34PF80_IEN_INT_OR_VAL		0x02
+
+#define ST_STHS34PF80_STATUS_ADDR		0x23
+#define ST_STHS34PF80_DRDY_MASK			BIT(2)
+
+#define ST_STHS34PF80_FUNC_STATUS_ADDR		0x25
+#define ST_STHS34PF80_PRES_FLAG_MASK		BIT(2)
+#define ST_STHS34PF80_MOT_FLAG_MASK		BIT(1)
+#define ST_STHS34PF80_TAMB_SHOCK_FLAG_MASK	BIT(0)
+
+#define ST_STHS34PF80_TOBJECT_L_ADDR		0x26
+#define ST_STHS34PF80_TAMBIENT_L_ADDR		0x28
+
+#ifdef ST_STHS34PF80_TCOMP
+#define ST_STHS34PF80_TOBJECT_COMP_L_ADDR	0x38
+#endif /* ST_STHS34PF80_TCOMP */
+
+#define ST_STHS34PF80_TPRESENCE_L_ADDR		0x3a
+#define ST_STHS34PF80_TMOTION_L_ADDR		0x3c
+#define ST_STHS34PF80_TAMB_SHOCK_L_ADDR		0x3e
+
+/* embedded functions register map */
+#define ST_STHS34PF80_FUNC_CFG_ADDR_ADDR	0x08
+#define ST_STHS34PF80_FUNC_CFG_DATA_ADDR	0x09
+
+#define ST_STHS34PF80_PAGE_RW_ADDR		0x11
+#define ST_STHS34PF80_FUNC_CFG_WRITE_MASK	BIT(6)
+#define ST_STHS34PF80_FUNC_CFG_READ_MASK	BIT(5)
+
+#define ST_STHS34PF80_PRESENCE_THS_ADDR		0x20
+#define ST_STHS34PF80_MOTION_THS_ADDR		0x22
+#define ST_STHS34PF80_TAMB_SHOCK_THS_ADDR	0x24
+#define ST_STHS34PF80_HYST_MOTION_ADDR		0x26
+#define ST_STHS34PF80_HYST_PRESENCE_ADDR	0x27
+
+#define ST_STHS34PF80_ALGO_CONFIG_ADDR		0x28
+#define ST_STHS34PF80_INT_PULSED_MASK		BIT(3)
+#define ST_STHS34PF80_COMP_TYPE_MASK		BIT(2)
+#define ST_STHS34PF80_SEL_ABS_MASK		BIT(1)
+
+#define ST_STHS34PF80_HYST_TAMB_SHOCK_ADDR	0x29
+
+#define ST_STHS34PF80_RESET_ALGO_ADDR		0x2a
+#define ST_STHS34PF80_ALGO_ENABLE_RESET_MASK	BIT(0)
+
+/* default values */
+#define ST_STHS34PF80_TOBJECT_GAIN		2000
+
+#ifdef ST_STHS34PF80_TCOMP
+#define ST_STHS34PF80_TOBJECT_COMP_GAIN		2000
+#endif /* ST_STHS34PF80_TCOMP */
+
+#define ST_STHS34PF80_TAMBIENT_GAIN		100
+
+#define ST_STHS34PF80_LPF_M_DEFAULT		0x04
+#define ST_STHS34PF80_LPF_P_M_DEFAULT		0x00
+#define ST_STHS34PF80_LPF_P_DEFAULT		0x04
+#define ST_STHS34PF80_LPF_A_T_DEFAULT		0x02
+
+#define ST_STHS34PF80_PRESENCE_THS_DEFAULT	0x00c8
+#define ST_STHS34PF80_MOTION_THS_DEFAULT	0x00c8
+#define ST_STHS34PF80_TAMB_SHOCK_THS_DEFAULT	0x000a
+
+#define ST_STHS34PF80_HYST_MOTION_DEFAULT	0x32
+#define ST_STHS34PF80_HYST_PRESENCE_DEFAULT	0x32
+
+#define ST_STHS34PF80_DATA_CHANNEL(chan_type, addr, mod,	\
+				   ch2, scan_idx, rb, sb, sg)	\
+{								\
+	.type = chan_type,					\
+	.address = addr,					\
+	.modified = mod,					\
+	.channel2 = ch2,					\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		\
+			      BIT(IIO_CHAN_INFO_SCALE),		\
+	.info_mask_shared_by_all =				\
+				BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
+	.scan_index = scan_idx,					\
+	.scan_type = {						\
+		.sign = sg,					\
+		.realbits = rb,					\
+		.storagebits = sb,				\
+		.endianness = IIO_LE,				\
+	},							\
+}
+
+static const struct iio_event_spec st_sths34pf80_thr_event = {
+	.type = IIO_EV_TYPE_THRESH,
+	.dir = IIO_EV_DIR_RISING,
+	.mask_separate = BIT(IIO_EV_INFO_ENABLE),
+};
+
+#define ST_STHS34PF80_EVENT_CHANNEL(ctype)			\
+{								\
+	.type = ctype,						\
+	.modified = 0,						\
+	.scan_index = -1,					\
+	.indexed = -1,						\
+	.event_spec = &st_sths34pf80_thr_event,			\
+	.num_event_specs = 1,					\
+}
+
+#define ST_STHS34PF80_SHIFT_VAL(val, mask)	(((val) << __ffs(mask)) & (mask))
+
+/**
+ * struct st_sths34pf80_reg - Generic sensor register
+ * description (addr + mask)
+ *
+ * @addr: Address of register.
+ * @mask: Bitmask register for proper usage.
+ */
+struct st_sths34pf80_reg {
+	u8 addr;
+	u8 mask;
+};
+
+/**
+ * struct st_sths34pf80_odr - Single ODR entry
+ * @hz: Most significant part of the sensor ODR (Hz).
+ * @uhz: Less significant part of the sensor ODR (micro Hz).
+ * @val: ODR register value.
+ * @avg: Average suggested for this ODR.
+ */
+struct st_sths34pf80_odr {
+	u16 hz;
+	u32 uhz;
+	u8 val;
+	u8 avg;
+};
+
+/**
+ * struct st_sths34pf80_fs
+ * brief Full scale entry
+ *
+ * @gain: The gain to obtain data value from raw data (LSB).
+ * @val: Register value.
+ */
+struct st_sths34pf80_fs {
+	u32 gain;
+	u8 val;
+};
+
+/**
+ * struct st_sths34pf80_lpf
+ * brief Low pass filter setting
+ *
+ * @reg: Register to update LPF bandwidth.
+ * @mask: Register bitmask.
+ * @val: Register value.
+ */
+struct st_sths34pf80_lpf {
+	u8 reg;
+	u8 mask;
+	u8 val;
+};
+
+/**
+ * struct st_sths34pf80_threshold
+ * brief Thresholds setting
+ *
+ * @reg: Register to update sensor threshold.
+ * @val: Register value.
+ */
+struct st_sths34pf80_threshold {
+	u8 reg;
+	u16 val;
+};
+
+/**
+ * struct st_sths34pf80_hysteresis
+ * brief hysteresis setting
+ *
+ * @reg: Register to update sensor hysteresis.
+ * @val: Register value.
+ */
+struct st_sths34pf80_hysteresis {
+	u8 reg;
+	u8 val;
+};
+
+enum st_sths34pf80_sensor_id {
+	ST_STHS34PF80_ID_TAMB_OBJ = 0,
+#ifdef ST_STHS34PF80_TCOMP
+	ST_STHS34PF80_ID_TOBJECT_COMP,
+#endif /* ST_STHS34PF80_TCOMP */
+	ST_STHS34PF80_ID_TAMB_SHOCK,
+	ST_STHS34PF80_ID_TMOTION,
+	ST_STHS34PF80_ID_TPRESENCE,
+	ST_STHS34PF80_ID_MAX,
+};
+
+/**
+ * struct st_sths34pf80_sensor - ST TMOS sensor instance
+ * @name: Sensor name.
+ * @id: Sensor identifier.
+ * @hw: Pointer to instance of struct st_sths34pf80_hw.
+ * @odr: Output data rate of the sensor [Hz].
+ * @uodr: Output data rate of the sensor [uHz].
+ * @lpf: Sensor low pass filter settings.
+ * @threshold: Sensor thresholds.
+ * @hysteresis: Sensor hysteresis.
+ */
+struct st_sths34pf80_sensor {
+	char name[32];
+
+	enum st_sths34pf80_sensor_id id;
+	struct st_sths34pf80_hw *hw;
+
+	int odr;
+	int uodr;
+
+	struct st_sths34pf80_lpf lpf;
+	struct st_sths34pf80_threshold threshold;
+	struct st_sths34pf80_hysteresis hysteresis;
+};
+
+/**
+ * struct st_sths34pf80_hw - ST TMOS MEMS hw instance
+ * @dev_name: STM device name.
+ * @dev: Pointer to instance of struct device (I2C or SPI).
+ * @irq: Device interrupt line (I2C or SPI).
+ * @regmap: Register map of the device.
+ * @page_lock: Mutex to prevent concurrent access to the page selector.
+ * @int_lock: Mutex to prevent concurrent access to interrupt configuration.
+ * @state: hw operational state.
+ * @enable_mask: Enabled sensor bitmask.
+ * @event_mask: Enabled event generation bitmask.
+ * @vdd_supply: Voltage regulator for VDD.
+ * @vddio_supply: Voltage regulator for VDDIIO.
+ * @iio_devs: Pointers to iio_dev instances.
+ * @ts: Event hardware timestamp.
+ * @tcomp: Temperature compensation enabled flag.
+ * @edge_trigger: Interrupt configuration type.
+ * @sensitivity: Data sensitivity (for tobj compensated only)
+ */
+struct st_sths34pf80_hw {
+	char dev_name[16];
+	struct device *dev;
+	int irq;
+	struct regmap *regmap;
+	struct mutex page_lock;
+	struct mutex int_lock;
+
+	unsigned long state;
+	u64 enable_mask;
+	u64 event_mask;
+
+	struct regulator *vdd_supply;
+	struct regulator *vddio_supply;
+
+	struct iio_dev *iio_devs[ST_STHS34PF80_ID_MAX];
+
+	s64 ts;
+
+#ifdef ST_STHS34PF80_TCOMP
+	bool tcomp;
+#endif /* ST_STHS34PF80_TCOMP */
+
+	bool edge_trigger;
+
+	u8 sensitivity;
+};
+
+static inline int
+__st_sths34pf80_write_with_mask(struct st_sths34pf80_hw *hw,
+				unsigned int addr,
+				unsigned int mask,
+				unsigned int data)
+{
+	int err;
+	unsigned int val = ST_STHS34PF80_SHIFT_VAL(data, mask);
+
+	err = regmap_update_bits(hw->regmap, addr, mask, val);
+
+	return err;
+}
+
+static inline int
+st_sths34pf80_update_bits_locked(struct st_sths34pf80_hw *hw,
+				 unsigned int addr, unsigned int mask,
+				 unsigned int val)
+{
+	int err;
+
+	mutex_lock(&hw->page_lock);
+	err = __st_sths34pf80_write_with_mask(hw, addr, mask, val);
+	mutex_unlock(&hw->page_lock);
+
+	return err;
+}
+
+static inline int
+st_sths34pf80_read_locked(struct st_sths34pf80_hw *hw,
+			  unsigned int addr, void *val,
+			  unsigned int len)
+{
+	int err;
+
+	mutex_lock(&hw->page_lock);
+	err = regmap_bulk_read(hw->regmap, addr, val, len);
+	mutex_unlock(&hw->page_lock);
+
+	return err;
+}
+
+static inline int
+st_sths34pf80_write_locked(struct st_sths34pf80_hw *hw,
+			   unsigned int addr, unsigned int val)
+{
+	int err;
+
+	mutex_lock(&hw->page_lock);
+	err = regmap_write(hw->regmap, addr, val);
+	mutex_unlock(&hw->page_lock);
+
+	return err;
+}
+
+static inline int
+st_sths34pf80_set_page_access(struct st_sths34pf80_hw *hw,
+			      unsigned int val)
+{
+	return regmap_update_bits(hw->regmap,
+		   ST_STHS34PF80_CTRL2_ADDR,
+		   ST_STHS34PF80_FUNC_CFG_ACCESS_MASK,
+		   FIELD_PREP(ST_STHS34PF80_FUNC_CFG_ACCESS_MASK, val));
+}
+
+static inline s64 st_sths34pf80_get_time_ns(struct st_sths34pf80_hw *hw)
+{
+	return iio_get_time_ns(hw->iio_devs[ST_STHS34PF80_ID_TAMB_OBJ]);
+}
+
+int st_sths34pf80_probe(struct device *dev, int irq,
+			struct regmap *regmap);
+int st_sths34pf80_remove(struct device *dev);
+
+#ifdef CONFIG_PM_SLEEP
+extern const struct dev_pm_ops st_sths34pf80_pm_ops;
+#endif /* CONFIG_PM_SLEEP */
+#endif /* ST_STHS34PF80_H */

drivers/iio/stm/tmos/st_sths34pf80/st_sths34pf80_i2c.c

@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * STMicroelectronics st_sths34pf80 i2c driver
+ *
+ * MEMS Software Solutions Team
+ *
+ * Copyright 2022 STMicroelectronics Inc.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/version.h>
+
+#include "st_sths34pf80.h"
+
+static const struct regmap_config st_sths34pf80_i2c_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+};
+
+static int st_sths34pf80_i2c_probe(struct i2c_client *client,
+				   const struct i2c_device_id *id)
+{
+	struct regmap *regmap;
+
+	regmap = devm_regmap_init_i2c(client,
+				      &st_sths34pf80_i2c_regmap_config);
+	if (IS_ERR(regmap)) {
+		dev_err(&client->dev,
+			"Failed to register i2c regmap %d\n",
+			(int)PTR_ERR(regmap));
+		return PTR_ERR(regmap);
+	}
+
+	return st_sths34pf80_probe(&client->dev, client->irq, regmap);
+}
+
+#if KERNEL_VERSION(6, 1, 0) <= LINUX_VERSION_CODE
+static void st_sths34pf80_i2c_remove(struct i2c_client *client)
+{
+	st_sths34pf80_remove(&client->dev);
+}
+#else /* LINUX_VERSION_CODE */
+static int st_sths34pf80_i2c_remove(struct i2c_client *client)
+{
+	return st_sths34pf80_remove(&client->dev);
+}
+#endif /* LINUX_VERSION_CODE */
+
+static const struct of_device_id st_sths34pf80_i2c_of_match[] = {
+	{ .compatible = "st," ST_STHS34PF80_DEV_NAME },
+	{},
+};
+MODULE_DEVICE_TABLE(of, st_sths34pf80_i2c_of_match);
+
+static const struct i2c_device_id st_sths34pf80_i2c_id_table[] = {
+	{ ST_STHS34PF80_DEV_NAME },
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, st_sths34pf80_i2c_id_table);
+
+static struct i2c_driver st_sths34pf80_driver = {
+	.driver = {
+		.name = "st_" ST_STHS34PF80_DEV_NAME "_i2c",
+#ifdef CONFIG_PM_SLEEP
+		.pm = &st_sths34pf80_pm_ops,
+#endif /* CONFIG_PM_SLEEP */
+		.of_match_table =
+			       of_match_ptr(st_sths34pf80_i2c_of_match),
+	},
+	.probe = st_sths34pf80_i2c_probe,
+	.remove = st_sths34pf80_i2c_remove,
+	.id_table = st_sths34pf80_i2c_id_table,
+};
+module_i2c_driver(st_sths34pf80_driver);
+
+MODULE_AUTHOR("MEMS Software Solutions Team");
+MODULE_DESCRIPTION("STMicroelectronics st_sths34pf80 i2c driver");
+MODULE_LICENSE("GPL v2");

drivers/iio/stm/tmos/st_sths34pf80/st_sths34pf80_spi.c

@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * STMicroelectronics st_sths34pf80 spi driver
+ *
+ * MEMS Software Solutions Team
+ *
+ * Copyright 2022 STMicroelectronics Inc.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/version.h>
+
+#include "st_sths34pf80.h"
+
+static const struct regmap_config st_sths34pf80_spi_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+};
+
+static int st_sths34pf80_spi_probe(struct spi_device *spi)
+{
+	struct regmap *regmap;
+
+	regmap = devm_regmap_init_spi(spi,
+				      &st_sths34pf80_spi_regmap_config);
+	if (IS_ERR(regmap)) {
+		dev_err(&spi->dev,
+			"Failed to register spi regmap %d\n",
+			(int)PTR_ERR(regmap));
+		return PTR_ERR(regmap);
+	}
+
+	return st_sths34pf80_probe(&spi->dev, spi->irq, regmap);
+}
+
+#if KERNEL_VERSION(5, 18, 0) <= LINUX_VERSION_CODE
+static void st_sths34pf80_i2c_remove(struct spi_device *spi)
+{
+	st_sths34pf80_remove(&spi->dev);
+}
+#else /* LINUX_VERSION_CODE */
+static int st_sths34pf80_i2c_remove(struct spi_device *spi)
+{
+	return st_sths34pf80_remove(&spi->dev);
+}
+#endif /* LINUX_VERSION_CODE */
+
+static const struct of_device_id st_sths34pf80_spi_of_match[] = {
+	{ .compatible = "st," ST_STHS34PF80_DEV_NAME },
+	{},
+};
+MODULE_DEVICE_TABLE(of, st_sths34pf80_spi_of_match);
+
+static const struct spi_device_id st_sths34pf80_spi_id_table[] = {
+	{ ST_STHS34PF80_DEV_NAME },
+	{},
+};
+MODULE_DEVICE_TABLE(spi, st_sths34pf80_spi_id_table);
+
+static struct spi_driver st_sths34pf80_driver = {
+	.driver = {
+		.name = "st_" ST_STHS34PF80_DEV_NAME "_spi",
+#ifdef CONFIG_PM_SLEEP
+		.pm = &st_sths34pf80_pm_ops,
+#endif /* CONFIG_PM_SLEEP */
+		.of_match_table =
+			       of_match_ptr(st_sths34pf80_spi_of_match),
+	},
+	.probe = st_sths34pf80_spi_probe,
+	.remove = st_sths34pf80_i2c_remove,
+	.id_table = st_sths34pf80_spi_id_table,
+};
+module_spi_driver(st_sths34pf80_driver);
+
+MODULE_AUTHOR("MEMS Software Solutions Team");
+MODULE_DESCRIPTION("STMicroelectronics st_sths34pf80 spi driver");
+MODULE_LICENSE("GPL v2");

stm_iio_configs/sths34pf80_defconfig

@@ -0,0 +1,3 @@
+CONFIG_IIO_ST_STHS34PF80=m
+CONFIG_IIO_ST_STHS34PF80_SPI=m
+CONFIG_IIO_ST_STHS34PF80_I2C=m