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pinctrl: qcom: Add hibernation support for sm6150

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MSM pinctrl core driver takes care of saving and restoring
registers during hibernation. Pass required dir_conn_addr
to core driver for hibernation to work.

Change-Id: I5ce21df3574ca10cfeec228f3425180390c7e14a
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>
This commit is contained in:
Vivek Kumar 2019-08-21 15:12:13 +05:30 committed by Darshankumar Jagdishchandra Thakkar
parent 6058abbf28
commit 257e04718e
1 changed files with 14 additions and 0 deletions
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14
drivers/pinctrl/qcom/pinctrl-sm6150.c
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@ -50,6 +50,9 @@
.intr_cfg_reg = base + 0x8 + REG_SIZE * id, \
.intr_status_reg = base + 0xc + REG_SIZE * id, \
.intr_target_reg = base + 0x8 + REG_SIZE * id, \
.dir_conn_reg = (base == EAST) ? base + EAST_PDC_OFFSET : \
((base == WEST) ? base + WEST_PDC_OFFSET : \
base + SOUTH_PDC_OFFSET), \
.mux_bit = 2, \
.dir_conn_reg = (base == EAST) ? base + EAST_PDC_OFFSET : \
((base == WEST) ? base + WEST_PDC_OFFSET : \
@ -1582,6 +1585,14 @@ static struct msm_dir_conn sm6150_dir_conn[] = {
{-1, 0}, {-1, 0}, {-1, 0}, {-1, 0}
};
#ifdef CONFIG_HIBERNATION
static u32 tile_dir_conn_addr[NUM_TILES] = {
[0] = SOUTH + SOUTH_PDC_OFFSET,
[1] = WEST + WEST_PDC_OFFSET,
[2] = EAST + EAST_PDC_OFFSET
};
#endif
static struct msm_pinctrl_soc_data sm6150_pinctrl = {
.pins = sm6150_pins,
.npins = ARRAY_SIZE(sm6150_pins),
@ -1592,6 +1603,9 @@ static struct msm_pinctrl_soc_data sm6150_pinctrl = {
.ngpios = 124,
.dir_conn = sm6150_dir_conn,
.egpio_func = 9,
#ifdef CONFIG_HIBERNATION
.dir_conn_addr = tile_dir_conn_addr,
#endif
};
static int sm6150_pinctrl_dirconn_list_probe(struct platform_device *pdev)