ASoC: mediatek: mt8186: support hw gain in platform driver
Add mt8186 hw gain dai driver. Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220523132858.22166-7-jiaxin.yu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jiaxin Yu
Mark Brown
parent
55cac93d27
commit
2567ccae91
236
sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c
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236
sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c
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// SPDX-License-Identifier: GPL-2.0
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//
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// MediaTek ALSA SoC Audio DAI HW Gain Control
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//
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// Copyright (c) 2022 MediaTek Inc.
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// Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
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#include <linux/regmap.h>
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#include "mt8186-afe-common.h"
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#include "mt8186-interconnection.h"
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#define HW_GAIN_1_EN_W_NAME "HW GAIN 1 Enable"
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#define HW_GAIN_2_EN_W_NAME "HW GAIN 2 Enable"
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/* dai component */
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static const struct snd_kcontrol_new mtk_hw_gain1_in_ch1_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH1 Switch", AFE_CONN13_1,
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I_CONNSYS_I2S_CH1, 1, 0),
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};
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static const struct snd_kcontrol_new mtk_hw_gain1_in_ch2_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH2 Switch", AFE_CONN14_1,
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I_CONNSYS_I2S_CH2, 1, 0),
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};
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static const struct snd_kcontrol_new mtk_hw_gain2_in_ch1_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN15,
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I_ADDA_UL_CH1, 1, 0),
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};
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static const struct snd_kcontrol_new mtk_hw_gain2_in_ch2_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN16,
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I_ADDA_UL_CH2, 1, 0),
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};
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static int mtk_hw_gain_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol,
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int event)
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{
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struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
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struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
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unsigned int gain_cur;
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unsigned int gain_con1;
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dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n",
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__func__, w->name, event);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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if (strcmp(w->name, HW_GAIN_1_EN_W_NAME) == 0) {
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gain_cur = AFE_GAIN1_CUR;
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gain_con1 = AFE_GAIN1_CON1;
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} else {
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gain_cur = AFE_GAIN2_CUR;
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gain_con1 = AFE_GAIN2_CON1;
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}
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/* let hw gain ramp up, set cur gain to 0 */
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regmap_update_bits(afe->regmap, gain_cur, AFE_GAIN1_CUR_MASK_SFT, 0);
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/* set target gain to 0 */
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regmap_update_bits(afe->regmap, gain_con1, GAIN1_TARGET_MASK_SFT, 0);
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget mtk_dai_hw_gain_widgets[] = {
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/* inter-connections */
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SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH1", SND_SOC_NOPM, 0, 0,
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mtk_hw_gain1_in_ch1_mix,
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ARRAY_SIZE(mtk_hw_gain1_in_ch1_mix)),
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SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH2", SND_SOC_NOPM, 0, 0,
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mtk_hw_gain1_in_ch2_mix,
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ARRAY_SIZE(mtk_hw_gain1_in_ch2_mix)),
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SND_SOC_DAPM_MIXER("HW_GAIN2_IN_CH1", SND_SOC_NOPM, 0, 0,
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mtk_hw_gain2_in_ch1_mix,
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ARRAY_SIZE(mtk_hw_gain2_in_ch1_mix)),
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SND_SOC_DAPM_MIXER("HW_GAIN2_IN_CH2", SND_SOC_NOPM, 0, 0,
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mtk_hw_gain2_in_ch2_mix,
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ARRAY_SIZE(mtk_hw_gain2_in_ch2_mix)),
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SND_SOC_DAPM_SUPPLY(HW_GAIN_1_EN_W_NAME,
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AFE_GAIN1_CON0, GAIN1_ON_SFT, 0,
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mtk_hw_gain_event,
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SND_SOC_DAPM_PRE_PMU),
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SND_SOC_DAPM_SUPPLY(HW_GAIN_2_EN_W_NAME,
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AFE_GAIN2_CON0, GAIN2_ON_SFT, 0,
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mtk_hw_gain_event,
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SND_SOC_DAPM_PRE_PMU),
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SND_SOC_DAPM_INPUT("HW Gain 1 Out Endpoint"),
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SND_SOC_DAPM_INPUT("HW Gain 2 Out Endpoint"),
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SND_SOC_DAPM_OUTPUT("HW Gain 1 In Endpoint"),
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};
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static const struct snd_soc_dapm_route mtk_dai_hw_gain_routes[] = {
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{"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH1"},
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{"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH2"},
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{"HW Gain 2 In", NULL, "HW_GAIN2_IN_CH1"},
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{"HW Gain 2 In", NULL, "HW_GAIN2_IN_CH2"},
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{"HW Gain 1 In", NULL, HW_GAIN_1_EN_W_NAME},
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{"HW Gain 1 Out", NULL, HW_GAIN_1_EN_W_NAME},
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{"HW Gain 2 In", NULL, HW_GAIN_2_EN_W_NAME},
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{"HW Gain 2 Out", NULL, HW_GAIN_2_EN_W_NAME},
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{"HW Gain 1 In Endpoint", NULL, "HW Gain 1 In"},
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{"HW Gain 1 Out", NULL, "HW Gain 1 Out Endpoint"},
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{"HW Gain 2 Out", NULL, "HW Gain 2 Out Endpoint"},
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};
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static const struct snd_kcontrol_new mtk_hw_gain_controls[] = {
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SOC_SINGLE("HW Gain 1 Volume", AFE_GAIN1_CON1,
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GAIN1_TARGET_SFT, GAIN1_TARGET_MASK, 0),
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SOC_SINGLE("HW Gain 2 Volume", AFE_GAIN2_CON1,
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GAIN2_TARGET_SFT, GAIN2_TARGET_MASK, 0),
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};
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/* dai ops */
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static int mtk_dai_gain_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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unsigned int rate = params_rate(params);
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unsigned int rate_reg = mt8186_rate_transform(afe->dev, rate, dai->id);
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dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d\n",
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__func__, dai->id, substream->stream, rate);
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/* rate */
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regmap_update_bits(afe->regmap,
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dai->id == MT8186_DAI_HW_GAIN_1 ?
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AFE_GAIN1_CON0 : AFE_GAIN2_CON0,
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GAIN1_MODE_MASK_SFT,
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rate_reg << GAIN1_MODE_SFT);
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/* sample per step */
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regmap_update_bits(afe->regmap,
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dai->id == MT8186_DAI_HW_GAIN_1 ?
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AFE_GAIN1_CON0 : AFE_GAIN2_CON0,
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GAIN1_SAMPLE_PER_STEP_MASK_SFT,
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(dai->id == MT8186_DAI_HW_GAIN_1 ? 0x40 : 0x0) <<
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GAIN1_SAMPLE_PER_STEP_SFT);
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return 0;
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}
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static const struct snd_soc_dai_ops mtk_dai_gain_ops = {
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.hw_params = mtk_dai_gain_hw_params,
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};
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/* dai driver */
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#define MTK_HW_GAIN_RATES (SNDRV_PCM_RATE_8000_48000 |\
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SNDRV_PCM_RATE_88200 |\
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SNDRV_PCM_RATE_96000 |\
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SNDRV_PCM_RATE_176400 |\
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SNDRV_PCM_RATE_192000)
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#define MTK_HW_GAIN_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
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SNDRV_PCM_FMTBIT_S24_LE |\
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SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver mtk_dai_gain_driver[] = {
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{
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.name = "HW Gain 1",
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.id = MT8186_DAI_HW_GAIN_1,
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.playback = {
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.stream_name = "HW Gain 1 In",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_HW_GAIN_RATES,
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.formats = MTK_HW_GAIN_FORMATS,
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},
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.capture = {
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.stream_name = "HW Gain 1 Out",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_HW_GAIN_RATES,
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.formats = MTK_HW_GAIN_FORMATS,
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},
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.ops = &mtk_dai_gain_ops,
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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.symmetric_sample_bits = 1,
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},
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{
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.name = "HW Gain 2",
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.id = MT8186_DAI_HW_GAIN_2,
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.playback = {
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.stream_name = "HW Gain 2 In",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_HW_GAIN_RATES,
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.formats = MTK_HW_GAIN_FORMATS,
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},
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.capture = {
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.stream_name = "HW Gain 2 Out",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_HW_GAIN_RATES,
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.formats = MTK_HW_GAIN_FORMATS,
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},
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.ops = &mtk_dai_gain_ops,
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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.symmetric_sample_bits = 1,
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},
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};
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int mt8186_dai_hw_gain_register(struct mtk_base_afe *afe)
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{
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struct mtk_base_afe_dai *dai;
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dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
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if (!dai)
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return -ENOMEM;
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list_add(&dai->list, &afe->sub_dais);
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dai->dai_drivers = mtk_dai_gain_driver;
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dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_gain_driver);
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dai->controls = mtk_hw_gain_controls;
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dai->num_controls = ARRAY_SIZE(mtk_hw_gain_controls);
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dai->dapm_widgets = mtk_dai_hw_gain_widgets;
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dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_hw_gain_widgets);
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dai->dapm_routes = mtk_dai_hw_gain_routes;
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dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_hw_gain_routes);
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return 0;
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}
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