arm-smmu-qcom: Export QCOM io-pagetables for adreno smmu

Do the groundwork for kgsl to be able to use QCOM io-pagetables
to make maps/unmaps faster.

Change-Id: Ib1b484e1e0ba21aaf8e9c0cac1c100cc981a6825
Signed-off-by: Harshdeep Dhatt <quic_hdhatt@quicinc.com>
Signed-off-by: Kamal Agrawal <quic_kamaagra@quicinc.com>

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

@@ -222,6 +222,8 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
 {
 	struct adreno_smmu_priv *priv;
 	const struct device_node *np = smmu_domain->smmu->dev->of_node;
+	struct qcom_io_pgtable_info *input_info =
+		container_of(pgtbl_cfg, struct qcom_io_pgtable_info, cfg);
 
 	smmu_domain->cfg.flush_walk_prefer_tlbiasid = true;
 
@@ -248,6 +250,7 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
 	priv->get_ttbr1_cfg = qcom_adreno_smmu_get_ttbr1_cfg;
 	priv->set_ttbr0_cfg = qcom_adreno_smmu_set_ttbr0_cfg;
 	priv->get_fault_info = qcom_adreno_smmu_get_fault_info;
+	priv->pgtbl_info = *input_info;
 
 	/*
 	 * These functions are only compatible with the data structures used by the

drivers/iommu/arm/arm-smmu/arm-smmu.c

@@ -50,7 +50,6 @@
 #include "../../dma-iommu.h"
 #include "../../iommu-logger.h"
 #include "../../qcom-dma-iommu-generic.h"
-#include "../../qcom-io-pgtable.h"
 #include "../../qcom-io-pgtable-alloc.h"
 #include <linux/qcom-iommu-util.h>
 

drivers/iommu/arm/arm-smmu/arm-smmu.h

@@ -25,8 +25,7 @@
 #include <linux/spinlock.h>
 #include <linux/types.h>
 #include <linux/qcom-iommu-util.h>
-
-#include "../../qcom-io-pgtable.h"
+#include <linux/qcom-io-pgtable.h>
 
 /* Configuration registers */
 #define ARM_SMMU_GR0_sCR0		0x0

drivers/iommu/io-pgtable-fast.c

@@ -18,7 +18,7 @@
 #include <linux/vmalloc.h>
 #include <linux/dma-mapping.h>
 #include <linux/qcom-iommu-util.h>
-#include "qcom-io-pgtable.h"
+#include <linux/qcom-io-pgtable.h>
 
 #define AV8L_FAST_MAX_ADDR_BITS		48
 

drivers/iommu/iommu-logger.c

@@ -1,13 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/bitfield.h>
 #include <linux/module.h>
 #include <linux/iommu.h>
+#include <linux/qcom-io-pgtable.h>
 #include <linux/slab.h>
-#include "qcom-io-pgtable.h"
 
 #include "iommu-logger.h"
 

drivers/iommu/qcom-io-pgtable-arm.c

@@ -21,9 +21,9 @@
 #include <linux/types.h>
 #include <linux/dma-mapping.h>
 #include <linux/qcom-iommu-util.h>
+#include <linux/qcom-io-pgtable.h>
 
 #include <asm/barrier.h>
-#include "qcom-io-pgtable.h"
 #include "qcom-io-pgtable-alloc.h"
 
 #include "io-pgtable-arm.h"

drivers/iommu/qcom-iommu-util.c

@@ -8,8 +8,8 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/qcom-iommu-util.h>
+#include <linux/qcom-io-pgtable.h>
 #include "qcom-dma-iommu-generic.h"
-#include "qcom-io-pgtable.h"
 #include "qcom-io-pgtable-alloc.h"
 
 struct qcom_iommu_range_prop_cb_data {

include/linux/adreno-smmu-priv.h

@@ -1,12 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (C) 2020 Google, Inc
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef __ADRENO_SMMU_PRIV_H
 #define __ADRENO_SMMU_PRIV_H
 
 #include <linux/io-pgtable.h>
+#include <linux/qcom-io-pgtable.h>
 
 /**
  * struct adreno_smmu_fault_info - container for key fault information
@@ -49,6 +51,7 @@ struct adreno_smmu_fault_info {
  *                 before set_ttbr0_cfg().  If stalling on fault is enabled,
  *                 the GPU driver must call resume_translation()
  * @resume_translation: Resume translation after a fault
+ * @pgtbl_info:    io-pagetables info for the GPUs context-bank
  *
  *
  * The GPU driver (drm/msm) and adreno-smmu work together for controlling
@@ -61,12 +64,13 @@ struct adreno_smmu_fault_info {
  * it's domain.
  */
 struct adreno_smmu_priv {
-    const void *cookie;
-    const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
-    int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
-    void (*get_fault_info)(const void *cookie, struct adreno_smmu_fault_info *info);
-    void (*set_stall)(const void *cookie, bool enabled);
-    void (*resume_translation)(const void *cookie, bool terminate);
+	const void *cookie;
+	const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
+	int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
+	void (*get_fault_info)(const void *cookie, struct adreno_smmu_fault_info *info);
+	void (*set_stall)(const void *cookie, bool enabled);
+	void (*resume_translation)(const void *cookie, bool terminate);
+	struct qcom_io_pgtable_info pgtbl_info;
 };
 
 #endif /* __ADRENO_SMMU_PRIV_H */

include/linux/qcom-io-pgtable.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #ifndef __QCOM_QCOM_IO_PGTABLE_H
 #define __QCOM_QCOM_IO_PGTABLE_H