Merge 49c13ed031 ("Merge tag 'soc-fixes-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") into android-mainline
Steps on the way to 6.0-final Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I75239cdb675328bee73c1cf5f51c63e425b62701
This commit is contained in:
Greg Kroah-Hartman
commit
21573a40d7
3
.mailmap
3
.mailmap
@ -71,6 +71,9 @@ Ben M Cahill <ben.m.cahill@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
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Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
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Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
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Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
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Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
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Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
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Björn Steinbrink <B.Steinbrink@gmx.de>
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Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
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Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
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12
MAINTAINERS
12
MAINTAINERS
@ -2579,7 +2579,7 @@ W: http://www.armlinux.org.uk/
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ARM/QUALCOMM SUPPORT
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M: Andy Gross <agross@kernel.org>
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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R: Konrad Dybcio <konrad.dybcio@somainline.org>
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L: linux-arm-msm@vger.kernel.org
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S: Maintained
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@ -8944,7 +8944,7 @@ F: include/linux/hw_random.h
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HARDWARE SPINLOCK CORE
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M: Ohad Ben-Cohen <ohad@wizery.com>
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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R: Baolin Wang <baolin.wang7@gmail.com>
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L: linux-remoteproc@vger.kernel.org
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S: Maintained
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@ -16133,7 +16133,7 @@ F: drivers/gpio/gpio-sama5d2-piobu.c
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F: drivers/pinctrl/pinctrl-at91*
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PIN CONTROLLER - QUALCOMM
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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L: linux-arm-msm@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/pinctrl/qcom,*.txt
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@ -16826,7 +16826,7 @@ F: Documentation/devicetree/bindings/media/*camss*
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F: drivers/media/platform/qcom/camss/
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QUALCOMM CLOCK DRIVERS
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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L: linux-arm-msm@vger.kernel.org
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S: Supported
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
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@ -17316,7 +17316,7 @@ S: Supported
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F: fs/reiserfs/
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REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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M: Mathieu Poirier <mathieu.poirier@linaro.org>
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L: linux-remoteproc@vger.kernel.org
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S: Maintained
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@ -17329,7 +17329,7 @@ F: include/linux/remoteproc.h
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F: include/linux/remoteproc/
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REMOTE PROCESSOR MESSAGING (RPMSG) SUBSYSTEM
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Bjorn Andersson <andersson@kernel.org>
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M: Mathieu Poirier <mathieu.poirier@linaro.org>
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L: linux-remoteproc@vger.kernel.org
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S: Maintained
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@ -1502,8 +1502,7 @@ SYSC_OMAP2_SOFTRESET |
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mmc1: mmc@0 {
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compatible = "ti,am335-sdhci";
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ti,needs-special-reset;
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dmas = <&edma_xbar 24 0 0
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&edma_xbar 25 0 0>;
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dmas = <&edma 24 0>, <&edma 25 0>;
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dma-names = "tx", "rx";
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interrupts = <64>;
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reg = <0x0 0x1000>;
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@ -25,6 +25,10 @@ &usb3_tm {
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status = "disabled";
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};
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|
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&usb4_tm {
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status = "disabled";
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};
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&atl_tm {
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status = "disabled";
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};
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@ -249,6 +249,7 @@ display@1000000 {
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/* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
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max-memory-bandwidth = <40000000>;
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memory-region = <&impd1_ram>;
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dma-ranges;
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port@0 {
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#address-cells = <1>;
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@ -160,6 +160,7 @@ pic: pic@14000000 {
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pci: pciv3@62000000 {
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compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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@ -261,7 +262,7 @@ bus@c0000000 {
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lm0: bus@c0000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xc0000000 0x10000000>;
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dma-ranges = <0x00000000 0x80000000 0x10000000>;
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dma-ranges = <0x00000000 0xc0000000 0x10000000>;
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reg = <0xc0000000 0x10000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -269,7 +270,7 @@ lm0: bus@c0000000 {
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lm1: bus@d0000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xd0000000 0x10000000>;
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dma-ranges = <0x00000000 0x80000000 0x10000000>;
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dma-ranges = <0x00000000 0xd0000000 0x10000000>;
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reg = <0xd0000000 0x10000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -277,7 +278,7 @@ lm1: bus@d0000000 {
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lm2: bus@e0000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xe0000000 0x10000000>;
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dma-ranges = <0x00000000 0x80000000 0x10000000>;
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dma-ranges = <0x00000000 0xe0000000 0x10000000>;
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reg = <0xe0000000 0x10000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -285,7 +286,7 @@ lm2: bus@e0000000 {
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lm3: bus@f0000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xf0000000 0x10000000>;
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dma-ranges = <0x00000000 0x80000000 0x10000000>;
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dma-ranges = <0x00000000 0xf0000000 0x10000000>;
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reg = <0xf0000000 0x10000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -18,8 +18,8 @@ config SOC_SP7021
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select ARM_PSCI
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select PINCTRL
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select PINCTRL_SPPCTL
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select SERIAL_SUNPLUS
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select SERIAL_SUNPLUS_CONSOLE
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select SERIAL_SUNPLUS if TTY
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select SERIAL_SUNPLUS_CONSOLE if TTY
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help
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Support for Sunplus SP7021 SoC. It is based on ARM 4-core
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Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO,
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@ -3374,6 +3374,8 @@ usb_1: usb@a6f8800 {
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<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB3_0 0>;
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interconnect-names = "usb-ddr", "apps-usb";
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wakeup-source;
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usb_1_dwc3: usb@a600000 {
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compatible = "snps,dwc3";
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reg = <0 0x0a600000 0 0xe000>;
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@ -3384,7 +3386,6 @@ usb_1_dwc3: usb@a600000 {
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phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
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||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
maximum-speed = "super-speed";
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wakeup-source;
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};
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};
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||||
|
||||
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@ -235,13 +235,13 @@ keyboard@68 {
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};
|
||||
|
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&remoteproc_adsp {
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firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
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firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn";
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status = "okay";
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};
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&remoteproc_nsp0 {
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firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
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firmware-name = "qcom/sc8280xp/LENOVO/21BX/qccdsp8280.mbn";
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status = "okay";
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};
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@ -3394,57 +3394,49 @@ fastrpc {
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <1>;
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iommus = <&apps_smmu 0x1401 0x2040>,
|
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<&apps_smmu 0x1421 0x0>,
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<&apps_smmu 0x2001 0x420>,
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<&apps_smmu 0x2041 0x0>;
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iommus = <&apps_smmu 0x1001 0x0460>;
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <2>;
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iommus = <&apps_smmu 0x2 0x3440>,
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<&apps_smmu 0x22 0x3400>;
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iommus = <&apps_smmu 0x1002 0x0460>;
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x3 0x3440>,
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<&apps_smmu 0x1423 0x0>,
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<&apps_smmu 0x2023 0x0>;
|
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iommus = <&apps_smmu 0x1003 0x0460>;
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x4 0x3440>,
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<&apps_smmu 0x24 0x3400>;
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iommus = <&apps_smmu 0x1004 0x0460>;
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x5 0x3440>,
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<&apps_smmu 0x25 0x3400>;
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iommus = <&apps_smmu 0x1005 0x0460>;
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};
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compute-cb@6 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x6 0x3460>;
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iommus = <&apps_smmu 0x1006 0x0460>;
|
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};
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compute-cb@7 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
|
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iommus = <&apps_smmu 0x7 0x3460>;
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iommus = <&apps_smmu 0x1007 0x0460>;
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};
|
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compute-cb@8 {
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compatible = "qcom,fastrpc-compute-cb";
|
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reg = <8>;
|
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iommus = <&apps_smmu 0x8 0x3460>;
|
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iommus = <&apps_smmu 0x1008 0x0460>;
|
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};
|
||||
|
||||
/* note: secure cb9 in downstream */
|
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|
||||
@ -2128,7 +2128,7 @@ ufs_mem_hc: ufshc@1d84000 {
|
||||
|
||||
ufs_mem_phy: phy@1d87000 {
|
||||
compatible = "qcom,sm8350-qmp-ufs-phy";
|
||||
reg = <0 0x01d87000 0 0xe10>;
|
||||
reg = <0 0x01d87000 0 0x1c4>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct reset_controller_dev *rcdev,
|
||||
break;
|
||||
|
||||
case IMX8MP_RESET_PCIE_CTRL_APPS_EN:
|
||||
case IMX8MP_RESET_PCIEPHY_PERST:
|
||||
value = assert ? 0 : bit;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -33,11 +33,8 @@ static struct regmap_config sparx5_reset_regmap_config = {
|
||||
.reg_stride = 4,
|
||||
};
|
||||
|
||||
static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
static int sparx5_switch_reset(struct mchp_reset_context *ctx)
|
||||
{
|
||||
struct mchp_reset_context *ctx =
|
||||
container_of(rcdev, struct mchp_reset_context, rcdev);
|
||||
u32 val;
|
||||
|
||||
/* Make sure the core is PROTECTED from reset */
|
||||
@ -54,8 +51,14 @@ static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
|
||||
1, 100);
|
||||
}
|
||||
|
||||
static int sparx5_reset_noop(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct reset_control_ops sparx5_reset_ops = {
|
||||
.reset = sparx5_switch_reset,
|
||||
.reset = sparx5_reset_noop,
|
||||
};
|
||||
|
||||
static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name,
|
||||
@ -122,6 +125,11 @@ static int mchp_sparx5_reset_probe(struct platform_device *pdev)
|
||||
ctx->rcdev.of_node = dn;
|
||||
ctx->props = device_get_match_data(&pdev->dev);
|
||||
|
||||
/* Issue the reset very early, our actual reset callback is a noop. */
|
||||
err = sparx5_switch_reset(ctx);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return devm_reset_controller_register(&pdev->dev, &ctx->rcdev);
|
||||
}
|
||||
|
||||
@ -163,6 +171,10 @@ static int __init mchp_sparx5_reset_init(void)
|
||||
return platform_driver_register(&mchp_sparx5_reset_driver);
|
||||
}
|
||||
|
||||
/*
|
||||
* Because this is a global reset, keep this postcore_initcall() to issue the
|
||||
* reset as early as possible during the kernel startup.
|
||||
*/
|
||||
postcore_initcall(mchp_sparx5_reset_init);
|
||||
|
||||
MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver");
|
||||
|
||||
@ -291,7 +291,7 @@ static void npcm_usb_reset_npcm8xx(struct npcm_rc_data *rc)
|
||||
iprst2 |= ipsrst2_bits;
|
||||
iprst3 |= (ipsrst3_bits | NPCM_IPSRST3_USBPHY1 |
|
||||
NPCM_IPSRST3_USBPHY2);
|
||||
iprst2 |= ipsrst4_bits;
|
||||
iprst4 |= ipsrst4_bits;
|
||||
|
||||
writel(iprst1, rc->base + NPCM_IPSRST1);
|
||||
writel(iprst2, rc->base + NPCM_IPSRST2);
|
||||
|
||||
@ -288,7 +288,6 @@ static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
|
||||
if (BRCM_ID(family_id) == 0x7260 && BRCM_REV(family_id) == 0)
|
||||
cpubiuctrl_regs = b53_cpubiuctrl_no_wb_regs;
|
||||
out:
|
||||
of_node_put(np);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -78,8 +78,8 @@ static struct sunxi_sram_desc sun4i_a10_sram_d = {
|
||||
|
||||
static struct sunxi_sram_desc sun50i_a64_sram_c = {
|
||||
.data = SUNXI_SRAM_DATA("C", 0x4, 24, 1,
|
||||
SUNXI_SRAM_MAP(0, 1, "cpu"),
|
||||
SUNXI_SRAM_MAP(1, 0, "de2")),
|
||||
SUNXI_SRAM_MAP(1, 0, "cpu"),
|
||||
SUNXI_SRAM_MAP(0, 1, "de2")),
|
||||
};
|
||||
|
||||
static const struct of_device_id sunxi_sram_dt_ids[] = {
|
||||
@ -254,6 +254,7 @@ int sunxi_sram_claim(struct device *dev)
|
||||
writel(val | ((device << sram_data->offset) & mask),
|
||||
base + sram_data->reg);
|
||||
|
||||
sram_desc->claimed = true;
|
||||
spin_unlock(&sram_lock);
|
||||
|
||||
return 0;
|
||||
@ -329,11 +330,11 @@ static struct regmap_config sunxi_sram_emac_clock_regmap = {
|
||||
.writeable_reg = sunxi_sram_regmap_accessible_reg,
|
||||
};
|
||||
|
||||
static int sunxi_sram_probe(struct platform_device *pdev)
|
||||
static int __init sunxi_sram_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct dentry *d;
|
||||
struct regmap *emac_clock;
|
||||
const struct sunxi_sramc_variant *variant;
|
||||
struct device *dev = &pdev->dev;
|
||||
|
||||
sram_dev = &pdev->dev;
|
||||
|
||||
@ -345,13 +346,6 @@ static int sunxi_sram_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(base))
|
||||
return PTR_ERR(base);
|
||||
|
||||
of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
|
||||
|
||||
d = debugfs_create_file("sram", S_IRUGO, NULL, NULL,
|
||||
&sunxi_sram_fops);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
|
||||
if (variant->num_emac_clocks > 0) {
|
||||
emac_clock = devm_regmap_init_mmio(&pdev->dev, base,
|
||||
&sunxi_sram_emac_clock_regmap);
|
||||
@ -360,6 +354,10 @@ static int sunxi_sram_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(emac_clock);
|
||||
}
|
||||
|
||||
of_platform_populate(dev->of_node, NULL, NULL, dev);
|
||||
|
||||
debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -409,9 +407,8 @@ static struct platform_driver sunxi_sram_driver = {
|
||||
.name = "sunxi-sram",
|
||||
.of_match_table = sunxi_sram_dt_match,
|
||||
},
|
||||
.probe = sunxi_sram_probe,
|
||||
};
|
||||
module_platform_driver(sunxi_sram_driver);
|
||||
builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe);
|
||||
|
||||
MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
|
||||
MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
|
||||
|
||||
@ -450,6 +450,16 @@ static const struct config_entry config_table[] = {
|
||||
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
|
||||
.device = 0x51cb,
|
||||
},
|
||||
/* RaptorLake-M */
|
||||
{
|
||||
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
|
||||
.device = 0x51ce,
|
||||
},
|
||||
/* RaptorLake-PX */
|
||||
{
|
||||
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
|
||||
.device = 0x51cf,
|
||||
},
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
@ -901,7 +901,10 @@ static void nau8824_jdet_work(struct work_struct *work)
|
||||
NAU8824_IRQ_KEY_RELEASE_DIS |
|
||||
NAU8824_IRQ_KEY_SHORT_PRESS_DIS, 0);
|
||||
|
||||
nau8824_sema_release(nau8824);
|
||||
if (nau8824->resume_lock) {
|
||||
nau8824_sema_release(nau8824);
|
||||
nau8824->resume_lock = false;
|
||||
}
|
||||
}
|
||||
|
||||
static void nau8824_setup_auto_irq(struct nau8824 *nau8824)
|
||||
@ -966,7 +969,10 @@ static irqreturn_t nau8824_interrupt(int irq, void *data)
|
||||
/* release semaphore held after resume,
|
||||
* and cancel jack detection
|
||||
*/
|
||||
nau8824_sema_release(nau8824);
|
||||
if (nau8824->resume_lock) {
|
||||
nau8824_sema_release(nau8824);
|
||||
nau8824->resume_lock = false;
|
||||
}
|
||||
cancel_work_sync(&nau8824->jdet_work);
|
||||
} else if (active_irq & NAU8824_KEY_SHORT_PRESS_IRQ) {
|
||||
int key_status, button_pressed;
|
||||
@ -1524,6 +1530,7 @@ static int __maybe_unused nau8824_suspend(struct snd_soc_component *component)
|
||||
static int __maybe_unused nau8824_resume(struct snd_soc_component *component)
|
||||
{
|
||||
struct nau8824 *nau8824 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
regcache_cache_only(nau8824->regmap, false);
|
||||
regcache_sync(nau8824->regmap);
|
||||
@ -1531,7 +1538,10 @@ static int __maybe_unused nau8824_resume(struct snd_soc_component *component)
|
||||
/* Hold semaphore to postpone playback happening
|
||||
* until jack detection done.
|
||||
*/
|
||||
nau8824_sema_acquire(nau8824, 0);
|
||||
nau8824->resume_lock = true;
|
||||
ret = nau8824_sema_acquire(nau8824, 0);
|
||||
if (ret)
|
||||
nau8824->resume_lock = false;
|
||||
enable_irq(nau8824->irq);
|
||||
}
|
||||
|
||||
@ -1940,6 +1950,7 @@ static int nau8824_i2c_probe(struct i2c_client *i2c)
|
||||
nau8824->regmap = devm_regmap_init_i2c(i2c, &nau8824_regmap_config);
|
||||
if (IS_ERR(nau8824->regmap))
|
||||
return PTR_ERR(nau8824->regmap);
|
||||
nau8824->resume_lock = false;
|
||||
nau8824->dev = dev;
|
||||
nau8824->irq = i2c->irq;
|
||||
sema_init(&nau8824->jd_sem, 1);
|
||||
|
||||
@ -436,6 +436,7 @@ struct nau8824 {
|
||||
struct semaphore jd_sem;
|
||||
int fs;
|
||||
int irq;
|
||||
int resume_lock;
|
||||
int micbias_voltage;
|
||||
int vref_impedance;
|
||||
int jkdet_polarity;
|
||||
|
||||
@ -2494,7 +2494,7 @@ static void rt5640_enable_jack_detect(struct snd_soc_component *component,
|
||||
|
||||
/* Select JD-source */
|
||||
snd_soc_component_update_bits(component, RT5640_JD_CTRL,
|
||||
RT5640_JD_MASK, rt5640->jd_src);
|
||||
RT5640_JD_MASK, rt5640->jd_src << RT5640_JD_SFT);
|
||||
|
||||
/* Selecting GPIO01 as an interrupt */
|
||||
snd_soc_component_update_bits(component, RT5640_GPIO_CTRL1,
|
||||
@ -2504,12 +2504,8 @@ static void rt5640_enable_jack_detect(struct snd_soc_component *component,
|
||||
snd_soc_component_update_bits(component, RT5640_GPIO_CTRL3,
|
||||
RT5640_GP1_PF_MASK, RT5640_GP1_PF_OUT);
|
||||
|
||||
/* Enabling jd2 in general control 1 */
|
||||
snd_soc_component_write(component, RT5640_DUMMY1, 0x3f41);
|
||||
|
||||
/* Enabling jd2 in general control 2 */
|
||||
snd_soc_component_write(component, RT5640_DUMMY2, 0x4001);
|
||||
|
||||
rt5640_set_ovcd_params(component);
|
||||
|
||||
/*
|
||||
@ -2518,12 +2514,25 @@ static void rt5640_enable_jack_detect(struct snd_soc_component *component,
|
||||
* pin 0/1 instead of it being stuck to 1. So we invert the JD polarity
|
||||
* on systems where the hardware does not already do this.
|
||||
*/
|
||||
if (rt5640->jd_inverted)
|
||||
snd_soc_component_write(component, RT5640_IRQ_CTRL1,
|
||||
RT5640_IRQ_JD_NOR);
|
||||
else
|
||||
snd_soc_component_write(component, RT5640_IRQ_CTRL1,
|
||||
RT5640_IRQ_JD_NOR | RT5640_JD_P_INV);
|
||||
if (rt5640->jd_inverted) {
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_JD1_IN4P)
|
||||
snd_soc_component_write(component, RT5640_IRQ_CTRL1,
|
||||
RT5640_IRQ_JD_NOR);
|
||||
else if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)
|
||||
snd_soc_component_update_bits(component, RT5640_DUMMY2,
|
||||
RT5640_IRQ_JD2_MASK | RT5640_JD2_MASK,
|
||||
RT5640_IRQ_JD2_NOR | RT5640_JD2_EN);
|
||||
} else {
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_JD1_IN4P)
|
||||
snd_soc_component_write(component, RT5640_IRQ_CTRL1,
|
||||
RT5640_IRQ_JD_NOR | RT5640_JD_P_INV);
|
||||
else if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)
|
||||
snd_soc_component_update_bits(component, RT5640_DUMMY2,
|
||||
RT5640_IRQ_JD2_MASK | RT5640_JD2_P_MASK |
|
||||
RT5640_JD2_MASK,
|
||||
RT5640_IRQ_JD2_NOR | RT5640_JD2_P_INV |
|
||||
RT5640_JD2_EN);
|
||||
}
|
||||
|
||||
rt5640->jack = jack;
|
||||
if (rt5640->jack->status & SND_JACK_MICROPHONE) {
|
||||
@ -2725,10 +2734,8 @@ static int rt5640_probe(struct snd_soc_component *component)
|
||||
|
||||
if (device_property_read_u32(component->dev,
|
||||
"realtek,jack-detect-source", &val) == 0) {
|
||||
if (val <= RT5640_JD_SRC_GPIO4)
|
||||
rt5640->jd_src = val << RT5640_JD_SFT;
|
||||
else if (val == RT5640_JD_SRC_HDA_HEADER)
|
||||
rt5640->jd_src = RT5640_JD_SRC_HDA_HEADER;
|
||||
if (val <= RT5640_JD_SRC_HDA_HEADER)
|
||||
rt5640->jd_src = val;
|
||||
else
|
||||
dev_warn(component->dev, "Warning: Invalid jack-detect-source value: %d, leaving jack-detect disabled\n",
|
||||
val);
|
||||
@ -2809,12 +2816,31 @@ static int rt5640_resume(struct snd_soc_component *component)
|
||||
regcache_sync(rt5640->regmap);
|
||||
|
||||
if (rt5640->jack) {
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER)
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_HDA_HEADER) {
|
||||
snd_soc_component_update_bits(component,
|
||||
RT5640_DUMMY2, 0x1100, 0x1100);
|
||||
else
|
||||
snd_soc_component_write(component, RT5640_DUMMY2,
|
||||
0x4001);
|
||||
} else {
|
||||
if (rt5640->jd_inverted) {
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)
|
||||
snd_soc_component_update_bits(
|
||||
component, RT5640_DUMMY2,
|
||||
RT5640_IRQ_JD2_MASK |
|
||||
RT5640_JD2_MASK,
|
||||
RT5640_IRQ_JD2_NOR |
|
||||
RT5640_JD2_EN);
|
||||
|
||||
} else {
|
||||
if (rt5640->jd_src == RT5640_JD_SRC_JD2_IN4N)
|
||||
snd_soc_component_update_bits(
|
||||
component, RT5640_DUMMY2,
|
||||
RT5640_IRQ_JD2_MASK |
|
||||
RT5640_JD2_P_MASK |
|
||||
RT5640_JD2_MASK,
|
||||
RT5640_IRQ_JD2_NOR |
|
||||
RT5640_JD2_P_INV |
|
||||
RT5640_JD2_EN);
|
||||
}
|
||||
}
|
||||
|
||||
queue_delayed_work(system_long_wq, &rt5640->jack_work, 0);
|
||||
}
|
||||
|
||||
@ -1984,6 +1984,20 @@
|
||||
#define RT5640_M_MONO_ADC_R_SFT 12
|
||||
#define RT5640_MCLK_DET (0x1 << 11)
|
||||
|
||||
/* General Control 1 (0xfb) */
|
||||
#define RT5640_IRQ_JD2_MASK (0x1 << 12)
|
||||
#define RT5640_IRQ_JD2_SFT 12
|
||||
#define RT5640_IRQ_JD2_BP (0x0 << 12)
|
||||
#define RT5640_IRQ_JD2_NOR (0x1 << 12)
|
||||
#define RT5640_JD2_P_MASK (0x1 << 10)
|
||||
#define RT5640_JD2_P_SFT 10
|
||||
#define RT5640_JD2_P_NOR (0x0 << 10)
|
||||
#define RT5640_JD2_P_INV (0x1 << 10)
|
||||
#define RT5640_JD2_MASK (0x1 << 8)
|
||||
#define RT5640_JD2_SFT 8
|
||||
#define RT5640_JD2_DIS (0x0 << 8)
|
||||
#define RT5640_JD2_EN (0x1 << 8)
|
||||
|
||||
/* Codec Private Register definition */
|
||||
|
||||
/* MIC Over current threshold scale factor (0x15) */
|
||||
|
||||
@ -495,6 +495,8 @@ static struct snd_soc_dai_driver tas2770_dai_driver[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static const struct regmap_config tas2770_i2c_regmap;
|
||||
|
||||
static int tas2770_codec_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct tas2770_priv *tas2770 =
|
||||
@ -508,6 +510,7 @@ static int tas2770_codec_probe(struct snd_soc_component *component)
|
||||
}
|
||||
|
||||
tas2770_reset(tas2770);
|
||||
regmap_reinit_cache(tas2770->regmap, &tas2770_i2c_regmap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -698,6 +698,10 @@ static int imx_card_parse_of(struct imx_card_data *data)
|
||||
of_node_put(cpu);
|
||||
of_node_put(codec);
|
||||
of_node_put(platform);
|
||||
|
||||
cpu = NULL;
|
||||
codec = NULL;
|
||||
platform = NULL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -266,6 +266,16 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = {
|
||||
.driver_data = (void *)(SOF_SDW_TGL_HDMI |
|
||||
SOF_SDW_FOUR_SPK),
|
||||
},
|
||||
{
|
||||
.callback = sof_sdw_quirk_cb,
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
|
||||
DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0AFF")
|
||||
},
|
||||
.driver_data = (void *)(SOF_SDW_TGL_HDMI |
|
||||
RT711_JD2 |
|
||||
SOF_SDW_FOUR_SPK),
|
||||
},
|
||||
{
|
||||
.callback = sof_sdw_quirk_cb,
|
||||
.matches = {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user