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ARM: dts: qcom: ipq4019: correct SDHCI XO clock

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[ Upstream commit b5ed7a5c1fdb3981713f7b637b72aa390c3db036 ]

Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
it seems that I somehow made a mistake of passing it instead of the fixed
XO clock.

Fixes: 04b3b72b5b ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811110150.229966-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Robert Marko 2023-08-11 13:01:16 +02:00 committed by Greg Kroah-Hartman
parent 4d6a25792f
commit 1e47d1ac20
1 changed files with 6 additions and 3 deletions
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9
arch/arm/boot/dts/qcom-ipq4019.dtsi
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@ -228,9 +228,12 @@ sdhci: mmc@7824900 {
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
bus-width = <8>;
clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_DCD_XO_CLK>;
clock-names = "iface", "core", "xo";
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo>;
clock-names = "iface",
"core",
"xo";
status = "disabled";
};