IIO: Ingenic JZ47xx: Error check clk_enable calls.
Introduce error checks for the clk_enable calls used in this driver. As part of the changes, move clk_enable/clk_disable calls out of ingenic_adc_set_config and into respective logic of its callers. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Tested-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -73,7 +73,6 @@ static void ingenic_adc_set_config(struct ingenic_adc *adc,
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{
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uint32_t cfg;
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clk_enable(adc->clk);
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mutex_lock(&adc->lock);
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cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
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@ -81,7 +80,6 @@ static void ingenic_adc_set_config(struct ingenic_adc *adc,
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writel(cfg, adc->base + JZ_ADC_REG_CFG);
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mutex_unlock(&adc->lock);
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clk_disable(adc->clk);
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}
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static void ingenic_adc_enable(struct ingenic_adc *adc,
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@ -124,6 +122,8 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
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long m)
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{
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struct ingenic_adc *adc = iio_priv(iio_dev);
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struct device *dev = iio_dev->dev.parent;
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_SCALE:
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@ -131,6 +131,14 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
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case INGENIC_ADC_BATTERY:
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if (!adc->soc_data->battery_vref_mode)
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return -EINVAL;
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ret = clk_enable(adc->clk);
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if (ret) {
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dev_err(dev, "Failed to enable clock: %d\n",
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ret);
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return ret;
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}
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if (val > JZ_ADC_BATTERY_LOW_VREF) {
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ingenic_adc_set_config(adc,
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JZ_ADC_REG_CFG_BAT_MD,
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@ -142,6 +150,9 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev,
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JZ_ADC_REG_CFG_BAT_MD);
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adc->low_vref_mode = true;
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}
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clk_disable(adc->clk);
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return 0;
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default:
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return -EINVAL;
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@ -312,11 +323,19 @@ static int ingenic_adc_read_avail(struct iio_dev *iio_dev,
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};
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}
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static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
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static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev,
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struct iio_chan_spec const *chan,
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int *val)
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{
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int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY);
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struct ingenic_adc *adc = iio_priv(iio_dev);
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ret = clk_enable(adc->clk);
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if (ret) {
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dev_err(iio_dev->dev.parent, "Failed to enable clock: %d\n",
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ret);
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return ret;
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}
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/* We cannot sample AUX/AUX2 in parallel. */
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mutex_lock(&adc->aux_lock);
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@ -325,7 +344,6 @@ static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
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ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit);
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}
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clk_enable(adc->clk);
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ret = ingenic_adc_capture(adc, engine);
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if (ret)
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goto out;
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@ -342,8 +360,8 @@ static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc,
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ret = IIO_VAL_INT;
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out:
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clk_disable(adc->clk);
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mutex_unlock(&adc->aux_lock);
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clk_disable(adc->clk);
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return ret;
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}
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@ -358,7 +376,7 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev,
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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return ingenic_adc_read_chan_info_raw(adc, chan, val);
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return ingenic_adc_read_chan_info_raw(iio_dev, chan, val);
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case IIO_CHAN_INFO_SCALE:
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switch (chan->channel) {
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case INGENIC_ADC_AUX:
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