thunderbolt: Rename EEPROM handling bits to match USB4 spec
The structure `tb_eeprom_ctl` is used to show the bits accessed when reading/writing EEPROM. As this structure is specified in the USB4 spec as `VSC_CS_4` update the names and use of members to match the specification. This should not change anything functionally. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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@ -17,7 +17,7 @@
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*/
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static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
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{
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return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
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return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1);
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}
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/*
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@ -25,7 +25,7 @@ static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
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*/
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static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
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{
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return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
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return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1);
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}
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enum tb_eeprom_transfer {
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@ -46,18 +46,18 @@ static int tb_eeprom_active(struct tb_switch *sw, bool enable)
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if (res)
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return res;
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if (enable) {
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ctl.access_high = 1;
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ctl.bit_banging_enable = 1;
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res = tb_eeprom_ctl_write(sw, &ctl);
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if (res)
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return res;
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ctl.access_low = 0;
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ctl.fl_cs = 0;
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return tb_eeprom_ctl_write(sw, &ctl);
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} else {
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ctl.access_low = 1;
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ctl.fl_cs = 1;
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res = tb_eeprom_ctl_write(sw, &ctl);
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if (res)
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return res;
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ctl.access_high = 0;
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ctl.bit_banging_enable = 0;
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return tb_eeprom_ctl_write(sw, &ctl);
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}
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}
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@ -65,8 +65,8 @@ static int tb_eeprom_active(struct tb_switch *sw, bool enable)
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/*
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* tb_eeprom_transfer - transfer one bit
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*
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* If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in.
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* If TB_EEPROM_OUT is passed, then ctl->data_out will be written.
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* If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->fl_do.
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* If TB_EEPROM_OUT is passed, then ctl->fl_di will be written.
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*/
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static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
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enum tb_eeprom_transfer direction)
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@ -77,7 +77,7 @@ static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
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if (res)
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return res;
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}
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ctl->clock = 1;
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ctl->fl_sk = 1;
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res = tb_eeprom_ctl_write(sw, ctl);
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if (res)
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return res;
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@ -86,7 +86,7 @@ static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
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if (res)
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return res;
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}
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ctl->clock = 0;
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ctl->fl_sk = 0;
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return tb_eeprom_ctl_write(sw, ctl);
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}
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@ -101,7 +101,7 @@ static int tb_eeprom_out(struct tb_switch *sw, u8 val)
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if (res)
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return res;
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for (i = 0; i < 8; i++) {
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ctl.data_out = val & 0x80;
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ctl.fl_di = val & 0x80;
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res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT);
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if (res)
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return res;
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@ -126,7 +126,7 @@ static int tb_eeprom_in(struct tb_switch *sw, u8 *val)
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res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN);
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if (res)
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return res;
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*val |= ctl.data_in;
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*val |= ctl.fl_do;
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}
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return 0;
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}
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@ -133,11 +133,11 @@ struct tb_cap_phy {
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} __packed;
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struct tb_eeprom_ctl {
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bool clock:1; /* send pulse to transfer one bit */
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bool access_low:1; /* set to 0 before access */
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bool data_out:1; /* to eeprom */
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bool data_in:1; /* from eeprom */
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bool access_high:1; /* set to 1 before access */
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bool fl_sk:1; /* send pulse to transfer one bit */
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bool fl_cs:1; /* set to 0 before access */
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bool fl_di:1; /* to eeprom */
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bool fl_do:1; /* from eeprom */
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bool bit_banging_enable:1; /* set to 1 before access */
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bool not_present:1; /* should be 0 */
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bool unknown1:1;
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bool present:1; /* should be 1 */
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