Merge a33f5c380c ("Merge tag 'xfs-5.17-merge-3' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux") into android-mainline
Steps on the way to 5.17-rc1 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I2837db6408d3466ee479e9cd18b027299c9d8ed9
This commit is contained in:
Greg Kroah-Hartman
commit
0d33650c09
@ -21,11 +21,11 @@ Description: Allow the root user to disable/enable in runtime the clock
|
||||
a different engine to disable/enable its clock gating feature.
|
||||
The bitmask is composed of 20 bits:
|
||||
|
||||
======= ============
|
||||
======= ============
|
||||
0 - 7 DMA channels
|
||||
8 - 11 MME engines
|
||||
12 - 19 TPC engines
|
||||
======= ============
|
||||
======= ============
|
||||
|
||||
The bit's location of a specific engine can be determined
|
||||
using (1 << GAUDI_ENGINE_ID_*). GAUDI_ENGINE_ID_* values
|
||||
@ -155,6 +155,13 @@ Description: Triggers an I2C transaction that is generated by the device's
|
||||
CPU. Writing to this file generates a write transaction while
|
||||
reading from the file generates a read transaction
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_len
|
||||
Date: Dec 2021
|
||||
KernelVersion: 5.17
|
||||
Contact: obitton@habana.ai
|
||||
Description: Sets I2C length in bytes for I2C transaction that is generated by
|
||||
the device's CPU
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_reg
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
@ -226,12 +233,6 @@ Description: Gets the state dump occurring on a CS timeout or failure.
|
||||
Writing an integer X discards X state dumps, so that the
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||||
next read would return X+1-st newest state dump.
|
||||
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||||
What: /sys/kernel/debug/habanalabs/hl<n>/timeout_locked
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||||
Date: Sep 2021
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KernelVersion: 5.16
|
||||
Contact: obitton@habana.ai
|
||||
Description: Sets the command submission timeout value in seconds.
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err
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||||
Date: Mar 2020
|
||||
KernelVersion: 5.6
|
||||
@ -239,6 +240,12 @@ Contact: ogabbay@kernel.org
|
||||
Description: Sets the stop-on_error option for the device engines. Value of
|
||||
"0" is for disable, otherwise enable.
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/timeout_locked
|
||||
Date: Sep 2021
|
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KernelVersion: 5.16
|
||||
Contact: obitton@habana.ai
|
||||
Description: Sets the command submission timeout value in seconds.
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/userptr
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||||
Date: Jan 2019
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KernelVersion: 5.1
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||||
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16
Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818
Normal file
16
Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818
Normal file
@ -0,0 +1,16 @@
|
||||
What: /sys/bus/iio/devices/iio:deviceX/filter_mode_available
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
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||||
Description:
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||||
Reading this returns the valid values that can be written to the
|
||||
on_altvoltage0_mode attribute:
|
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|
||||
- auto -> Adjust bandpass filter to track changes in input clock rate.
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- manual -> disable/unregister the clock rate notifier / input clock tracking.
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||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/filter_mode
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||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
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||||
Description:
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||||
This attribute configures the filter mode.
|
||||
Reading returns the actual mode.
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||||
38
Documentation/ABI/testing/sysfs-bus-iio-frequency-admv1013
Normal file
38
Documentation/ABI/testing/sysfs-bus-iio-frequency-admv1013
Normal file
@ -0,0 +1,38 @@
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_i_calibphase
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
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||||
Read/write unscaled value for the Local Oscillatior path quadrature I phase shift.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_q_calibphase
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Read/write unscaled value for the Local Oscillatior path quadrature Q phase shift.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0_i_calibbias
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Read/write value for the Local Oscillatior Feedthrough Offset Calibration I Positive
|
||||
side.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0_q_calibbias
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Read/write value for the Local Oscillatior Feedthrough Offset Calibration Q Positive side.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage1_i_calibbias
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
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||||
Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration I Negative
|
||||
side.
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||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage1_q_calibbias
|
||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
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||||
Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration Q Negative
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||||
side.
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||||
@ -3397,7 +3397,7 @@
|
||||
Disable SMAP (Supervisor Mode Access Prevention)
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||||
even if it is supported by processor.
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||||
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nosmep [X86,PPC]
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nosmep [X86,PPC64s]
|
||||
Disable SMEP (Supervisor Mode Execution Prevention)
|
||||
even if it is supported by processor.
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||||
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||||
@ -4170,6 +4170,14 @@
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||||
Override pmtimer IOPort with a hex value.
|
||||
e.g. pmtmr=0x508
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||||
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||||
pmu_override= [PPC] Override the PMU.
|
||||
This option takes over the PMU facility, so it is no
|
||||
longer usable by perf. Setting this option starts the
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||||
PMU counters by setting MMCR0 to 0 (the FC bit is
|
||||
cleared). If a number is given, then MMCR1 is set to
|
||||
that number, otherwise (e.g., 'pmu_override=on'), MMCR1
|
||||
remains 0.
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||||
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||||
pm_debug_messages [SUSPEND,KNL]
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||||
Enable suspend/resume debug messages during boot up.
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||||
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||||
@ -6498,6 +6506,12 @@
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||||
controller on both pseries and powernv
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||||
platforms. Only useful on POWER9 and above.
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||||
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xive.store-eoi=off [PPC]
|
||||
By default on POWER10 and above, the kernel will use
|
||||
stores for EOI handling when the XIVE interrupt mode
|
||||
is active. This option allows the XIVE driver to use
|
||||
loads instead, as on POWER9.
|
||||
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||||
xhci-hcd.quirks [USB,KNL]
|
||||
A hex value specifying bitmask with supplemental xhci
|
||||
host controller quirks. Meaning of each bit can be
|
||||
|
||||
@ -86,6 +86,10 @@ properties:
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||||
pattern: c1024$
|
||||
- items:
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||||
pattern: cs1024$
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||||
- items:
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||||
pattern: c1025$
|
||||
- items:
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||||
pattern: cs1025$
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||||
- items:
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||||
pattern: c2048$
|
||||
- items:
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||||
@ -95,17 +99,20 @@ properties:
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||||
# These are special cases that don't conform to the above pattern.
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# Each requires a standard at24 model as fallback.
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- items:
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||||
- const: nxp,se97b
|
||||
- enum:
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||||
- rohm,br24g01
|
||||
- rohm,br24t01
|
||||
- const: atmel,24c01
|
||||
- items:
|
||||
- enum:
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||||
- nxp,se97b
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||||
- renesas,r1ex24002
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||||
- const: atmel,24c02
|
||||
- items:
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||||
- const: onnn,cat24c04
|
||||
- enum:
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||||
- onnn,cat24c04
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||||
- onnn,cat24c05
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- const: atmel,24c04
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||||
- items:
|
||||
- const: onnn,cat24c05
|
||||
- const: atmel,24c04
|
||||
- items:
|
||||
- const: renesas,r1ex24002
|
||||
- const: atmel,24c02
|
||||
- items:
|
||||
- const: renesas,r1ex24016
|
||||
- const: atmel,24c16
|
||||
@ -115,12 +122,6 @@ properties:
|
||||
- items:
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||||
- const: renesas,r1ex24128
|
||||
- const: atmel,24c128
|
||||
- items:
|
||||
- const: rohm,br24g01
|
||||
- const: atmel,24c01
|
||||
- items:
|
||||
- const: rohm,br24t01
|
||||
- const: atmel,24c01
|
||||
|
||||
label:
|
||||
description: Descriptive name of the EEPROM.
|
||||
|
||||
@ -1,22 +0,0 @@
|
||||
Broadcom BCM2835 I2C controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be one of:
|
||||
"brcm,bcm2711-i2c"
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||||
"brcm,bcm2835-i2c"
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||||
- reg: Should contain register location and length.
|
||||
- interrupts: Should contain interrupt.
|
||||
- clocks : The clock feeding the I2C controller.
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||||
|
||||
Recommended properties:
|
||||
- clock-frequency : desired I2C bus clock frequency in Hz.
|
||||
|
||||
Example:
|
||||
|
||||
i2c@7e205000 {
|
||||
compatible = "brcm,bcm2835-i2c";
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||||
reg = <0x7e205000 0x1000>;
|
||||
interrupts = <2 21>;
|
||||
clocks = <&clk_i2c>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
54
Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.yaml
Normal file
54
Documentation/devicetree/bindings/i2c/brcm,bcm2835-i2c.yaml
Normal file
@ -0,0 +1,54 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/i2c/brcm,bcm2835-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom BCM2835 I2C controller
|
||||
|
||||
maintainers:
|
||||
- Stephen Warren <swarren@wwwdotorg.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
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||||
oneOf:
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||||
- enum:
|
||||
- brcm,bcm2835-i2c
|
||||
- items:
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||||
- const: brcm,bcm2711-i2c
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||||
- const: brcm,bcm2835-i2c
|
||||
|
||||
reg:
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||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-frequency: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c@7e205000 {
|
||||
compatible = "brcm,bcm2835-i2c";
|
||||
reg = <0x7e205000 0x1000>;
|
||||
interrupts = <2 21>;
|
||||
clocks = <&clk_i2c>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
@ -1,53 +0,0 @@
|
||||
* Samsung's High Speed I2C controller
|
||||
|
||||
The Samsung's High Speed I2C controller is used to interface with I2C devices
|
||||
at various speeds ranging from 100khz to 3.4Mhz.
|
||||
|
||||
Required properties:
|
||||
- compatible: value should be.
|
||||
-> "samsung,exynos5-hsi2c", (DEPRECATED)
|
||||
for i2c compatible with HSI2C available
|
||||
on Exynos5250 and Exynos5420 SoCs.
|
||||
-> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
|
||||
on Exynos5250 and Exynos5420 SoCs.
|
||||
-> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
|
||||
on Exynos5260 SoCs.
|
||||
-> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
|
||||
on Exynos7 SoCs.
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: interrupt number to the cpu.
|
||||
- #address-cells: always 1 (for i2c addresses)
|
||||
- #size-cells: always 0
|
||||
|
||||
- Pinctrl:
|
||||
- pinctrl-0: Pin control group to be used for this controller.
|
||||
- pinctrl-names: Should contain only one value - "default".
|
||||
|
||||
Optional properties:
|
||||
- clock-frequency: Desired operating frequency in Hz of the bus.
|
||||
-> If not specified, the bus operates in fast-speed mode at
|
||||
at 100khz.
|
||||
-> If specified, the bus operates in high-speed mode only if the
|
||||
clock-frequency is >= 1Mhz.
|
||||
|
||||
Example:
|
||||
|
||||
hsi2c@12ca0000 {
|
||||
compatible = "samsung,exynos5250-hsi2c";
|
||||
reg = <0x12ca0000 0x100>;
|
||||
interrupts = <56>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
pinctrl-0 = <&i2c4_bus>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
s2mps11_pmic@66 {
|
||||
compatible = "samsung,s2mps11-pmic";
|
||||
reg = <0x66>;
|
||||
};
|
||||
};
|
||||
133
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Normal file
133
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Normal file
@ -0,0 +1,133 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung's High Speed I2C controller
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
||||
|
||||
description: |
|
||||
The Samsung's High Speed I2C controller is used to interface with I2C devices
|
||||
at various speeds ranging from 100kHz to 3.4MHz.
|
||||
|
||||
In case the HSI2C controller is encapsulated within USI block (it's the case
|
||||
e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
|
||||
define USI node in device tree file, choosing "i2c" configuration. Please see
|
||||
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
|
||||
- samsung,exynos5260-hsi2c # Exynos5260
|
||||
- samsung,exynos7-hsi2c # Exynos7
|
||||
- samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850
|
||||
- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clock-frequency:
|
||||
default: 100000
|
||||
description:
|
||||
Desired operating frequency in Hz of the bus.
|
||||
|
||||
If not specified, the bus operates in fast-speed mode at 100kHz.
|
||||
|
||||
If specified, the bus operates in high-speed mode only if the
|
||||
clock-frequency is >= 1MHz.
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: I2C operating clock
|
||||
- description: Bus clock (APB)
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: hsi2c
|
||||
- const: hsi2c_pclk
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynosautov9-hsi2c
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
|
||||
required:
|
||||
- clock-names
|
||||
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos5420.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
hsi2c_8: i2c@12e00000 {
|
||||
compatible = "samsung,exynos5250-hsi2c";
|
||||
reg = <0x12e00000 0x1000>;
|
||||
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&clock CLK_USI4>;
|
||||
clock-names = "hsi2c";
|
||||
|
||||
pmic@66 {
|
||||
/* compatible = "samsung,s2mps11-pmic"; */
|
||||
reg = <0x66>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos850.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
hsi2c_2: i2c@138c0000 {
|
||||
compatible = "samsung,exynosautov9-hsi2c";
|
||||
reg = <0x138c0000 0xc0>;
|
||||
interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
|
||||
<&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
|
||||
clock-names = "hsi2c", "hsi2c_pclk";
|
||||
|
||||
pmic@66 {
|
||||
/* compatible = "samsung,s2mps11-pmic"; */
|
||||
reg = <0x66>;
|
||||
};
|
||||
};
|
||||
@ -20,7 +20,9 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx8qxp-lpi2c
|
||||
- fsl,imx8dxl-lpi2c
|
||||
- fsl,imx8qm-lpi2c
|
||||
- fsl,imx8ulp-lpi2c
|
||||
- const: fsl,imx7ulp-lpi2c
|
||||
|
||||
reg:
|
||||
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: ADC found on Freescale vf610 and similar SoCs
|
||||
|
||||
maintainers:
|
||||
- Fugang Duan <fugang.duan@nxp.com>
|
||||
- Haibo Chen <haibo.chen@nxp.com>
|
||||
|
||||
description:
|
||||
ADCs found on vf610/i.MX6slx and upward SoCs from Freescale.
|
||||
|
||||
@ -27,6 +27,7 @@ description: |
|
||||
8 | batt_v
|
||||
9 | batt_chrg_i
|
||||
10 | batt_dischrg_i
|
||||
11 | ts_v
|
||||
|
||||
AXP22x
|
||||
------
|
||||
@ -34,6 +35,7 @@ description: |
|
||||
1 | batt_v
|
||||
2 | batt_chrg_i
|
||||
3 | batt_dischrg_i
|
||||
4 | ts_v
|
||||
|
||||
AXP813
|
||||
------
|
||||
@ -42,6 +44,7 @@ description: |
|
||||
2 | batt_v
|
||||
3 | batt_chrg_i
|
||||
4 | batt_dischrg_i
|
||||
5 | ts_v
|
||||
|
||||
|
||||
properties:
|
||||
|
||||
227
Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
Normal file
227
Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
Normal file
@ -0,0 +1,227 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xilinx Zynq Ultrascale AMS controller
|
||||
|
||||
maintainers:
|
||||
- Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
|
||||
|
||||
description: |
|
||||
The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
|
||||
that can be used to sample external voltages and monitor on-die operating
|
||||
conditions, such as temperature and supply voltage levels.
|
||||
The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
|
||||
PS (Processing System) SYSMON.
|
||||
All designs should have AMS registers, but PS and PL are optional. The
|
||||
AMS controller can work with only PS, only PL and both PS and PL
|
||||
configurations. Please specify registers according to your design. Devicetree
|
||||
should always have AMS module property. Providing PS & PL module is optional.
|
||||
|
||||
AMS Channel Details
|
||||
```````````````````
|
||||
Sysmon Block |Channel| Details |Measurement
|
||||
|Number | |Type
|
||||
---------------------------------------------------------------------------------------------------------
|
||||
AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage
|
||||
|1 |Battery voltage measurement, VCC_PSBATT. |Voltage
|
||||
|2 |PL Internal voltage measurement, VCCINT. |Voltage
|
||||
|3 |Block RAM voltage measurement, VCCBRAM. |Voltage
|
||||
|4 |PL Aux voltage measurement, VCCAUX. |Voltage
|
||||
|5 |Voltage measurement for six DDR I/O PLLs, VCC_PSDDR_PLL. |Voltage
|
||||
|6 |VCC_PSINTFP_DDR voltage measurement. |Voltage
|
||||
---------------------------------------------------------------------------------------------------------
|
||||
PS Sysmon |7 |LPD temperature measurement. |Temperature
|
||||
|8 |FPD temperature measurement (REMOTE). |Temperature
|
||||
|9 |VCC PS LPD voltage measurement (supply1). |Voltage
|
||||
|10 |VCC PS FPD voltage measurement (supply2). |Voltage
|
||||
|11 |PS Aux voltage reference (supply3). |Voltage
|
||||
|12 |DDR I/O VCC voltage measurement. |Voltage
|
||||
|13 |PS IO Bank 503 voltage measurement (supply5). |Voltage
|
||||
|14 |PS IO Bank 500 voltage measurement (supply6). |Voltage
|
||||
|15 |VCCO_PSIO1 voltage measurement. |Voltage
|
||||
|16 |VCCO_PSIO2 voltage measurement. |Voltage
|
||||
|17 |VCC_PS_GTR voltage measurement (VPS_MGTRAVCC). |Voltage
|
||||
|18 |VTT_PS_GTR voltage measurement (VPS_MGTRAVTT). |Voltage
|
||||
|19 |VCC_PSADC voltage measurement. |Voltage
|
||||
---------------------------------------------------------------------------------------------------------
|
||||
PL Sysmon |20 |PL temperature measurement. |Temperature
|
||||
|21 |PL Internal voltage measurement, VCCINT. |Voltage
|
||||
|22 |PL Auxiliary voltage measurement, VCCAUX. |Voltage
|
||||
|23 |ADC Reference P+ voltage measurement. |Voltage
|
||||
|24 |ADC Reference N- voltage measurement. |Voltage
|
||||
|25 |PL Block RAM voltage measurement, VCCBRAM. |Voltage
|
||||
|26 |LPD Internal voltage measurement, VCC_PSINTLP (supply4). |Voltage
|
||||
|27 |FPD Internal voltage measurement, VCC_PSINTFP (supply5). |Voltage
|
||||
|28 |PS Auxiliary voltage measurement (supply6). |Voltage
|
||||
|29 |PL VCCADC voltage measurement (vccams). |Voltage
|
||||
|30 |Differential analog input signal voltage measurment. |Voltage
|
||||
|31 |VUser0 voltage measurement (supply7). |Voltage
|
||||
|32 |VUser1 voltage measurement (supply8). |Voltage
|
||||
|33 |VUser2 voltage measurement (supply9). |Voltage
|
||||
|34 |VUser3 voltage measurement (supply10). |Voltage
|
||||
|35 |Auxiliary ch 0 voltage measurement (VAux0). |Voltage
|
||||
|36 |Auxiliary ch 1 voltage measurement (VAux1). |Voltage
|
||||
|37 |Auxiliary ch 2 voltage measurement (VAux2). |Voltage
|
||||
|38 |Auxiliary ch 3 voltage measurement (VAux3). |Voltage
|
||||
|39 |Auxiliary ch 4 voltage measurement (VAux4). |Voltage
|
||||
|40 |Auxiliary ch 5 voltage measurement (VAux5). |Voltage
|
||||
|41 |Auxiliary ch 6 voltage measurement (VAux6). |Voltage
|
||||
|42 |Auxiliary ch 7 voltage measurement (VAux7). |Voltage
|
||||
|43 |Auxiliary ch 8 voltage measurement (VAux8). |Voltage
|
||||
|44 |Auxiliary ch 9 voltage measurement (VAux9). |Voltage
|
||||
|45 |Auxiliary ch 10 voltage measurement (VAux10). |Voltage
|
||||
|46 |Auxiliary ch 11 voltage measurement (VAux11). |Voltage
|
||||
|47 |Auxiliary ch 12 voltage measurement (VAux12). |Voltage
|
||||
|48 |Auxiliary ch 13 voltage measurement (VAux13). |Voltage
|
||||
|49 |Auxiliary ch 14 voltage measurement (VAux14). |Voltage
|
||||
|50 |Auxiliary ch 15 voltage measurement (VAux15). |Voltage
|
||||
--------------------------------------------------------------------------------------------------------
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- xlnx,zynqmp-ams
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
description: AMS Controller register space
|
||||
maxItems: 1
|
||||
|
||||
ranges:
|
||||
description:
|
||||
Maps the child address space for PS and/or PL.
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
'#io-channel-cells':
|
||||
const: 1
|
||||
|
||||
ams-ps@0:
|
||||
type: object
|
||||
description: |
|
||||
PS (Processing System) SYSMON is memory mapped to PS. This block has
|
||||
built-in alarm generation logic that is used to interrupt the processor
|
||||
based on condition set.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- xlnx,zynqmp-ams-ps
|
||||
|
||||
reg:
|
||||
description: Register Space for PS-SYSMON
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
ams-pl@400:
|
||||
type: object
|
||||
description:
|
||||
PL-SYSMON is capable of monitoring off chip voltage and temperature.
|
||||
PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
|
||||
from external master. Out of this interface currently only DRP is
|
||||
supported. This block has alarm generation logic that is used to
|
||||
interrupt the processor based on condition set.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-ams-pl
|
||||
|
||||
reg:
|
||||
description: Register Space for PL-SYSMON.
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@([2-4][0-9]|50)$":
|
||||
type: object
|
||||
description:
|
||||
Describes the external channels connected.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Pair of pins the channel is connected to. This value is
|
||||
same as Channel Number for a particular channel.
|
||||
minimum: 20
|
||||
maximum: 50
|
||||
|
||||
xlnx,bipolar:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
type: boolean
|
||||
description:
|
||||
If the set channel is used in bipolar mode.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
xilinx_ams: ams@ffa50000 {
|
||||
compatible = "xlnx,zynqmp-ams";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 56 4>;
|
||||
reg = <0x0 0xffa50000 0x0 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#io-channel-cells = <1>;
|
||||
ranges = <0 0 0xffa50800 0x800>;
|
||||
|
||||
ams_ps: ams-ps@0 {
|
||||
compatible = "xlnx,zynqmp-ams-ps";
|
||||
reg = <0 0x400>;
|
||||
};
|
||||
|
||||
ams_pl: ams-pl@400 {
|
||||
compatible = "xlnx,zynqmp-ams-pl";
|
||||
reg = <0x400 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@30 {
|
||||
reg = <30>;
|
||||
xlnx,bipolar;
|
||||
};
|
||||
channel@31 {
|
||||
reg = <31>;
|
||||
};
|
||||
channel@38 {
|
||||
reg = <38>;
|
||||
xlnx,bipolar;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
158
Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
Normal file
158
Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
Normal file
@ -0,0 +1,158 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/addac/adi,ad74413r.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD74412R/AD74413R device
|
||||
|
||||
maintainers:
|
||||
- Cosmin Tanislav <cosmin.tanislav@analog.com>
|
||||
|
||||
description: |
|
||||
The AD74412R and AD74413R are quad-channel software configurable input/output
|
||||
solutions for building and process control applications. They contain
|
||||
functionality for analog output, analog input, digital input, resistance
|
||||
temperature detector, and thermocouple measurements integrated
|
||||
into a single chip solution with an SPI interface.
|
||||
The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide
|
||||
four configurable input/output channels and a suite of diagnostic functions.
|
||||
The AD74413R differentiates itself from the AD74412R by being HART-compatible.
|
||||
https://www.analog.com/en/products/ad74412r.html
|
||||
https://www.analog.com/en/products/ad74413r.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad74412r
|
||||
- adi,ad74413r
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
refin-supply: true
|
||||
|
||||
shunt-resistor-micro-ohms:
|
||||
description:
|
||||
Shunt (sense) resistor value in micro-Ohms.
|
||||
default: 100000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
- spi-cpol
|
||||
- refin-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
"^channel@[0-3]$":
|
||||
type: object
|
||||
description: Represents the external channels which are connected to the device.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
The channel number. It can have up to 4 channels numbered from 0 to 3.
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
adi,ch-func:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Channel function.
|
||||
HART functions are not supported on AD74412R.
|
||||
0 - CH_FUNC_HIGH_IMPEDANCE
|
||||
1 - CH_FUNC_VOLTAGE_OUTPUT
|
||||
2 - CH_FUNC_CURRENT_OUTPUT
|
||||
3 - CH_FUNC_VOLTAGE_INPUT
|
||||
4 - CH_FUNC_CURRENT_INPUT_EXT_POWER
|
||||
5 - CH_FUNC_CURRENT_INPUT_LOOP_POWER
|
||||
6 - CH_FUNC_RESISTANCE_INPUT
|
||||
7 - CH_FUNC_DIGITAL_INPUT_LOGIC
|
||||
8 - CH_FUNC_DIGITAL_INPUT_LOOP_POWER
|
||||
9 - CH_FUNC_CURRENT_INPUT_EXT_POWER_HART
|
||||
10 - CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART
|
||||
minimum: 0
|
||||
maximum: 10
|
||||
default: 0
|
||||
|
||||
adi,gpo-comparator:
|
||||
type: boolean
|
||||
description: |
|
||||
Whether to configure GPO as a comparator or not.
|
||||
When not configured as a comparator, the GPO will be treated as an
|
||||
output-only GPIO.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/iio/addac/adi,ad74413r.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
ad74413r@0 {
|
||||
compatible = "adi,ad74413r";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
refin-supply = <&ad74413r_refin>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_VOLTAGE_OUTPUT>;
|
||||
};
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_CURRENT_OUTPUT>;
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
reg = <2>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_DIGITAL_INPUT_LOGIC>;
|
||||
adi,gpo-comparator;
|
||||
};
|
||||
|
||||
channel@3 {
|
||||
reg = <3>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_CURRENT_INPUT_EXT_POWER>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
217
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
Normal file
217
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
Normal file
@ -0,0 +1,217 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2020 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad3552r.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD2552R DAC device driver
|
||||
|
||||
maintainers:
|
||||
- Mihail Chindris <mihail.chindris@analog.com>
|
||||
|
||||
description: |
|
||||
Bindings for the Analog Devices AD3552R DAC device and similar.
|
||||
Datasheet can be found here:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad3542r
|
||||
- adi,ad3552r
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 30000000
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
ldac-gpios:
|
||||
description: |
|
||||
LDAC pin to be used as a hardware trigger to update the DAC channels.
|
||||
maxItems: 1
|
||||
|
||||
vref-supply:
|
||||
description:
|
||||
The regulator to use as an external reference. If it does not exists the
|
||||
internal reference will be used. External reference must be 2.5V
|
||||
|
||||
adi,vref-out-en:
|
||||
description: Vref I/O driven by internal vref to 2.5V. If not set, Vref pin
|
||||
will be floating.
|
||||
type: boolean
|
||||
|
||||
adi,sdo-drive-strength:
|
||||
description: |
|
||||
Configure SDIO0 and SDIO1 strength levels:
|
||||
- 0: low SDO drive strength.
|
||||
- 1: medium low SDO drive strength.
|
||||
- 2: medium high SDO drive strength.
|
||||
- 3: high SDO drive strength
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
description: Configurations of the DAC Channels
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Channel number
|
||||
enum: [0, 1]
|
||||
|
||||
adi,output-range-microvolt: true
|
||||
|
||||
custom-output-range-config:
|
||||
type: object
|
||||
description: Configuration of custom range when
|
||||
adi,output-range-microvolt is not present.
|
||||
The formulas for calculation the output voltages are
|
||||
Vout_fs = 2.5 + [(GainN + Offset/1024) * 2.5 * Rfbx * 1.03]
|
||||
Vout_zs = 2.5 - [(GainP + Offset/1024) * 2.5 * Rfbx * 1.03]
|
||||
|
||||
properties:
|
||||
adi,gain-offset:
|
||||
description: Gain offset used in the above formula
|
||||
$ref: /schemas/types.yaml#/definitions/int32
|
||||
maximum: 511
|
||||
minimum: -511
|
||||
|
||||
adi,gain-scaling-p-inv-log2:
|
||||
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p-inv-log2)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
adi,gain-scaling-n-inv-log2:
|
||||
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n-inv-log2)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
adi,rfb-ohms:
|
||||
description: Feedback Resistor
|
||||
|
||||
required:
|
||||
- adi,gain-offset
|
||||
- adi,gain-scaling-p-inv-log2
|
||||
- adi,gain-scaling-n-inv-log2
|
||||
- adi,rfb-ohms
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
oneOf:
|
||||
# If adi,output-range-microvolt is missing,
|
||||
# custom-output-range-config must be used
|
||||
- required:
|
||||
- adi,output-range-microvolt
|
||||
|
||||
- required:
|
||||
- custom-output-range-config
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: adi,ad3542r
|
||||
then:
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
properties:
|
||||
adi,output-range-microvolt:
|
||||
description: |
|
||||
Voltage output range of the channel as <minimum, maximum>
|
||||
Required connections:
|
||||
Rfb1x for: 0 to 2.5 V; 0 to 3V; 0 to 5 V;
|
||||
Rfb2x for: 0 to 10 V; 2.5 to 7.5V; -5 to 5 V;
|
||||
oneOf:
|
||||
- items:
|
||||
- const: 0
|
||||
- enum: [2500000, 3000000, 5000000, 10000000]
|
||||
- items:
|
||||
- const: -2500000
|
||||
- const: 7500000
|
||||
- items:
|
||||
- const: -5000000
|
||||
- const: 5000000
|
||||
|
||||
required:
|
||||
- adi,output-range-microvolt
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: adi,ad3552r
|
||||
then:
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
properties:
|
||||
adi,output-range-microvolt:
|
||||
description: |
|
||||
Voltage output range of the channel as <minimum, maximum>
|
||||
Required connections:
|
||||
Rfb1x for: 0 to 2.5 V; 0 to 5 V;
|
||||
Rfb2x for: 0 to 10 V; -5 to 5 V;
|
||||
Rfb4x for: -10 to 10V
|
||||
oneOf:
|
||||
- items:
|
||||
- const: 0
|
||||
- enum: [2500000, 5000000, 10000000]
|
||||
- items:
|
||||
- const: -5000000
|
||||
- const: 5000000
|
||||
- items:
|
||||
- const: -10000000
|
||||
- const: 10000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ad3552r@0 {
|
||||
compatible = "adi,ad3552r";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
adi,output-range-microvolt = <0 10000000>;
|
||||
};
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
custom-output-range-config {
|
||||
adi,gain-offset = <5>;
|
||||
adi,gain-scaling-p-inv-log2 = <1>;
|
||||
adi,gain-scaling-n-inv-log2 = <2>;
|
||||
adi,rfb-ohms = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -125,7 +125,6 @@ oneOf:
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/iio/adi,ad5592r.h>
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
61
Documentation/devicetree/bindings/iio/dac/adi,ad7293.yaml
Normal file
61
Documentation/devicetree/bindings/iio/dac/adi,ad7293.yaml
Normal file
@ -0,0 +1,61 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad7293.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AD7293 12-Bit Power Amplifier Current Controller with ADC,
|
||||
DACs, Temperature and Current Sensors
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Power Amplifier drain current controller containing functionality
|
||||
for general-purpose monitoring and control of current, voltage,
|
||||
and temperature, integrated into a single chip solution with an
|
||||
SPI-compatible interface.
|
||||
|
||||
https://www.analog.com/en/products/ad7293.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7293
|
||||
|
||||
avdd-supply: true
|
||||
|
||||
vdrive-supply: true
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- vdrive-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ad7293@0 {
|
||||
compatible = "adi,ad7293";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
avdd-supply = <&avdd>;
|
||||
vdrive-supply = <&vdrive>;
|
||||
reset-gpios = <&gpio 10 0>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -0,0 +1,66 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/filter/adi,admv8818.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ADMV8818 Digitally Tunable, High-Pass and Low-Pass Filter
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Fully monolithic microwave integrated circuit (MMIC) that
|
||||
features a digitally selectable frequency of operation.
|
||||
The device features four independently controlled high-pass
|
||||
filters (HPFs) and four independently controlled low-pass filters
|
||||
(LPFs) that span the 2 GHz to 18 GHz frequency range.
|
||||
|
||||
https://www.analog.com/en/products/admv8818.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,admv8818
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 10000000
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Definition of the external clock.
|
||||
minItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: rf_in
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
admv8818@0 {
|
||||
compatible = "adi,admv8818";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
clocks = <&admv8818_rfin>;
|
||||
clock-names = "rf_in";
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -0,0 +1,91 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/frequency/adi,admv1013.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ADMV1013 Microwave Upconverter
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Wideband, microwave upconverter optimized for point to point microwave
|
||||
radio designs operating in the 24 GHz to 44 GHz frequency range.
|
||||
|
||||
https://www.analog.com/en/products/admv1013.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,admv1013
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Definition of the external clock.
|
||||
minItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: lo_in
|
||||
|
||||
vcm-supply:
|
||||
description:
|
||||
Analog voltage regulator.
|
||||
|
||||
adi,detector-enable:
|
||||
description:
|
||||
Enable the Envelope Detector available at output pins VENV_P and
|
||||
VENV_N. Disable to reduce power consumption.
|
||||
type: boolean
|
||||
|
||||
adi,input-mode:
|
||||
description:
|
||||
Select the input mode.
|
||||
iq - in-phase quadrature (I/Q) input
|
||||
if - complex intermediate frequency (IF) input
|
||||
enum: [iq, if]
|
||||
|
||||
adi,quad-se-mode:
|
||||
description:
|
||||
Switch the LO path from differential to single-ended operation.
|
||||
se-neg - Single-Ended Mode, Negative Side Disabled.
|
||||
se-pos - Single-Ended Mode, Positive Side Disabled.
|
||||
diff - Differential Mode.
|
||||
enum: [se-neg, se-pos, diff]
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- vcm-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
admv1013@0{
|
||||
compatible = "adi,admv1013";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
clocks = <&admv1013_lo>;
|
||||
clock-names = "lo_in";
|
||||
vcm-supply = <&vcm>;
|
||||
adi,quad-se-mode = "diff";
|
||||
adi,detector-enable;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -61,6 +61,13 @@ properties:
|
||||
type: boolean
|
||||
description: enable/disable internal i2c controller pullup resistors.
|
||||
|
||||
st,disable-sensor-hub:
|
||||
type: boolean
|
||||
description:
|
||||
Enable/disable internal i2c controller slave autoprobing at bootstrap.
|
||||
Disable sensor-hub is useful if i2c controller clock/data lines are
|
||||
connected through a pull-up with other chip lines (e.g. SDO/SA0).
|
||||
|
||||
drive-open-drain:
|
||||
type: boolean
|
||||
description:
|
||||
|
||||
@ -9,6 +9,9 @@ title: LiteON LTR501 I2C Proximity and Light sensor
|
||||
maintainers:
|
||||
- Nikita Travkin <nikita@trvn.ru>
|
||||
|
||||
allOf:
|
||||
- $ref: ../common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
@ -25,6 +28,8 @@ properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
proximity-near-level: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
@ -42,6 +47,8 @@ examples:
|
||||
light-sensor@23 {
|
||||
compatible = "liteon,ltr559";
|
||||
reg = <0x23>;
|
||||
proximity-near-level = <75>;
|
||||
|
||||
vdd-supply = <&pm8916_l17>;
|
||||
vddio-supply = <&pm8916_l6>;
|
||||
|
||||
|
||||
@ -18,6 +18,7 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-osm-l3
|
||||
- qcom,sc7280-epss-l3
|
||||
- qcom,sc8180x-osm-l3
|
||||
- qcom,sdm845-osm-l3
|
||||
- qcom,sm8150-osm-l3
|
||||
|
||||
137
Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
Normal file
137
Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
Normal file
@ -0,0 +1,137 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QCM2290 Network-On-Chip interconnect
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
|
||||
description: |
|
||||
The Qualcomm QCM2290 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qcm2290-bimc
|
||||
- qcom,qcm2290-cnoc
|
||||
- qcom,qcm2290-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
# Child node's properties
|
||||
patternProperties:
|
||||
'^interconnect-[a-z0-9]+$':
|
||||
type: object
|
||||
description:
|
||||
The interconnect providers do not have a separate QoS register space,
|
||||
but share parent's space.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qcm2290-qup-virt
|
||||
- qcom,qcm2290-mmrt-virt
|
||||
- qcom,qcm2290-mmnrt-virt
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
snoc: interconnect@1880000 {
|
||||
compatible = "qcom,qcm2290-snoc";
|
||||
reg = <0x01880000 0x60200>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
|
||||
qup_virt: interconnect-qup {
|
||||
compatible = "qcom,qcm2290-qup-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_QUP_CLK>,
|
||||
<&rpmcc RPM_SMD_QUP_A_CLK>;
|
||||
};
|
||||
|
||||
mmnrt_virt: interconnect-mmnrt {
|
||||
compatible = "qcom,qcm2290-mmnrt-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
|
||||
<&rpmcc RPM_SMD_MMNRT_A_CLK>;
|
||||
};
|
||||
|
||||
mmrt_virt: interconnect-mmrt {
|
||||
compatible = "qcom,qcm2290-mmrt-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
|
||||
<&rpmcc RPM_SMD_MMRT_A_CLK>;
|
||||
};
|
||||
};
|
||||
|
||||
cnoc: interconnect@1900000 {
|
||||
compatible = "qcom,qcm2290-cnoc";
|
||||
reg = <0x01900000 0x8200>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_CNOC_A_CLK>;
|
||||
};
|
||||
|
||||
bimc: interconnect@4480000 {
|
||||
compatible = "qcom,qcm2290-bimc";
|
||||
reg = <0x04480000 0x80000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
@ -27,22 +27,37 @@ properties:
|
||||
- qcom,msm8939-pcnoc
|
||||
- qcom,msm8939-snoc
|
||||
- qcom,msm8939-snoc-mm
|
||||
- qcom,msm8996-a0noc
|
||||
- qcom,msm8996-a1noc
|
||||
- qcom,msm8996-a2noc
|
||||
- qcom,msm8996-bimc
|
||||
- qcom,msm8996-cnoc
|
||||
- qcom,msm8996-mnoc
|
||||
- qcom,msm8996-pnoc
|
||||
- qcom,msm8996-snoc
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
- qcom,sdm660-a2noc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-mnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
minItems: 2
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
maxItems: 7
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -53,6 +68,120 @@ required:
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8916-bimc
|
||||
- qcom,msm8916-pcnoc
|
||||
- qcom,msm8916-snoc
|
||||
- qcom,msm8939-bimc
|
||||
- qcom,msm8939-pcnoc
|
||||
- qcom,msm8939-snoc
|
||||
- qcom,msm8939-snoc-mm
|
||||
- qcom,msm8996-a1noc
|
||||
- qcom,msm8996-a2noc
|
||||
- qcom,msm8996-bimc
|
||||
- qcom,msm8996-cnoc
|
||||
- qcom,msm8996-pnoc
|
||||
- qcom,msm8996-snoc
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-mnoc
|
||||
- qcom,sdm660-mnoc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: iface
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: CPU-NoC High-performance Bus Clock.
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-a0noc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: aggre0_snoc_axi
|
||||
- const: aggre0_cnoc_ahb
|
||||
- const: aggre0_noc_mpu_cfg
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Aggregate0 System NoC AXI Clock.
|
||||
- description: Aggregate0 Config NoC AHB Clock.
|
||||
- description: Aggregate0 NoC MPU Clock.
|
||||
|
||||
required:
|
||||
- power-domains
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: ipa
|
||||
- const: ufs_axi
|
||||
- const: aggre2_ufs_axi
|
||||
- const: aggre2_usb3_axi
|
||||
- const: cfg_noc_usb2_axi
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: IPA Clock.
|
||||
- description: UFS AXI Clock.
|
||||
- description: Aggregate2 UFS AXI Clock.
|
||||
- description: Aggregate2 USB3 AXI Clock.
|
||||
- description: Config NoC USB2 AXI Clock.
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
@ -104,6 +104,17 @@ properties:
|
||||
- qcom,sm8350-mmss-noc
|
||||
- qcom,sm8350-compute-noc
|
||||
- qcom,sm8350-system-noc
|
||||
- qcom,sm8450-aggre1-noc
|
||||
- qcom,sm8450-aggre2-noc
|
||||
- qcom,sm8450-clk-virt
|
||||
- qcom,sm8450-config-noc
|
||||
- qcom,sm8450-gem-noc
|
||||
- qcom,sm8450-lpass-ag-noc
|
||||
- qcom,sm8450-mc-virt
|
||||
- qcom,sm8450-mmss-noc
|
||||
- qcom,sm8450-nsp-noc
|
||||
- qcom,sm8450-pcie-anoc
|
||||
- qcom,sm8450-system-noc
|
||||
|
||||
'#interconnect-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
@ -1,185 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SDM660 Network-On-Chip interconnect
|
||||
|
||||
maintainers:
|
||||
- AngeloGioacchino Del Regno <kholk11@gmail.com>
|
||||
|
||||
description: |
|
||||
The Qualcomm SDM660 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-mnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-mnoc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: CPU-NoC High-performance Bus Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: iface
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: IPA Clock.
|
||||
- description: UFS AXI Clock.
|
||||
- description: Aggregate2 UFS AXI Clock.
|
||||
- description: Aggregate2 USB3 AXI Clock.
|
||||
- description: Config NoC USB2 AXI Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: ipa
|
||||
- const: ufs_axi
|
||||
- const: aggre2_ufs_axi
|
||||
- const: aggre2_usb3_axi
|
||||
- const: cfg_noc_usb2_axi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-snoc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
|
||||
|
||||
bimc: interconnect@1008000 {
|
||||
compatible = "qcom,sdm660-bimc";
|
||||
reg = <0x01008000 0x78000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
||||
cnoc: interconnect@1500000 {
|
||||
compatible = "qcom,sdm660-cnoc";
|
||||
reg = <0x01500000 0x10000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_CNOC_A_CLK>;
|
||||
};
|
||||
|
||||
snoc: interconnect@1626000 {
|
||||
compatible = "qcom,sdm660-snoc";
|
||||
reg = <0x01626000 0x7090>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
};
|
||||
|
||||
a2noc: interconnect@1704000 {
|
||||
compatible = "qcom,sdm660-a2noc";
|
||||
reg = <0x01704000 0xc100>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus",
|
||||
"bus_a",
|
||||
"ipa",
|
||||
"ufs_axi",
|
||||
"aggre2_ufs_axi",
|
||||
"aggre2_usb3_axi",
|
||||
"cfg_noc_usb2_axi";
|
||||
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
|
||||
<&rpmcc RPM_SMD_IPA_CLK>,
|
||||
<&gcc GCC_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
|
||||
};
|
||||
|
||||
mnoc: interconnect@1745000 {
|
||||
compatible = "qcom,sdm660-mnoc";
|
||||
reg = <0x01745000 0xa010>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a", "iface";
|
||||
clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,
|
||||
<&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>,
|
||||
<&mmcc AHB_CLK_SRC>;
|
||||
};
|
||||
|
||||
gnoc: interconnect@17900000 {
|
||||
compatible = "qcom,sdm660-gnoc";
|
||||
reg = <0x17900000 0xe000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&xo_board>, <&xo_board>;
|
||||
};
|
||||
@ -0,0 +1,38 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/mips/loongson/ls2k-reset.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Loongson 2K1000 PM Controller
|
||||
|
||||
maintainers:
|
||||
- Qing Zhang <zhangqing@loongson.cn>
|
||||
|
||||
description: |
|
||||
This controller can be found in Loongson-2K1000 Soc systems.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: loongson,ls2k-pm
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
pm: reset-controller@1fe07000 {
|
||||
compatible = "loongson,ls2k-pm";
|
||||
reg = <0 0x1fe07000 0 0x422>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -26,7 +26,10 @@ properties:
|
||||
List of gpios used to control the multiplexer, least significant bit first.
|
||||
|
||||
'#mux-control-cells':
|
||||
const: 0
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
'#mux-state-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
idle-state:
|
||||
default: -1
|
||||
@ -34,7 +37,11 @@ properties:
|
||||
required:
|
||||
- compatible
|
||||
- mux-gpios
|
||||
- "#mux-control-cells"
|
||||
anyOf:
|
||||
- required:
|
||||
- "#mux-control-cells"
|
||||
- required:
|
||||
- "#mux-state-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -25,6 +25,17 @@ description: |
|
||||
strings to label each of the mux controllers listed in the "mux-controls"
|
||||
property.
|
||||
|
||||
If it is required to provide the state that the mux controller needs to
|
||||
be set to, the property "mux-states" must be used. An optional property
|
||||
"mux-state-names" can be used to provide a list of strings, to label
|
||||
each of the multiplixer states listed in the "mux-states" property.
|
||||
|
||||
Properties "mux-controls" and "mux-states" can be used depending on how
|
||||
the consumers want to control the mux controller. If the consumer needs
|
||||
needs to set multiple states in a mux controller, then property
|
||||
"mux-controls" can be used. If the consumer needs to set the mux
|
||||
controller to a given state then property "mux-states" can be used.
|
||||
|
||||
mux-ctrl-specifier typically encodes the chip-relative mux controller number.
|
||||
If the mux controller chip only provides a single mux controller, the
|
||||
mux-ctrl-specifier can typically be left out.
|
||||
@ -35,12 +46,22 @@ properties:
|
||||
mux-controls:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
mux-states:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
mux-control-names:
|
||||
description:
|
||||
Devices that use more than a single mux controller can use the
|
||||
"mux-control-names" property to map the name of the requested mux
|
||||
controller to an index into the list given by the "mux-controls" property.
|
||||
|
||||
mux-state-names:
|
||||
description:
|
||||
Devices that use more than a single multiplexer state can use the
|
||||
"mux-state-names" property to map the name of the requested mux
|
||||
controller to an index into the list given by the "mux-states"
|
||||
property.
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
||||
@ -25,7 +25,9 @@ description: |
|
||||
--------------------
|
||||
|
||||
Mux controller nodes must specify the number of cells used for the
|
||||
specifier using the '#mux-control-cells' property.
|
||||
specifier using the '#mux-control-cells' or '#mux-state-cells' property.
|
||||
The value of '#mux-state-cells' will always be one greater than the value
|
||||
of '#mux-control-cells'.
|
||||
|
||||
Optionally, mux controller nodes can also specify the state the mux should
|
||||
have when it is idle. The idle-state property is used for this. If the
|
||||
@ -67,6 +69,8 @@ select:
|
||||
pattern: '^mux-controller'
|
||||
- required:
|
||||
- '#mux-control-cells'
|
||||
- required:
|
||||
- '#mux-state-cells'
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
@ -75,6 +79,9 @@ properties:
|
||||
'#mux-control-cells':
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
'#mux-state-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
idle-state:
|
||||
$ref: /schemas/types.yaml#/definitions/int32
|
||||
minimum: -2
|
||||
@ -179,4 +186,21 @@ examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
mux1: mux-controller {
|
||||
compatible = "gpio-mux";
|
||||
#mux-state-cells = <1>;
|
||||
mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
transceiver4: can-phy4 {
|
||||
compatible = "ti,tcan1042";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <5000000>;
|
||||
standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>;
|
||||
mux-states = <&mux1 1>;
|
||||
};
|
||||
...
|
||||
|
||||
@ -24,6 +24,9 @@ properties:
|
||||
compatible:
|
||||
const: brcm,nvram
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@ -8,8 +8,10 @@ Required properties:
|
||||
"mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
|
||||
"mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
|
||||
"mediatek,mt8192-efuse", "mediatek,efuse": for MT8192
|
||||
"mediatek,mt8195-efuse", "mediatek,efuse": for MT8195
|
||||
"mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
|
||||
- reg: Should contain registers location and length
|
||||
- bits: contain the bits range by offset and size
|
||||
|
||||
= Data cells =
|
||||
Are child nodes of MTK-EFUSE, bindings of which as described in
|
||||
|
||||
@ -19,6 +19,9 @@ properties:
|
||||
- raspberrypi,bootloader-config
|
||||
- const: nvmem-rmem
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
no-map:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
|
||||
@ -24,6 +24,9 @@ properties:
|
||||
- st,stm32f4-otp
|
||||
- st,stm32mp15-bsec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
type: object
|
||||
|
||||
@ -19,6 +19,8 @@ properties:
|
||||
- brcm,bcm7278-pcie # Broadcom 7278 Arm
|
||||
- brcm,bcm7216-pcie # Broadcom 7216 Arm
|
||||
- brcm,bcm7445-pcie # Broadcom 7445 Arm
|
||||
- brcm,bcm7425-pcie # Broadcom 7425 MIPs
|
||||
- brcm,bcm7435-pcie # Broadcom 7435 MIPs
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -0,0 +1,65 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
|
||||
|
||||
maintainers:
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
description: |+
|
||||
The HDMI TX PHY node should be the child of a syscon node with the
|
||||
required property:
|
||||
|
||||
compatible = "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
|
||||
|
||||
Refer to the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^hdmi-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- amlogic,meson8b-hdmi-tx-phy
|
||||
- amlogic,meson8m2-hdmi-tx-phy
|
||||
- const: amlogic,meson8-hdmi-tx-phy
|
||||
- const: amlogic,meson8-hdmi-tx-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
description:
|
||||
HDMI TMDS clock
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
hdmi-phy@3a0 {
|
||||
compatible = "amlogic,meson8-hdmi-tx-phy";
|
||||
reg = <0x3a0 0xc>;
|
||||
clocks = <&tmds_clock>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
- |
|
||||
hdmi-phy@3a0 {
|
||||
compatible = "amlogic,meson8b-hdmi-tx-phy", "amlogic,meson8-hdmi-tx-phy";
|
||||
reg = <0x3a0 0xc>;
|
||||
clocks = <&tmds_clock>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
92
Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
Normal file
92
Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
Normal file
@ -0,0 +1,92 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8 SoC series PCIe PHY Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Richard Zhu <hongxing.zhu@nxp.com>
|
||||
|
||||
properties:
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8mm-pcie-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: pciephy
|
||||
|
||||
fsl,refclk-pad-mode:
|
||||
description: |
|
||||
Specifies the mode of the refclk pad used. It can be UNUSED(PHY
|
||||
refclock is derived from SoC internal source), INPUT(PHY refclock
|
||||
is provided externally via the refclk pad) or OUTPUT(PHY refclock
|
||||
is derived from SoC internal source and provided on the refclk pad).
|
||||
Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants
|
||||
to be used.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 1, 2 ]
|
||||
|
||||
fsl,tx-deemph-gen1:
|
||||
description: Gen1 De-emphasis value (optional).
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
|
||||
fsl,tx-deemph-gen2:
|
||||
description: Gen2 De-emphasis value (optional).
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
|
||||
fsl,clkreq-unsupported:
|
||||
type: boolean
|
||||
description: A boolean property indicating the CLKREQ# signal is
|
||||
not supported in the board design (optional)
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- fsl,refclk-pad-mode
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mm-clock.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include <dt-bindings/reset/imx8mq-reset.h>
|
||||
|
||||
pcie_phy: pcie-phy@32f00000 {
|
||||
compatible = "fsl,imx8mm-pcie-phy";
|
||||
reg = <0x32f00000 0x10000>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
|
||||
clock-names = "ref";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>;
|
||||
resets = <&src IMX8MQ_RESET_PCIEPHY>;
|
||||
reset-names = "pciephy";
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
...
|
||||
@ -0,0 +1,46 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/intel,phy-thunderbay-emmc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel Thunder Bay eMMC PHY bindings
|
||||
|
||||
maintainers:
|
||||
- Srikandan Nandhini <nandhini.srikandan@intel.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,thunderbay-emmc-phy
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: emmcclk
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mmc_phy@80440800 {
|
||||
#phy-cells = <0x0>;
|
||||
compatible = "intel,thunderbay-emmc-phy";
|
||||
status = "okay";
|
||||
reg = <0x80440800 0x100>;
|
||||
clocks = <&emmc>;
|
||||
clock-names = "emmcclk";
|
||||
};
|
||||
@ -160,6 +160,24 @@ patternProperties:
|
||||
- PHY_TYPE_PCIE
|
||||
- PHY_TYPE_SATA
|
||||
|
||||
nvmem-cells:
|
||||
items:
|
||||
- description: internal R efuse for U2 PHY or U3/PCIe PHY
|
||||
- description: rx_imp_sel efuse for U3/PCIe PHY
|
||||
- description: tx_imp_sel efuse for U3/PCIe PHY
|
||||
description: |
|
||||
Phandles to nvmem cell that contains the efuse data;
|
||||
Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
|
||||
three items should be provided at the same time for U3/PCIe PHY,
|
||||
when use software to load efuse;
|
||||
If unspecified, will use hardware auto-load efuse.
|
||||
|
||||
nvmem-cell-names:
|
||||
items:
|
||||
- const: intr
|
||||
- const: rx_imp
|
||||
- const: tx_imp
|
||||
|
||||
# The following optional vendor properties are only for debug or HQA test
|
||||
mediatek,eye-src:
|
||||
description:
|
||||
|
||||
@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip Lan966x Serdes controller
|
||||
|
||||
maintainers:
|
||||
- Horatiu Vultur <horatiu.vultur@microchip.com>
|
||||
|
||||
description: |
|
||||
Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
|
||||
3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII.
|
||||
Also it has 8 logical Ethernet ports which can be connected to these
|
||||
interfaces. The Serdes controller will allow to configure these interfaces
|
||||
and allows to "mux" the interfaces to different ports.
|
||||
|
||||
For simple selection of the interface that is used with a port, the
|
||||
following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
|
||||
number that represents the index of that interface type. For example
|
||||
CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
|
||||
interface SerDes 2.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^serdes@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
const: microchip,lan966x-serdes
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: HSIO registers
|
||||
- description: HW_STAT register
|
||||
|
||||
'#phy-cells':
|
||||
const: 2
|
||||
description: |
|
||||
- Input port to use for a given macro.
|
||||
- The macro to be used. The macros are defined in
|
||||
dt-bindings/phy/phy-lan966x-serdes.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#phy-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serdes: serdes@e2004010 {
|
||||
compatible = "microchip,lan966x-serdes";
|
||||
reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
|
||||
#phy-cells = <2>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -113,6 +113,15 @@ patternProperties:
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
cdns,ssc-mode:
|
||||
description:
|
||||
Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
|
||||
EXTERNAL_SSC or INTERNAL_SSC.
|
||||
Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2]
|
||||
default: 1
|
||||
|
||||
required:
|
||||
- reg
|
||||
- resets
|
||||
|
||||
@ -202,7 +202,7 @@ examples:
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_PCIE>;
|
||||
cdns,num-lanes = <2>;
|
||||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
|
||||
cdns,ssc-mode = <CDNS_SERDES_NO_SSC>;
|
||||
};
|
||||
|
||||
phy@2 {
|
||||
@ -211,7 +211,7 @@ examples:
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_SGMII>;
|
||||
cdns,num-lanes = <1>;
|
||||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
|
||||
cdns,ssc-mode = <CDNS_SERDES_NO_SSC>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -18,6 +18,7 @@ properties:
|
||||
- rockchip,rk3328-usb2phy
|
||||
- rockchip,rk3366-usb2phy
|
||||
- rockchip,rk3399-usb2phy
|
||||
- rockchip,rk3568-usb2phy
|
||||
- rockchip,rv1108-usb2phy
|
||||
|
||||
reg:
|
||||
@ -50,6 +51,10 @@ properties:
|
||||
description:
|
||||
Phandle to the extcon device providing the cable state for the otg phy.
|
||||
|
||||
interrupts:
|
||||
description: Muxed interrupt for both ports
|
||||
maxItems: 1
|
||||
|
||||
rockchip,usbgrf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
@ -67,6 +72,7 @@ properties:
|
||||
|
||||
interrupts:
|
||||
description: host linestate interrupt
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: linestate
|
||||
@ -78,8 +84,6 @@ properties:
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
otg-port:
|
||||
type: object
|
||||
@ -109,8 +113,6 @@ properties:
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -120,6 +122,40 @@ required:
|
||||
- host-port
|
||||
- otg-port
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: rockchip,rk3568-usb2phy
|
||||
|
||||
then:
|
||||
properties:
|
||||
host-port:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
otg-port:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
required:
|
||||
- interrupts
|
||||
|
||||
else:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
host-port:
|
||||
required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
otg-port:
|
||||
required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@ -1,28 +0,0 @@
|
||||
NVIDIA Tegra194 P2U binding
|
||||
|
||||
Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
|
||||
Speed) each interfacing with 12 and 8 P2U instances respectively.
|
||||
A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
|
||||
interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
|
||||
lane.
|
||||
|
||||
Required properties:
|
||||
- compatible: For Tegra19x, must contain "nvidia,tegra194-p2u".
|
||||
- reg: Should be the physical address space and length of respective each P2U
|
||||
instance.
|
||||
- reg-names: Must include the entry "ctl".
|
||||
|
||||
Required properties for PHY port node:
|
||||
- #phy-cells: Defined by generic PHY bindings. Must be 0.
|
||||
|
||||
Refer to phy/phy-bindings.txt for the generic PHY binding properties.
|
||||
|
||||
Example:
|
||||
|
||||
p2u_hsio_0: phy@3e10000 {
|
||||
compatible = "nvidia,tegra194-p2u";
|
||||
reg = <0x03e10000 0x10000>;
|
||||
reg-names = "ctl";
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
44
Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml
Normal file
44
Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml
Normal file
@ -0,0 +1,44 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: NVIDIA Tegra194 P2U binding
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
|
||||
description: >
|
||||
Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
|
||||
Speed) each interfacing with 12 and 8 P2U instances respectively.
|
||||
A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
|
||||
interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
|
||||
lane.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra194-p2u
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: Should be the physical address space and length of respective each P2U instance.
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: ctl
|
||||
|
||||
'#phy-cells':
|
||||
const: 0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
p2u_hsio_0: phy@3e10000 {
|
||||
compatible = "nvidia,tegra194-p2u";
|
||||
reg = <0x03e10000 0x10000>;
|
||||
reg-names = "ctl";
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
67
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml
Normal file
67
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml
Normal file
@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Qualcomm eDP PHY
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
|
||||
description:
|
||||
The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
|
||||
the physical interface for Embedded Display Port.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc8180x-edp-phy
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: PHY base register block
|
||||
- description: tx0 register block
|
||||
- description: tx1 register block
|
||||
- description: PLL register block
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#clock-cells"
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
phy@aec2a00 {
|
||||
compatible = "qcom,sc8180x-edp-phy";
|
||||
reg = <0x0aec2a00 0x1c0>,
|
||||
<0x0aec2200 0xa0>,
|
||||
<0x0aec2600 0xa0>,
|
||||
<0x0aec2000 0x19c>;
|
||||
|
||||
clocks = <&dispcc 0>, <&dispcc 1>;
|
||||
clock-names = "aux", "cfg_ahb";
|
||||
|
||||
#clock-cells = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
...
|
||||
@ -50,6 +50,10 @@ properties:
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-usb3-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
|
||||
@ -332,6 +336,8 @@ allOf:
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
||||
@ -30,6 +30,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,sc7180-qusb2-phy
|
||||
- qcom,sdm845-qusb2-phy
|
||||
- qcom,sm6350-qusb2-phy
|
||||
- const: qcom,qusb2-v2-phy
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -20,6 +20,7 @@ properties:
|
||||
- qcom,sm8150-usb-hs-phy
|
||||
- qcom,sm8250-usb-hs-phy
|
||||
- qcom,sm8350-usb-hs-phy
|
||||
- qcom,sm8450-usb-hs-phy
|
||||
- qcom,usb-snps-femto-v2-phy
|
||||
|
||||
reg:
|
||||
|
||||
@ -16,6 +16,7 @@ maintainers:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- socionext,uniphier-pro4-ahci-phy
|
||||
- socionext,uniphier-pxs2-ahci-phy
|
||||
- socionext,uniphier-pxs3-ahci-phy
|
||||
|
||||
@ -26,23 +27,35 @@ properties:
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for PXs2
|
||||
- const: link
|
||||
- items: # for Pro4
|
||||
- const: link
|
||||
- const: gio
|
||||
- items: # for others
|
||||
- const: link
|
||||
- const: phy
|
||||
|
||||
resets:
|
||||
maxItems: 2
|
||||
minItems: 2
|
||||
maxItems: 5
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: link
|
||||
- const: phy
|
||||
oneOf:
|
||||
- items: # for Pro4
|
||||
- const: link
|
||||
- const: gio
|
||||
- const: pm
|
||||
- const: tx
|
||||
- const: rx
|
||||
- items: # for others
|
||||
- const: link
|
||||
- const: phy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -19,6 +19,7 @@ properties:
|
||||
- socionext,uniphier-pro5-pcie-phy
|
||||
- socionext,uniphier-ld20-pcie-phy
|
||||
- socionext,uniphier-pxs3-pcie-phy
|
||||
- socionext,uniphier-nx1-pcie-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -22,6 +22,7 @@ properties:
|
||||
- socionext,uniphier-pxs2-usb3-hsphy
|
||||
- socionext,uniphier-ld20-usb3-hsphy
|
||||
- socionext,uniphier-pxs3-usb3-hsphy
|
||||
- socionext,uniphier-nx1-usb3-hsphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -23,6 +23,7 @@ properties:
|
||||
- socionext,uniphier-pxs2-usb3-ssphy
|
||||
- socionext,uniphier-ld20-usb3-ssphy
|
||||
- socionext,uniphier-pxs3-usb3-ssphy
|
||||
- socionext,uniphier-nx1-usb3-ssphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
57
Documentation/devicetree/bindings/sound/ak4375.yaml
Normal file
57
Documentation/devicetree/bindings/sound/ak4375.yaml
Normal file
@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/ak4375.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AK4375 DAC and headphones amplifier Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Vincent Knecht <vincent.knecht@mailoo.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: asahi-kasei,ak4375
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
avdd-supply:
|
||||
description: regulator phandle for the AVDD power supply.
|
||||
|
||||
tvdd-supply:
|
||||
description: regulator phandle for the TVDD power supply.
|
||||
|
||||
pdn-gpios:
|
||||
description: optional GPIO to set the PDN pin.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#sound-dai-cells'
|
||||
- avdd-supply
|
||||
- tvdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
headphones: audio-codec@10 {
|
||||
compatible = "asahi-kasei,ak4375";
|
||||
reg = <0x10>;
|
||||
avdd-supply = <®_headphones_avdd>;
|
||||
tvdd-supply = <&pm8916_l6>;
|
||||
pdn-gpios = <&msmgpio 114 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&headphones_pdn_default>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
@ -9,6 +9,9 @@ title: Amlogic AIU audio output controller
|
||||
maintainers:
|
||||
- Jerome Brunet <jbrunet@baylibre.com>
|
||||
|
||||
allOf:
|
||||
- $ref: name-prefix.yaml#
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^audio-controller@.*"
|
||||
@ -65,6 +68,8 @@ properties:
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
sound-name-prefix: true
|
||||
|
||||
required:
|
||||
- "#sound-dai-cells"
|
||||
- compatible
|
||||
|
||||
@ -9,6 +9,9 @@ title: Amlogic G12a Internal DAC Control Glue
|
||||
maintainers:
|
||||
- Jerome Brunet <jbrunet@baylibre.com>
|
||||
|
||||
allOf:
|
||||
- $ref: name-prefix.yaml#
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^audio-controller@.*"
|
||||
@ -31,6 +34,8 @@ properties:
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
sound-name-prefix: true
|
||||
|
||||
required:
|
||||
- "#sound-dai-cells"
|
||||
- compatible
|
||||
|
||||
@ -9,6 +9,9 @@ title: Amlogic T9015 Internal Audio DAC
|
||||
maintainers:
|
||||
- Jerome Brunet <jbrunet@baylibre.com>
|
||||
|
||||
allOf:
|
||||
- $ref: name-prefix.yaml#
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^audio-controller@.*"
|
||||
@ -38,6 +41,8 @@ properties:
|
||||
description:
|
||||
Analogue power supply.
|
||||
|
||||
sound-name-prefix: true
|
||||
|
||||
required:
|
||||
- "#sound-dai-cells"
|
||||
- compatible
|
||||
|
||||
@ -42,10 +42,15 @@ patternProperties:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
frame-master:
|
||||
description: Indicates dai-link frame master.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
oneOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/flag
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
bitclock-master:
|
||||
description: Indicates dai-link bit clock master
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
oneOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/flag
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
dai-format:
|
||||
description: audio format.
|
||||
items:
|
||||
|
||||
225
Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml
Normal file
225
Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml
Normal file
@ -0,0 +1,225 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/cirrus,cs42l42.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cirrus Logic CS42L42 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
description:
|
||||
The CS42L42 is a low-power audio codec designed for portable applications.
|
||||
It provides a high-dynamic range, stereo DAC for audio playback and a mono
|
||||
high-dynamic-range ADC for audio capture. There is an integrated headset
|
||||
detection block.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- cirrus,cs42l42
|
||||
|
||||
reg:
|
||||
description:
|
||||
The I2C address of the CS42L42.
|
||||
maxItems: 1
|
||||
|
||||
VP-supply:
|
||||
description:
|
||||
VP power supply.
|
||||
|
||||
VCP-supply:
|
||||
description:
|
||||
Charge pump power supply.
|
||||
|
||||
VD_FILT-supply:
|
||||
description:
|
||||
FILT+ power supply.
|
||||
|
||||
VL-supply:
|
||||
description:
|
||||
Logic power supply.
|
||||
|
||||
VA-supply:
|
||||
description:
|
||||
Analog power supply.
|
||||
|
||||
reset-gpios:
|
||||
description:
|
||||
This pin will be asserted and then deasserted to reset the
|
||||
CS42L42 before communication starts.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
Interrupt for CS42L42 IRQ line.
|
||||
maxItems: 1
|
||||
|
||||
cirrus,ts-inv:
|
||||
description: |
|
||||
Sets the behaviour of the jack plug detect switch.
|
||||
|
||||
0 - (Default) Shorted to tip when unplugged, open when plugged.
|
||||
This is "inverted tip sense (ITS)" in the datasheet.
|
||||
|
||||
1 - Open when unplugged, shorted to tip when plugged.
|
||||
This is "normal tip sense (TS)" in the datasheet.
|
||||
|
||||
The CS42L42_TS_INV_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
|
||||
cirrus,ts-dbnc-rise:
|
||||
description: |
|
||||
Debounce the rising edge of TIP_SENSE_PLUG. With no
|
||||
debounce, the tip sense pin might be noisy on a plug event.
|
||||
|
||||
0 - 0ms
|
||||
1 - 125ms
|
||||
2 - 250ms
|
||||
3 - 500ms
|
||||
4 - 750ms
|
||||
5 - 1s (Default)
|
||||
6 - 1.25s
|
||||
7 - 1.5s
|
||||
|
||||
The CS42L42_TS_DBNCE_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
cirrus,ts-dbnc-fall:
|
||||
description: |
|
||||
Debounce the falling edge of TIP_SENSE_UNPLUG. With no
|
||||
debounce, the tip sense pin might be noisy on an unplug event.
|
||||
|
||||
0 - 0ms
|
||||
1 - 125ms
|
||||
2 - 250ms
|
||||
3 - 500ms
|
||||
4 - 750ms
|
||||
5 - 1s (Default)
|
||||
6 - 1.25s
|
||||
7 - 1.5s
|
||||
|
||||
The CS42L42_TS_DBNCE_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
cirrus,btn-det-init-dbnce:
|
||||
description: |
|
||||
This sets how long to wait after enabling button detection
|
||||
interrupts before servicing button interrupts, to allow the
|
||||
HS bias time to settle. Value is in milliseconds.
|
||||
There may be erroneous button interrupts if this debounce time
|
||||
is too short.
|
||||
|
||||
0ms - 200ms,
|
||||
Default = 100ms
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 200
|
||||
|
||||
cirrus,btn-det-event-dbnce:
|
||||
description: |
|
||||
This sets how long to wait after receiving a button press
|
||||
interrupt before processing it. Allows time for the button
|
||||
press to make a clean connection with the bias resistors.
|
||||
Value is in milliseconds.
|
||||
|
||||
0ms - 20ms,
|
||||
Default = 10ms
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 20
|
||||
|
||||
cirrus,bias-lvls:
|
||||
description: |
|
||||
For a level-detect headset button scheme, each button will bias
|
||||
the mic pin to a certain voltage. To determine which button was
|
||||
pressed, the voltage is compared to sequential, decreasing
|
||||
voltages, until the compared voltage < bias voltage.
|
||||
For different hardware setups, a designer might want to tweak this.
|
||||
This is an array of descending values for the comparator voltage,
|
||||
given as percent of the HSBIAS voltage.
|
||||
|
||||
Array of 4 values, each 0-63
|
||||
< x1 x2 x3 x4 >
|
||||
Default = < 15 8 4 1 >
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
items:
|
||||
minimum: 0
|
||||
maximum: 63
|
||||
|
||||
cirrus,hs-bias-ramp-rate:
|
||||
description: |
|
||||
If present this sets the rate that the HS bias should rise and fall.
|
||||
The actual rise and fall times depend on external hardware (the
|
||||
datasheet gives several rise and fall time examples).
|
||||
|
||||
0 - Fast rise time; slow, load-dependent fall time
|
||||
1 - Fast
|
||||
2 - Slow (default)
|
||||
3 - Slowest
|
||||
|
||||
The CS42L42_HSBIAS_RAMP_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
cirrus,hs-bias-sense-disable:
|
||||
description: |
|
||||
If present the HSBIAS sense is disabled. Configures HSBIAS output
|
||||
current sense through the external 2.21-k resistor. HSBIAS_SENSE
|
||||
is a hardware feature to reduce the potential pop noise when the
|
||||
headset plug is removed slowly. But on some platforms ESD voltage
|
||||
will affect it causing plug detection to fail, especially with CTIA
|
||||
headset type. For different hardware setups, a designer might want
|
||||
to tweak default behavior.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- VP-supply
|
||||
- VCP-supply
|
||||
- VD_FILT-supply
|
||||
- VL-supply
|
||||
- VA-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/sound/cs42l42.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cs42l42: cs42l42@48 {
|
||||
compatible = "cirrus,cs42l42";
|
||||
reg = <0x48>;
|
||||
VA-supply = <&dummy_vreg>;
|
||||
VP-supply = <&dummy_vreg>;
|
||||
VCP-supply = <&dummy_vreg>;
|
||||
VD_FILT-supply = <&dummy_vreg>;
|
||||
VL-supply = <&dummy_vreg>;
|
||||
|
||||
reset-gpios = <&axi_gpio_0 1 0>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <55 8>;
|
||||
|
||||
cirrus,ts-inv = <CS42L42_TS_INV_DIS>;
|
||||
cirrus,ts-dbnc-rise = <CS42L42_TS_DBNCE_1000>;
|
||||
cirrus,ts-dbnc-fall = <CS42L42_TS_DBNCE_0>;
|
||||
cirrus,btn-det-init-dbnce = <100>;
|
||||
cirrus,btn-det-event-dbnce = <10>;
|
||||
cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>;
|
||||
cirrus,hs-bias-ramp-rate = <CS42L42_HSBIAS_RAMP_SLOW>;
|
||||
};
|
||||
};
|
||||
@ -1,115 +0,0 @@
|
||||
CS42L42 audio CODEC
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "cirrus,cs42l42"
|
||||
|
||||
- reg : the I2C address of the device for I2C.
|
||||
|
||||
- VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply :
|
||||
power supplies for the device, as covered in
|
||||
Documentation/devicetree/bindings/regulator/regulator.txt.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- reset-gpios : a GPIO spec for the reset pin. If specified, it will be
|
||||
deasserted before communication to the codec starts.
|
||||
|
||||
- interrupts : IRQ line info CS42L42.
|
||||
(See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
for further information relating to interrupt properties)
|
||||
|
||||
- cirrus,ts-inv : Boolean property. Sets the behaviour of the jack plug
|
||||
detect switch.
|
||||
|
||||
0 = (Default) Shorted to tip when unplugged, open when plugged.
|
||||
This is "inverted tip sense (ITS)" in the datasheet.
|
||||
|
||||
1 = Open when unplugged, shorted to tip when plugged.
|
||||
This is "normal tip sense (TS)" in the datasheet.
|
||||
|
||||
- cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no
|
||||
debounce, the tip sense pin might be noisy on a plug event.
|
||||
|
||||
0 - 0ms,
|
||||
1 - 125ms,
|
||||
2 - 250ms,
|
||||
3 - 500ms,
|
||||
4 - 750ms,
|
||||
5 - (Default) 1s,
|
||||
6 - 1.25s,
|
||||
7 - 1.5s,
|
||||
|
||||
- cirrus,ts-dbnc-fall : Debounce the falling edge of TIP_SENSE_UNPLUG.
|
||||
With no debounce, the tip sense pin might be noisy on an unplug event.
|
||||
|
||||
0 - 0ms,
|
||||
1 - 125ms,
|
||||
2 - 250ms,
|
||||
3 - 500ms,
|
||||
4 - 750ms,
|
||||
5 - (Default) 1s,
|
||||
6 - 1.25s,
|
||||
7 - 1.5s,
|
||||
|
||||
- cirrus,btn-det-init-dbnce : This sets how long the driver sleeps after
|
||||
enabling button detection interrupts. After auto-detection and before
|
||||
servicing button interrupts, the HS bias needs time to settle. If you
|
||||
don't wait, there is possibility for erroneous button interrupt.
|
||||
|
||||
0ms - 200ms,
|
||||
Default = 100ms
|
||||
|
||||
- cirrus,btn-det-event-dbnce : This sets how long the driver delays after
|
||||
receiving a button press interrupt. With level detect interrupts, you want
|
||||
to wait a small amount of time to make sure the button press is making a
|
||||
clean connection with the bias resistors.
|
||||
|
||||
0ms - 20ms,
|
||||
Default = 10ms
|
||||
|
||||
- cirrus,bias-lvls : For a level-detect headset button scheme, each button
|
||||
will bias the mic pin to a certain voltage. To determine which button was
|
||||
pressed, the driver will compare this biased voltage to sequential,
|
||||
decreasing voltages and will stop when a comparator is tripped,
|
||||
indicating a comparator voltage < bias voltage. This value represents a
|
||||
percentage of the internally generated HS bias voltage. For different
|
||||
hardware setups, a designer might want to tweak this. This is an array of
|
||||
descending values for the comparator voltage.
|
||||
|
||||
Array of 4 values
|
||||
Each 0-63
|
||||
< x1 x2 x3 x4 >
|
||||
Default = < 15 8 4 1>
|
||||
|
||||
- cirrus,hs-bias-sense-disable: This is boolean property. If present the
|
||||
HSBIAS sense is disabled. Configures HSBIAS output current sense through
|
||||
the external 2.21-k resistor. HSBIAS_SENSE is hardware feature to reduce
|
||||
the potential pop noise during the headset plug out slowly. But on some
|
||||
platforms ESD voltage will affect it causing test to fail, especially
|
||||
with CTIA headset type. For different hardware setups, a designer might
|
||||
want to tweak default behavior.
|
||||
|
||||
Example:
|
||||
|
||||
cs42l42: cs42l42@48 {
|
||||
compatible = "cirrus,cs42l42";
|
||||
reg = <0x48>;
|
||||
VA-supply = <&dummy_vreg>;
|
||||
VP-supply = <&dummy_vreg>;
|
||||
VCP-supply = <&dummy_vreg>;
|
||||
VD_FILT-supply = <&dummy_vreg>;
|
||||
VL-supply = <&dummy_vreg>;
|
||||
|
||||
reset-gpios = <&axi_gpio_0 1 0>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <55 8>
|
||||
|
||||
cirrus,ts-inv = <0x00>;
|
||||
cirrus,ts-dbnc-rise = <0x05>;
|
||||
cirrus,ts-dbnc-fall = <0x00>;
|
||||
cirrus,btn-det-init-dbnce = <100>;
|
||||
cirrus,btn-det-event-dbnce = <10>;
|
||||
cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>;
|
||||
cirrus,hs-bias-ramp-rate = <0x02>;
|
||||
};
|
||||
@ -9,6 +9,9 @@ title: Dummy SPDIF Transmitter Device Tree Bindings
|
||||
maintainers:
|
||||
- Mark Brown <broonie@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: name-prefix.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: linux,spdif-dit
|
||||
@ -16,6 +19,8 @@ properties:
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
sound-name-prefix: true
|
||||
|
||||
required:
|
||||
- "#sound-dai-cells"
|
||||
- compatible
|
||||
|
||||
@ -19,6 +19,12 @@ properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Shared memory region for AFE memif. A "shared-dma-pool".
|
||||
See ../reserved-memory/reserved-memory.txt for details.
|
||||
|
||||
mediatek,topckgen:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
description: The phandle of the mediatek topckgen controller
|
||||
@ -125,6 +131,7 @@ required:
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- memory-region
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@ -139,6 +146,7 @@ examples:
|
||||
interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
mediatek,topckgen = <&topckgen>;
|
||||
power-domains = <&spm 7>; //MT8195_POWER_DOMAIN_AUDIO
|
||||
memory-region = <&snd_dma_mem_reserved>;
|
||||
clocks = <&clk26m>,
|
||||
<&topckgen 163>, //CLK_TOP_APLL1
|
||||
<&topckgen 166>, //CLK_TOP_APLL2
|
||||
|
||||
@ -16,6 +16,10 @@ properties:
|
||||
compatible:
|
||||
const: mediatek,mt8195_mt6359_rt1011_rt5682
|
||||
|
||||
model:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: User specified audio sound card name
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
description: The phandle of MT8195 ASoC platform.
|
||||
|
||||
@ -16,6 +16,10 @@ properties:
|
||||
compatible:
|
||||
const: mediatek,mt8195_mt6359_rt1019_rt5682
|
||||
|
||||
model:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: User specified audio sound card name
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
description: The phandle of MT8195 ASoC platform.
|
||||
@ -28,6 +32,16 @@ properties:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
description: The phandle of MT8195 HDMI codec node.
|
||||
|
||||
mediatek,adsp:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
description: The phandle of MT8195 ADSP platform.
|
||||
|
||||
mediatek,dai-link:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
A list of the desired dai-links in the sound card. Each entry is a
|
||||
name defined in the machine driver.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
|
||||
@ -1,48 +0,0 @@
|
||||
NVIDIA Tegra audio complex
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-alc5632"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the ALC5632's pins as documented in the binding for the device
|
||||
and:
|
||||
|
||||
* Headset Stereophone
|
||||
* Int Spk
|
||||
* Headset Mic
|
||||
* Digital Mic
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S controller
|
||||
- nvidia,audio-codec : The phandle of the ALC5632 audio codec
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-alc5632-paz00",
|
||||
"nvidia,tegra-audio-alc5632";
|
||||
|
||||
nvidia,model = "Compal PAZ00";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Int Spk", "SPK_OUTP",
|
||||
"Int Spk", "SPK_OUTN",
|
||||
"Headset Mic","MICBIAS1",
|
||||
"MIC1_N", "Headset Mic",
|
||||
"MIC1_P", "Headset Mic",
|
||||
"Headset Stereophone", "HP_OUT_R",
|
||||
"Headset Stereophone", "HP_OUT_L";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&alc5632>;
|
||||
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,74 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-alc5632.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with ALC5632 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-alc5632(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-alc5632
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headset Stereophone"
|
||||
- "Int Spk"
|
||||
- "Headset Mic"
|
||||
- "Digital Mic"
|
||||
|
||||
# CODEC Pins
|
||||
- SPKOUT
|
||||
- SPKOUTN
|
||||
- MICBIAS1
|
||||
- MIC1
|
||||
- HPR
|
||||
- HPL
|
||||
- DMICDAT
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-alc5632-paz00",
|
||||
"nvidia,tegra-audio-alc5632";
|
||||
|
||||
nvidia,model = "Compal PAZ00";
|
||||
|
||||
nvidia,audio-routing = "Int Spk", "SPKOUT",
|
||||
"Int Spk", "SPKOUTN",
|
||||
"Headset Mic", "MICBIAS1",
|
||||
"MIC1", "Headset Mic",
|
||||
"Headset Stereophone", "HPR",
|
||||
"Headset Stereophone", "HPL",
|
||||
"DMICDAT", "Digital Mic";
|
||||
|
||||
nvidia,i2s-controller = <&i2s>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
|
||||
clocks = <&clk 112>, <&clk 113>, <&clk 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,83 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/sound/nvidia,tegra-audio-common.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Common properties for NVIDIA Tegra audio complexes
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: PLL A clock
|
||||
- description: PLL A OUT0 clock
|
||||
- description: The Tegra cdev1/extern1 clock, which feeds the card's mclk
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pll_a
|
||||
- const: pll_a_out0
|
||||
- const: mclk
|
||||
|
||||
nvidia,model:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: The user-visible name of this sound complex.
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
|
||||
nvidia,ac97-controller:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the AC97 controller
|
||||
|
||||
nvidia,i2s-controller:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the Tegra I2S controller
|
||||
|
||||
nvidia,audio-codec:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of audio codec
|
||||
|
||||
nvidia,spkr-en-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that enables the speakers
|
||||
|
||||
nvidia,hp-mute-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that mutes the headphones
|
||||
|
||||
nvidia,hp-det-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that detect headphones are plugged in
|
||||
|
||||
nvidia,mic-det-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that detect microphone is plugged in
|
||||
|
||||
nvidia,ear-sel-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that switch between the microphones
|
||||
|
||||
nvidia,int-mic-en-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that enables the internal microphone
|
||||
|
||||
nvidia,ext-mic-en-gpios:
|
||||
maxItems: 1
|
||||
description: The GPIO that enables the external microphone
|
||||
|
||||
nvidia,headset:
|
||||
type: boolean
|
||||
description: The Mic Jack represents state of the headset microphone pin
|
||||
|
||||
additionalProperties: true
|
||||
@ -44,6 +44,16 @@ properties:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
interconnects:
|
||||
items:
|
||||
- description: APE read memory client
|
||||
- description: APE write memory client
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: dma-mem # read
|
||||
- const: write
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
|
||||
@ -1,53 +0,0 @@
|
||||
NVIDIA Tegra audio complex, with MAX98090 CODEC
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-max98090"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the MAX98090's pins (as documented in its binding), and the jacks
|
||||
on the board:
|
||||
|
||||
* Headphones
|
||||
* Speakers
|
||||
* Mic Jack
|
||||
* Int Mic
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
|
||||
connected to the CODEC.
|
||||
- nvidia,audio-codec : The phandle of the MAX98090 audio codec.
|
||||
|
||||
Optional properties:
|
||||
- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
|
||||
- nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-max98090-venice2",
|
||||
"nvidia,tegra-audio-max98090";
|
||||
nvidia,model = "NVIDIA Tegra Venice2";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphones", "HPR",
|
||||
"Headphones", "HPL",
|
||||
"Speakers", "SPKR",
|
||||
"Speakers", "SPKL",
|
||||
"Mic Jack", "MICBIAS",
|
||||
"IN34", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&acodec>;
|
||||
|
||||
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA124_CLK_EXTERN1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,97 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-max98090.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with MAX98090 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-max98090(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-max98090
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra-audio-max98090-nyan-big
|
||||
- nvidia,tegra-audio-max98090-nyan-blaze
|
||||
- const: nvidia,tegra-audio-max98090-nyan
|
||||
- const: nvidia,tegra-audio-max98090
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphones"
|
||||
- "Speakers"
|
||||
- "Mic Jack"
|
||||
- "Int Mic"
|
||||
|
||||
# CODEC Pins
|
||||
- MIC1
|
||||
- MIC2
|
||||
- DMICL
|
||||
- DMICR
|
||||
- IN1
|
||||
- IN2
|
||||
- IN3
|
||||
- IN4
|
||||
- IN5
|
||||
- IN6
|
||||
- IN12
|
||||
- IN34
|
||||
- IN56
|
||||
- HPL
|
||||
- HPR
|
||||
- SPKL
|
||||
- SPKR
|
||||
- RCVL
|
||||
- RCVR
|
||||
- MICBIAS
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra124-car.h>
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-max98090-venice2",
|
||||
"nvidia,tegra-audio-max98090";
|
||||
nvidia,model = "NVIDIA Tegra Venice2";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphones", "HPR",
|
||||
"Headphones", "HPL",
|
||||
"Speakers", "SPKR",
|
||||
"Speakers", "SPKL",
|
||||
"Mic Jack", "MICBIAS",
|
||||
"IN34", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&acodec>;
|
||||
|
||||
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA124_CLK_EXTERN1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,52 +0,0 @@
|
||||
NVIDIA Tegra audio complex, with RT5640 CODEC
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-rt5640"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the RT5640's pins (as documented in its binding), and the jacks
|
||||
on the board:
|
||||
|
||||
* Headphones
|
||||
* Speakers
|
||||
* Mic Jack
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
|
||||
connected to the CODEC.
|
||||
- nvidia,audio-codec : The phandle of the RT5640 audio codec. This binding
|
||||
assumes that AIF1 on the CODEC is connected to Tegra.
|
||||
|
||||
Optional properties:
|
||||
- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-rt5640-dalmore",
|
||||
"nvidia,tegra-audio-rt5640";
|
||||
nvidia,model = "NVIDIA Tegra Dalmore";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphones", "HPOR",
|
||||
"Headphones", "HPOL",
|
||||
"Speakers", "SPORP",
|
||||
"Speakers", "SPORN",
|
||||
"Speakers", "SPOLP",
|
||||
"Speakers", "SPOLN";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&rt5640>;
|
||||
|
||||
nvidia,hp-det-gpios = <&gpio 143 0>; /* GPIO PR7 */
|
||||
|
||||
clocks = <&tegra_car 216>, <&tegra_car 217>, <&tegra_car 120>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,85 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5640.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with RT5639 or RT5640 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-rt56(39|40)(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-rt5640
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphones"
|
||||
- "Speakers"
|
||||
- "Mic Jack"
|
||||
|
||||
# CODEC Pins
|
||||
- DMIC1
|
||||
- DMIC2
|
||||
- MICBIAS1
|
||||
- IN1P
|
||||
- IN1R
|
||||
- IN2P
|
||||
- IN2R
|
||||
- HPOL
|
||||
- HPOR
|
||||
- LOUTL
|
||||
- LOUTR
|
||||
- MONOP
|
||||
- MONON
|
||||
- SPOLP
|
||||
- SPOLN
|
||||
- SPORP
|
||||
- SPORN
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-rt5640-dalmore",
|
||||
"nvidia,tegra-audio-rt5640";
|
||||
nvidia,model = "NVIDIA Tegra Dalmore";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphones", "HPOR",
|
||||
"Headphones", "HPOL",
|
||||
"Speakers", "SPORP",
|
||||
"Speakers", "SPORN",
|
||||
"Speakers", "SPOLP",
|
||||
"Speakers", "SPOLN";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&rt5640>;
|
||||
|
||||
nvidia,hp-det-gpios = <&gpio 143 0>;
|
||||
|
||||
clocks = <&clk 216>, <&clk 217>, <&clk 120>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
|
||||
@ -1,67 +0,0 @@
|
||||
NVIDIA Tegra audio complex, with RT5677 CODEC
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-rt5677"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the RT5677's pins (as documented in its binding), and the jacks
|
||||
on the board:
|
||||
|
||||
* Headphone
|
||||
* Speaker
|
||||
* Headset Mic
|
||||
* Internal Mic 1
|
||||
* Internal Mic 2
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
|
||||
connected to the CODEC.
|
||||
- nvidia,audio-codec : The phandle of the RT5677 audio codec. This binding
|
||||
assumes that AIF1 on the CODEC is connected to Tegra.
|
||||
|
||||
Optional properties:
|
||||
- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in
|
||||
- nvidia,hp-en-gpios : The GPIO that enables headphone amplifier
|
||||
- nvidia,mic-present-gpios: The GPIO that mic jack is plugged in
|
||||
- nvidia,dmic-clk-en-gpios : The GPIO that gates DMIC clock signal
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-rt5677-ryu",
|
||||
"nvidia,tegra-audio-rt5677";
|
||||
nvidia,model = "NVIDIA Tegra Ryu";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone", "LOUT2",
|
||||
"Headphone", "LOUT1",
|
||||
"Headset Mic", "MICBIAS1",
|
||||
"IN1P", "Headset Mic",
|
||||
"IN1N", "Headset Mic",
|
||||
"DMIC L1", "Internal Mic 1",
|
||||
"DMIC R1", "Internal Mic 1",
|
||||
"DMIC L2", "Internal Mic 2",
|
||||
"DMIC R2", "Internal Mic 2",
|
||||
"Speaker", "PDM1L",
|
||||
"Speaker", "PDM1R";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&rt5677>;
|
||||
|
||||
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
|
||||
nvidia,mic-present-gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
|
||||
nvidia,hp-en-gpios = <&rt5677 1 GPIO_ACTIVE_HIGH>;
|
||||
nvidia,dmic-clk-en-gpios = <&rt5677 2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA124_CLK_EXTERN1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,100 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5677.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with RT5677 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-rt5677(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-rt5677
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone"
|
||||
- "Speaker"
|
||||
- "Headset Mic"
|
||||
- "Internal Mic 1"
|
||||
- "Internal Mic 2"
|
||||
|
||||
# CODEC Pins
|
||||
- IN1P
|
||||
- IN1N
|
||||
- IN2P
|
||||
- IN2N
|
||||
- MICBIAS1
|
||||
- DMIC1
|
||||
- DMIC2
|
||||
- DMIC3
|
||||
- DMIC4
|
||||
- "DMIC L1"
|
||||
- "DMIC L2"
|
||||
- "DMIC L3"
|
||||
- "DMIC L4"
|
||||
- "DMIC R1"
|
||||
- "DMIC R2"
|
||||
- "DMIC R3"
|
||||
- "DMIC R4"
|
||||
- LOUT1
|
||||
- LOUT2
|
||||
- LOUT3
|
||||
- PDM1L
|
||||
- PDM1R
|
||||
- PDM2L
|
||||
- PDM2R
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-rt5677-ryu",
|
||||
"nvidia,tegra-audio-rt5677";
|
||||
nvidia,model = "NVIDIA Tegra Ryu";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone", "LOUT2",
|
||||
"Headphone", "LOUT1",
|
||||
"Headset Mic", "MICBIAS1",
|
||||
"IN1P", "Headset Mic",
|
||||
"IN1N", "Headset Mic",
|
||||
"DMIC L1", "Internal Mic 1",
|
||||
"DMIC R1", "Internal Mic 1",
|
||||
"DMIC L2", "Internal Mic 2",
|
||||
"DMIC R2", "Internal Mic 2",
|
||||
"Speaker", "PDM1L",
|
||||
"Speaker", "PDM1R";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&rt5677>;
|
||||
|
||||
nvidia,hp-det-gpios = <&gpio 143 0>;
|
||||
|
||||
clocks = <&clk 216>,
|
||||
<&clk 217>,
|
||||
<&clk 121>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,42 +0,0 @@
|
||||
NVIDIA Tegra audio complex, with SGTL5000 CODEC
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-sgtl5000"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the SGTL5000's pins (as documented in its binding), and the jacks
|
||||
on the board:
|
||||
|
||||
* Headphone Jack
|
||||
* Line In Jack
|
||||
* Mic Jack
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
|
||||
connected to the CODEC.
|
||||
- nvidia,audio-codec : The phandle of the SGTL5000 audio codec.
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
|
||||
"nvidia,tegra-audio-sgtl5000";
|
||||
nvidia,model = "Toradex Apalis T30";
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HP_OUT",
|
||||
"LINE_IN", "Line In Jack",
|
||||
"MIC_IN", "Mic Jack";
|
||||
nvidia,i2s-controller = <&tegra_i2s2>;
|
||||
nvidia,audio-codec = <&sgtl5000>;
|
||||
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA30_CLK_EXTERN1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-sgtl5000.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with SGTL5000 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-sgtl5000([-_][a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-sgtl5000
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Line In Jack"
|
||||
- "Mic Jack"
|
||||
|
||||
# CODEC Pins
|
||||
- HP_OUT
|
||||
- LINE_OUT
|
||||
- LINE_IN
|
||||
- MIC_IN
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra30-car.h>
|
||||
|
||||
sound {
|
||||
compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
|
||||
"nvidia,tegra-audio-sgtl5000";
|
||||
nvidia,model = "Toradex Apalis T30 SGTL5000";
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HP_OUT",
|
||||
"LINE_IN", "Line In Jack",
|
||||
"MIC_IN", "Mic Jack";
|
||||
nvidia,i2s-controller = <&tegra_i2s2>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA30_CLK_EXTERN1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,21 +0,0 @@
|
||||
NVIDIA Tegra audio complex for TrimSlice
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-trimslice"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
- clock-names : Must include the following entries:
|
||||
"pll_a" (The Tegra clock of that name),
|
||||
"pll_a_out0" (The Tegra clock of that name),
|
||||
"mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
|
||||
- nvidia,audio-codec : The phandle of the WM8903 audio codec
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-trimslice";
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,33 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-trimslice.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with TrimSlice CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra-audio-trimslice
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-trimslice";
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,40 +0,0 @@
|
||||
NVIDIA Tegra audio complex
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-wm8753"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the WM8753's pins as documented in the binding for the WM8753,
|
||||
and the jacks on the board:
|
||||
|
||||
* Headphone Jack
|
||||
* Mic Jack
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
|
||||
- nvidia,audio-codec : The phandle of the WM8753 audio codec
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm8753-whistler",
|
||||
"nvidia,tegra-audio-wm8753"
|
||||
nvidia,model = "tegra-wm8753-harmony";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "LOUT1",
|
||||
"Headphone Jack", "ROUT1";
|
||||
|
||||
nvidia,i2s-controller = <&i2s1>;
|
||||
nvidia,audio-codec = <&wm8753>;
|
||||
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
|
||||
@ -0,0 +1,79 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm8753.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with WM8753 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-wm8753(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-wm8753
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Mic Jack"
|
||||
|
||||
# CODEC Pins
|
||||
- LOUT1
|
||||
- LOUT2
|
||||
- ROUT1
|
||||
- ROUT2
|
||||
- MONO1
|
||||
- MONO2
|
||||
- OUT3
|
||||
- OUT4
|
||||
- LINE1
|
||||
- LINE2
|
||||
- RXP
|
||||
- RXN
|
||||
- ACIN
|
||||
- ACOP
|
||||
- MIC1N
|
||||
- MIC1
|
||||
- MIC2N
|
||||
- MIC2
|
||||
- "Mic Bias"
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm8753-whistler",
|
||||
"nvidia,tegra-audio-wm8753";
|
||||
nvidia,model = "tegra-wm8753-harmony";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "LOUT1",
|
||||
"Headphone Jack", "ROUT1";
|
||||
|
||||
nvidia,i2s-controller = <&i2s1>;
|
||||
nvidia,audio-codec = <&wm8753>;
|
||||
|
||||
clocks = <&clk 112>, <&clk 113>, <&clk 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,62 +0,0 @@
|
||||
NVIDIA Tegra audio complex
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-wm8903"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the WM8903's pins (documented in the WM8903 binding document),
|
||||
and the jacks on the board:
|
||||
|
||||
* Headphone Jack
|
||||
* Int Spk
|
||||
* Mic Jack
|
||||
* Int Mic
|
||||
|
||||
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
|
||||
- nvidia,audio-codec : The phandle of the WM8903 audio codec
|
||||
|
||||
Optional properties:
|
||||
- nvidia,spkr-en-gpios : The GPIO that enables the speakers
|
||||
- nvidia,hp-mute-gpios : The GPIO that mutes the headphones
|
||||
- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
|
||||
- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone
|
||||
- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone
|
||||
- nvidia,headset : The Mic Jack represents state of the headset microphone pin
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm8903-harmony",
|
||||
"nvidia,tegra-audio-wm8903"
|
||||
nvidia,model = "tegra-wm8903-harmony";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Int Spk", "ROP",
|
||||
"Int Spk", "RON",
|
||||
"Int Spk", "LOP",
|
||||
"Int Spk", "LON",
|
||||
"Mic Jack", "MICBIAS",
|
||||
"IN1L", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&i2s1>;
|
||||
nvidia,audio-codec = <&wm8903>;
|
||||
|
||||
nvidia,spkr-en-gpios = <&codec 2 0>;
|
||||
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
|
||||
nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
|
||||
nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
|
||||
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
|
||||
@ -0,0 +1,93 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm8903.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with WM8903 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-wm8903(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-wm8903
|
||||
- items:
|
||||
- pattern: ad,tegra-audio-plutux
|
||||
- const: nvidia,tegra-audio-wm8903
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Int Spk"
|
||||
- "Mic Jack"
|
||||
- "Int Mic"
|
||||
|
||||
# CODEC Pins
|
||||
- IN1L
|
||||
- IN1R
|
||||
- IN2L
|
||||
- IN2R
|
||||
- IN3L
|
||||
- IN3R
|
||||
- DMICDAT
|
||||
- HPOUTL
|
||||
- HPOUTR
|
||||
- LINEOUTL
|
||||
- LINEOUTR
|
||||
- LOP
|
||||
- LON
|
||||
- ROP
|
||||
- RON
|
||||
- MICBIAS
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm8903-harmony",
|
||||
"nvidia,tegra-audio-wm8903";
|
||||
nvidia,model = "tegra-wm8903-harmony";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Int Spk", "ROP",
|
||||
"Int Spk", "RON",
|
||||
"Int Spk", "LOP",
|
||||
"Int Spk", "LON",
|
||||
"Mic Jack", "MICBIAS",
|
||||
"IN1L", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&i2s1>;
|
||||
nvidia,audio-codec = <&wm8903>;
|
||||
|
||||
nvidia,spkr-en-gpios = <&codec 2 0>;
|
||||
nvidia,hp-det-gpios = <&gpio 178 0>;
|
||||
nvidia,int-mic-en-gpios = <&gpio 184 0>;
|
||||
nvidia,ext-mic-en-gpios = <&gpio 185 0>;
|
||||
|
||||
clocks = <&clk 112>, <&clk 113>, <&clk 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,60 +0,0 @@
|
||||
NVIDIA Tegra audio complex
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra-audio-wm9712"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names : Must include the following entries:
|
||||
- pll_a
|
||||
- pll_a_out0
|
||||
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||
- nvidia,model : The user-visible name of this sound complex.
|
||||
- nvidia,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the WM9712's pins, and the jacks on the board:
|
||||
|
||||
WM9712 pins:
|
||||
|
||||
* MONOOUT
|
||||
* HPOUTL
|
||||
* HPOUTR
|
||||
* LOUT2
|
||||
* ROUT2
|
||||
* OUT3
|
||||
* LINEINL
|
||||
* LINEINR
|
||||
* PHONE
|
||||
* PCBEEP
|
||||
* MIC1
|
||||
* MIC2
|
||||
* Mic Bias
|
||||
|
||||
Board connectors:
|
||||
|
||||
* Headphone
|
||||
* LineIn
|
||||
* Mic
|
||||
|
||||
- nvidia,ac97-controller : The phandle of the Tegra AC97 controller
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
|
||||
"nvidia,tegra-audio-wm9712";
|
||||
nvidia,model = "Toradex Colibri T20";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone", "HPOUTL",
|
||||
"Headphone", "HPOUTR",
|
||||
"LineIn", "LINEINL",
|
||||
"LineIn", "LINEINR",
|
||||
"Mic", "MIC1";
|
||||
|
||||
nvidia,ac97-controller = <&ac97>;
|
||||
|
||||
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -0,0 +1,76 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm9712.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with WM9712 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-wm9712([-_][a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-wm9712
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone"
|
||||
- "LineIn"
|
||||
- "Mic"
|
||||
|
||||
# CODEC Pins
|
||||
- MONOOUT
|
||||
- HPOUTL
|
||||
- HPOUTR
|
||||
- LOUT2
|
||||
- ROUT2
|
||||
- OUT3
|
||||
- LINEINL
|
||||
- LINEINR
|
||||
- PHONE
|
||||
- PCBEEP
|
||||
- MIC1
|
||||
- MIC2
|
||||
- "Mic Bias"
|
||||
|
||||
required:
|
||||
- nvidia,ac97-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
|
||||
"nvidia,tegra-audio-wm9712";
|
||||
nvidia,model = "Toradex Colibri T20";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone", "HPOUTL",
|
||||
"Headphone", "HPOUTR",
|
||||
"LineIn", "LINEINL",
|
||||
"LineIn", "LINEINR",
|
||||
"Mic", "MIC1";
|
||||
|
||||
nvidia,ac97-controller = <&ac97>;
|
||||
|
||||
clocks = <&clk 112>, <&clk 113>, <&clk 93>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
@ -1,30 +0,0 @@
|
||||
NVIDIA Tegra 20 I2S controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra20-i2s"
|
||||
- reg : Should contain I2S registers location and length
|
||||
- interrupts : Should contain I2S interrupt
|
||||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names : Must include the following entries:
|
||||
- i2s
|
||||
- dmas : Must contain an entry for each entry in clock-names.
|
||||
See ../dma/dma.txt for details.
|
||||
- dma-names : Must include the following entries:
|
||||
- rx
|
||||
- tx
|
||||
- clocks : Must contain one entry, for the module clock.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
|
||||
Example:
|
||||
|
||||
i2s@70002800 {
|
||||
compatible = "nvidia,tegra20-i2s";
|
||||
reg = <0x70002800 0x200>;
|
||||
interrupts = < 45 >;
|
||||
clocks = <&tegra_car 11>;
|
||||
resets = <&tegra_car 11>;
|
||||
reset-names = "i2s";
|
||||
dmas = <&apbdma 21>, <&apbdma 21>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra20 I2S Controller
|
||||
|
||||
description: |
|
||||
The I2S Controller streams synchronous serial audio data between system
|
||||
memory and an external audio device. The controller supports the I2S Left
|
||||
Justified Mode, Right Justified Mode, and DSP mode formats.
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra20-i2s
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
const: i2s
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
|
||||
dmas:
|
||||
minItems: 2
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: rx
|
||||
- const: tx
|
||||
|
||||
nvidia,fixed-parent-rate:
|
||||
description: |
|
||||
Specifies whether board prefers parent clock to stay at a fixed rate.
|
||||
This allows multiple Tegra20 audio components work simultaneously by
|
||||
limiting number of supportable audio rates.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- resets
|
||||
- reset-names
|
||||
- interrupts
|
||||
- clocks
|
||||
- dmas
|
||||
- dma-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2s@70002800 {
|
||||
compatible = "nvidia,tegra20-i2s";
|
||||
reg = <0x70002800 0x200>;
|
||||
interrupts = <45>;
|
||||
clocks = <&tegra_car 11>;
|
||||
resets = <&tegra_car 11>;
|
||||
reset-names = "i2s";
|
||||
dmas = <&apbdma 21>, <&apbdma 21>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
||||
...
|
||||
@ -0,0 +1,85 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra20 S/PDIF Controller
|
||||
|
||||
description: |
|
||||
The S/PDIF controller supports both input and output in serial audio
|
||||
digital interface format. The input controller can digitally recover
|
||||
a clock from the received stream. The S/PDIF controller is also used
|
||||
to generate the embedded audio for HDMI output channel.
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra20-spdif
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: out
|
||||
- const: in
|
||||
|
||||
dmas:
|
||||
minItems: 2
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: rx
|
||||
- const: tx
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
nvidia,fixed-parent-rate:
|
||||
description: |
|
||||
Specifies whether board prefers parent clock to stay at a fixed rate.
|
||||
This allows multiple Tegra20 audio components work simultaneously by
|
||||
limiting number of supportable audio rates.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- resets
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- dmas
|
||||
- dma-names
|
||||
- "#sound-dai-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spdif@70002400 {
|
||||
compatible = "nvidia,tegra20-spdif";
|
||||
reg = <0x70002400 0x200>;
|
||||
interrupts = <77>;
|
||||
clocks = <&clk 99>, <&clk 98>;
|
||||
clock-names = "out", "in";
|
||||
resets = <&rst 10>;
|
||||
dmas = <&apbdma 3>, <&apbdma 3>;
|
||||
dma-names = "rx", "tx";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -50,9 +50,11 @@ properties:
|
||||
- const: hda2codec_2x
|
||||
|
||||
resets:
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
reset-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: hda
|
||||
- const: hda2hdmi
|
||||
|
||||
@ -24,11 +24,23 @@ properties:
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
rcv-gpios:
|
||||
description: optional GPIO to be asserted when receiver mode is enabled.
|
||||
|
||||
sound-name-prefix: true
|
||||
|
||||
vddd-supply:
|
||||
description: regulator phandle for the VDDD power supply.
|
||||
|
||||
if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,tfa9897
|
||||
then:
|
||||
properties:
|
||||
rcv-gpios: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -55,3 +67,32 @@ examples:
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
speaker_codec_top: audio-codec@34 {
|
||||
compatible = "nxp,tfa9897";
|
||||
reg = <0x34>;
|
||||
vddd-supply = <&pm8916_l6>;
|
||||
rcv-gpios = <&msmgpio 50 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&speaker_top_default>;
|
||||
sound-name-prefix = "Speaker Top";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
speaker_codec_bottom: audio-codec@36 {
|
||||
compatible = "nxp,tfa9897";
|
||||
reg = <0x36>;
|
||||
vddd-supply = <&pm8916_l6>;
|
||||
rcv-gpios = <&msmgpio 111 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&speaker_bottom_default>;
|
||||
sound-name-prefix = "Speaker Bottom";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -1,96 +0,0 @@
|
||||
* Qualcomm Technologies APQ8016 SBC ASoC machine driver
|
||||
|
||||
This node models the Qualcomm Technologies APQ8016 SBC ASoC machine driver
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "qcom,apq8016-sbc-sndcard"
|
||||
|
||||
- pinctrl-N : One property must exist for each entry in
|
||||
pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
|
||||
for details of the property values.
|
||||
- pinctrl-names : Must contain a "default" entry.
|
||||
- reg : Must contain an address for each entry in reg-names.
|
||||
- reg-names : A list which must include the following entries:
|
||||
* "mic-iomux"
|
||||
* "spkr-iomux"
|
||||
- qcom,model : Name of the sound card.
|
||||
|
||||
- qcom,audio-routing : A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the
|
||||
connection's sink, the second being the connection's
|
||||
source. Valid names could be power supplies, MicBias
|
||||
of msm8x16_wcd codec and the jacks on the board:
|
||||
|
||||
Power supplies:
|
||||
* MIC BIAS External1
|
||||
* MIC BIAS External2
|
||||
* MIC BIAS Internal1
|
||||
* MIC BIAS Internal2
|
||||
|
||||
Board connectors:
|
||||
* Headset Mic
|
||||
* Secondary Mic
|
||||
* DMIC
|
||||
* Ext Spk
|
||||
|
||||
Optional properties:
|
||||
|
||||
- aux-devs : A list of phandles for auxiliary devices (e.g. analog
|
||||
amplifiers) that do not appear directly within the DAI
|
||||
links. Should be connected to another audio component
|
||||
using "qcom,audio-routing".
|
||||
|
||||
Dai-link subnode properties and subnodes:
|
||||
|
||||
Required dai-link subnodes:
|
||||
|
||||
- cpu : CPU sub-node
|
||||
- codec : CODEC sub-node
|
||||
|
||||
Required CPU/CODEC subnodes properties:
|
||||
|
||||
-link-name : Name of the dai link.
|
||||
-sound-dai : phandle/s and port of CPU/CODEC
|
||||
|
||||
Example:
|
||||
|
||||
sound: sound {
|
||||
compatible = "qcom,apq8016-sbc-sndcard";
|
||||
reg = <0x07702000 0x4>, <0x07702004 0x4>;
|
||||
reg-names = "mic-iomux", "spkr-iomux";
|
||||
qcom,model = "DB410c";
|
||||
|
||||
qcom,audio-routing =
|
||||
"MIC BIAS External1", "Handset Mic",
|
||||
"MIC BIAS Internal2", "Headset Mic",
|
||||
"MIC BIAS External1", "Secondary Mic",
|
||||
"AMIC1", "MIC BIAS External1",
|
||||
"AMIC2", "MIC BIAS Internal2",
|
||||
"AMIC3", "MIC BIAS External1",
|
||||
"DMIC1", "MIC BIAS Internal1",
|
||||
"MIC BIAS Internal1", "Digital Mic1",
|
||||
"DMIC2", "MIC BIAS Internal1",
|
||||
"MIC BIAS Internal1", "Digital Mic2";
|
||||
|
||||
/* I2S - Internal codec */
|
||||
internal-dai-link@0 {
|
||||
cpu { /* PRIMARY */
|
||||
sound-dai = <&lpass MI2S_PRIMARY>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* External Primary or External Secondary -ADV7533 HDMI */
|
||||
external-dai-link@0 {
|
||||
link-name = "ADV7533";
|
||||
cpu { /* QUAT */
|
||||
sound-dai = <&lpass MI2S_QUATERNARY>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&adv_bridge 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -4,18 +4,20 @@
|
||||
$id: http://devicetree.org/schemas/sound/qcom,sm8250.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies Inc. SM8250 ASoC sound card driver
|
||||
title: Qualcomm Technologies Inc. ASoC sound card drivers
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description:
|
||||
This bindings describes SC8250 SoC based sound cards
|
||||
This bindings describes Qualcomm SoC based sound cards
|
||||
which uses LPASS internal codec for audio.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,apq8016-sbc-sndcard
|
||||
- qcom,msm8916-qdsp6-sndcard
|
||||
- qcom,sm8250-sndcard
|
||||
- qcom,qrb5165-rb5-sndcard
|
||||
|
||||
@ -27,10 +29,28 @@ properties:
|
||||
being the connection's source. Valid names could be power supplies,
|
||||
MicBias of codec and the jacks on the board.
|
||||
|
||||
aux-devs:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description: |
|
||||
List of phandles pointing to auxiliary devices, such
|
||||
as amplifiers, to be added to the sound card.
|
||||
|
||||
model:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: User visible long sound card name
|
||||
|
||||
pin-switches:
|
||||
description: List of widget names for which pin switches should be created.
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
|
||||
widgets:
|
||||
description: User specified audio sound widgets.
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
|
||||
# Only valid for some compatibles (see allOf if below)
|
||||
reg: true
|
||||
reg-names: true
|
||||
|
||||
patternProperties:
|
||||
".*-dai-link$":
|
||||
description:
|
||||
@ -73,6 +93,34 @@ required:
|
||||
- compatible
|
||||
- model
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,apq8016-sbc-sndcard
|
||||
- qcom,msm8916-qdsp6-sndcard
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: Microphone I/O mux register address
|
||||
- description: Speaker I/O mux register address
|
||||
reg-names:
|
||||
items:
|
||||
- const: mic-iomux
|
||||
- const: spkr-iomux
|
||||
required:
|
||||
- compatible
|
||||
- model
|
||||
- reg
|
||||
- reg-names
|
||||
else:
|
||||
properties:
|
||||
reg: false
|
||||
reg-names: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
@ -86,10 +134,7 @@ examples:
|
||||
audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
|
||||
"SpkrRight IN", "WSA_SPK2 OUT",
|
||||
"VA DMIC0", "vdd-micb",
|
||||
"VA DMIC1", "vdd-micb",
|
||||
"MM_DL1", "MultiMedia1 Playback",
|
||||
"MM_DL2", "MultiMedia2 Playback",
|
||||
"MultiMedia3 Capture", "MM_UL3";
|
||||
"VA DMIC1", "vdd-micb";
|
||||
|
||||
mm1-dai-link {
|
||||
link-name = "MultiMedia0";
|
||||
@ -157,3 +202,98 @@ examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/sound/qcom,lpass.h>
|
||||
sound@7702000 {
|
||||
compatible = "qcom,apq8016-sbc-sndcard";
|
||||
reg = <0x07702000 0x4>, <0x07702004 0x4>;
|
||||
reg-names = "mic-iomux", "spkr-iomux";
|
||||
|
||||
model = "DB410c";
|
||||
audio-routing =
|
||||
"AMIC2", "MIC BIAS Internal2",
|
||||
"AMIC3", "MIC BIAS External1";
|
||||
|
||||
pinctrl-0 = <&cdc_pdm_lines_act &ext_sec_tlmm_lines_act &ext_mclk_tlmm_lines_act>;
|
||||
pinctrl-1 = <&cdc_pdm_lines_sus &ext_sec_tlmm_lines_sus &ext_mclk_tlmm_lines_sus>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
|
||||
quaternary-dai-link {
|
||||
link-name = "ADV7533";
|
||||
cpu {
|
||||
sound-dai = <&lpass MI2S_QUATERNARY>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&adv_bridge 0>;
|
||||
};
|
||||
};
|
||||
|
||||
primary-dai-link {
|
||||
link-name = "WCD";
|
||||
cpu {
|
||||
sound-dai = <&lpass MI2S_PRIMARY>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
|
||||
};
|
||||
};
|
||||
|
||||
tertiary-dai-link {
|
||||
link-name = "WCD-Capture";
|
||||
cpu {
|
||||
sound-dai = <&lpass MI2S_TERTIARY>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&lpass_codec 1>, <&wcd_codec 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/sound/qcom,q6afe.h>
|
||||
#include <dt-bindings/sound/qcom,q6asm.h>
|
||||
sound@7702000 {
|
||||
compatible = "qcom,msm8916-qdsp6-sndcard";
|
||||
reg = <0x07702000 0x4>, <0x07702004 0x4>;
|
||||
reg-names = "mic-iomux", "spkr-iomux";
|
||||
|
||||
model = "msm8916";
|
||||
widgets =
|
||||
"Speaker", "Speaker",
|
||||
"Headphone", "Headphones";
|
||||
pin-switches = "Speaker";
|
||||
audio-routing =
|
||||
"Speaker", "Speaker Amp OUT",
|
||||
"Speaker Amp IN", "HPH_R",
|
||||
"Headphones", "HPH_L",
|
||||
"Headphones", "HPH_R",
|
||||
"AMIC1", "MIC BIAS Internal1",
|
||||
"AMIC2", "MIC BIAS Internal2",
|
||||
"AMIC3", "MIC BIAS Internal3";
|
||||
aux-devs = <&speaker_amp>;
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cdc_pdm_lines_act>;
|
||||
pinctrl-1 = <&cdc_pdm_lines_sus>;
|
||||
|
||||
mm1-dai-link {
|
||||
link-name = "MultiMedia1";
|
||||
cpu {
|
||||
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
|
||||
};
|
||||
};
|
||||
|
||||
primary-dai-link {
|
||||
link-name = "Primary MI2S";
|
||||
cpu {
|
||||
sound-dai = <&q6afedai PRIMARY_MI2S_RX>;
|
||||
};
|
||||
platform {
|
||||
sound-dai = <&q6routing>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -61,6 +61,10 @@ properties:
|
||||
description: |
|
||||
Set the delay time (ms) for the requirement of the particular DMIC.
|
||||
|
||||
realtek,amic-delay-ms:
|
||||
description: |
|
||||
Set the delay time (ms) for the requirement of the particular platform or AMIC.
|
||||
|
||||
realtek,dmic-clk-driving-high:
|
||||
type: boolean
|
||||
description: |
|
||||
|
||||
@ -9,6 +9,9 @@ title: Simple Audio Amplifier Device Tree Bindings
|
||||
maintainers:
|
||||
- Jerome Brunet <jbrunet@baylibre.com>
|
||||
|
||||
allOf:
|
||||
- $ref: name-prefix.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
@ -22,10 +25,7 @@ properties:
|
||||
description: >
|
||||
power supply for the device
|
||||
|
||||
sound-name-prefix:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: >
|
||||
See ./name-prefix.txt
|
||||
sound-name-prefix: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
137
Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml
Normal file
137
Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml
Normal file
@ -0,0 +1,137 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/ti,tlv320adc3xxx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments TLV320ADC3001/TLV320ADC3101 Stereo ADC
|
||||
|
||||
maintainers:
|
||||
- Ricard Wanderlof <ricardw@axis.com>
|
||||
|
||||
description: |
|
||||
Texas Instruments TLV320ADC3001 and TLV320ADC3101 Stereo ADC
|
||||
https://www.ti.com/product/TLV320ADC3001
|
||||
https://www.ti.com/product/TLV320ADC3101
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tlv320adc3001
|
||||
- ti,tlv320adc3101
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: I2C address
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO pin used for codec reset (RESET pin)
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description: Master clock (MCLK)
|
||||
|
||||
ti,dmdin-gpio1:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
|
||||
- 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
|
||||
- 2 # ADC3XXX_GPIO_GPI - General purpose input
|
||||
- 3 # ADC3XXX_GPIO_GPO - General purpose output
|
||||
- 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
|
||||
- 5 # ADC3XXX_GPIO_INT1 - INT1 output
|
||||
- 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
|
||||
- 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
|
||||
default: 0
|
||||
description: |
|
||||
Configuration for DMDIN/GPIO1 pin.
|
||||
|
||||
When ADC3XXX_GPIO_GPO is configured, this causes corresponding the
|
||||
ALSA control "GPIOx Output" to appear, as a switch control.
|
||||
|
||||
ti,dmclk-gpio2:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
|
||||
- 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
|
||||
- 2 # ADC3XXX_GPIO_GPI - General purpose input
|
||||
- 3 # ADC3XXX_GPIO_GPO - General purpose output
|
||||
- 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
|
||||
- 5 # ADC3XXX_GPIO_INT1 - INT1 output
|
||||
- 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
|
||||
- 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
|
||||
default: 0
|
||||
description: |
|
||||
Configuration for DMCLK/GPIO2 pin.
|
||||
|
||||
When ADC3XXX_GPIO_GPO is configured, this causes corresponding the
|
||||
ALSA control "GPIOx Output" to appear, as a switch control.
|
||||
|
||||
Note that there is currently no support for reading the GPIO pins as
|
||||
inputs.
|
||||
|
||||
ti,micbias1-vg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
|
||||
- 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
|
||||
- 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
|
||||
- 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
|
||||
default: 0
|
||||
description: |
|
||||
Mic bias voltage output on MICBIAS1 pin
|
||||
|
||||
ti,micbias2-vg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
|
||||
- 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
|
||||
- 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
|
||||
- 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
|
||||
default: 0
|
||||
description: |
|
||||
Mic bias voltage output on MICBIAS2 pin
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/sound/tlv320adc3xxx.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
tlv320adc3101: audio-codec@18 {
|
||||
compatible = "ti,tlv320adc3101";
|
||||
reg = <0x18>;
|
||||
reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&audio_mclk>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>;
|
||||
ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>;
|
||||
};
|
||||
};
|
||||
|
||||
audio_mclk: clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24576000>;
|
||||
};
|
||||
...
|
||||
116
Documentation/devicetree/bindings/sound/wlf,wm8903.yaml
Normal file
116
Documentation/devicetree/bindings/sound/wlf,wm8903.yaml
Normal file
@ -0,0 +1,116 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/sound/wlf,wm8903.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: WM8903 audio codec
|
||||
|
||||
description: |
|
||||
This device supports I2C only.
|
||||
Pins on the device (for linking into audio routes):
|
||||
* IN1L
|
||||
* IN1R
|
||||
* IN2L
|
||||
* IN2R
|
||||
* IN3L
|
||||
* IN3R
|
||||
* DMICDAT
|
||||
* HPOUTL
|
||||
* HPOUTR
|
||||
* LINEOUTL
|
||||
* LINEOUTR
|
||||
* LOP
|
||||
* LON
|
||||
* ROP
|
||||
* RON
|
||||
* MICBIAS
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8903
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
gpio-controller: true
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
micdet-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
description: Default register value for R6 (Mic Bias).
|
||||
|
||||
micdet-delay:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 100
|
||||
description: The debounce delay for microphone detection in mS.
|
||||
|
||||
gpio-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: |
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
A list of GPIO configuration register values.
|
||||
If absent, no configuration of these registers is performed.
|
||||
If any entry has the value 0xffffffff, that GPIO's
|
||||
configuration will not be modified.
|
||||
|
||||
AVDD-supply:
|
||||
description: Analog power supply regulator on the AVDD pin.
|
||||
|
||||
CPVDD-supply:
|
||||
description: Charge pump supply regulator on the CPVDD pin.
|
||||
|
||||
DBVDD-supply:
|
||||
description: Digital buffer supply regulator for the DBVDD pin.
|
||||
|
||||
DCVDD-supply:
|
||||
description: Digital core supply regulator for the DCVDD pin.
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wm8903: codec@1a {
|
||||
compatible = "wlf,wm8903";
|
||||
reg = <0x1a>;
|
||||
interrupts = <347>;
|
||||
|
||||
AVDD-supply = <&fooreg_a>;
|
||||
CPVDD-supply = <&fooreg_b>;
|
||||
DBVDD-supply = <&fooreg_c>;
|
||||
DCVDD-supply = <&fooreg_d>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
micdet-cfg = <0>;
|
||||
micdet-delay = <100>;
|
||||
gpio-cfg = <
|
||||
0x0600 /* DMIC_LR, output */
|
||||
0x0680 /* DMIC_DAT, input */
|
||||
0x0000 /* GPIO, output, low */
|
||||
0x0200 /* Interrupt, output */
|
||||
0x01a0 /* BCLK, input, active high */
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -1,82 +0,0 @@
|
||||
WM8903 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8903"
|
||||
|
||||
- reg : the I2C address of the device.
|
||||
|
||||
- gpio-controller : Indicates this device is a GPIO controller.
|
||||
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and the
|
||||
second cell is used to specify optional parameters (currently unused).
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupts : The interrupt line the codec is connected to.
|
||||
|
||||
- micdet-cfg : Default register value for R6 (Mic Bias). If absent, the
|
||||
default is 0.
|
||||
|
||||
- micdet-delay : The debounce delay for microphone detection in mS. If
|
||||
absent, the default is 100.
|
||||
|
||||
- gpio-cfg : A list of GPIO configuration register values. The list must
|
||||
be 5 entries long. If absent, no configuration of these registers is
|
||||
performed. If any entry has the value 0xffffffff, that GPIO's
|
||||
configuration will not be modified.
|
||||
|
||||
- AVDD-supply : Analog power supply regulator on the AVDD pin.
|
||||
|
||||
- CPVDD-supply : Charge pump supply regulator on the CPVDD pin.
|
||||
|
||||
- DBVDD-supply : Digital buffer supply regulator for the DBVDD pin.
|
||||
|
||||
- DCVDD-supply : Digital core supply regulator for the DCVDD pin.
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
|
||||
* IN1L
|
||||
* IN1R
|
||||
* IN2L
|
||||
* IN2R
|
||||
* IN3L
|
||||
* IN3R
|
||||
* DMICDAT
|
||||
* HPOUTL
|
||||
* HPOUTR
|
||||
* LINEOUTL
|
||||
* LINEOUTR
|
||||
* LOP
|
||||
* LON
|
||||
* ROP
|
||||
* RON
|
||||
* MICBIAS
|
||||
|
||||
Example:
|
||||
|
||||
wm8903: codec@1a {
|
||||
compatible = "wlf,wm8903";
|
||||
reg = <0x1a>;
|
||||
interrupts = < 347 >;
|
||||
|
||||
AVDD-supply = <&fooreg_a>;
|
||||
CPVDD-supply = <&fooreg_b>;
|
||||
DBVDD-supply = <&fooreg_c>;
|
||||
DCVDC-supply = <&fooreg_d>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
micdet-cfg = <0>;
|
||||
micdet-delay = <100>;
|
||||
gpio-cfg = <
|
||||
0x0600 /* DMIC_LR, output */
|
||||
0x0680 /* DMIC_DAT, input */
|
||||
0x0000 /* GPIO, output, low */
|
||||
0x0200 /* Interrupt, output */
|
||||
0x01a0 /* BCLK, input, active high */
|
||||
>;
|
||||
};
|
||||
@ -0,0 +1,76 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mediatek SPMI Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
|
||||
|
||||
description: |+
|
||||
On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
|
||||
for multiple SoCs to control a single SPMI master.
|
||||
|
||||
allOf:
|
||||
- $ref: "spmi.yaml"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt6873-spmi
|
||||
- mediatek,mt8195-spmi
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pmif
|
||||
- const: spmimst
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pmif_sys_ck
|
||||
- const: pmif_tmr_ck
|
||||
- const: spmimst_clk_mux
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
|
||||
assigned-clock-parents:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8192-clk.h>
|
||||
|
||||
spmi: spmi@10027000 {
|
||||
compatible = "mediatek,mt6873-spmi";
|
||||
reg = <0x10027000 0xe00>,
|
||||
<0x10029000 0x100>;
|
||||
reg-names = "pmif", "spmimst";
|
||||
clocks = <&infracfg CLK_INFRA_PMIC_AP>,
|
||||
<&infracfg CLK_INFRA_PMIC_TMR>,
|
||||
<&topckgen CLK_TOP_SPMI_MST_SEL>;
|
||||
clock-names = "pmif_sys_ck",
|
||||
"pmif_tmr_ck",
|
||||
"spmimst_clk_mux";
|
||||
assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
|
||||
};
|
||||
...
|
||||
@ -24,9 +24,6 @@ properties:
|
||||
$nodename:
|
||||
pattern: "^spmi@.*"
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 2
|
||||
|
||||
|
||||
@ -16,6 +16,7 @@ Required properties:
|
||||
"qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
- interrupts : <interrupt mapping for UFS host controller IRQ>
|
||||
- reg : <registers mapping>
|
||||
|
||||
|
||||
@ -6,8 +6,7 @@ API to implement a new FPGA bridge
|
||||
|
||||
* struct fpga_bridge - The FPGA Bridge structure
|
||||
* struct fpga_bridge_ops - Low level Bridge driver ops
|
||||
* devm_fpga_bridge_create() - Allocate and init a bridge struct
|
||||
* fpga_bridge_register() - Register a bridge
|
||||
* fpga_bridge_register() - Create and register a bridge
|
||||
* fpga_bridge_unregister() - Unregister a bridge
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
@ -16,9 +15,6 @@ API to implement a new FPGA bridge
|
||||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
:functions: fpga_bridge_ops
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-bridge.c
|
||||
:functions: devm_fpga_bridge_create
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-bridge.c
|
||||
:functions: fpga_bridge_register
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user