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* keystone/mirror-android14-6.1-2023-12: (2159 commits)
  ANDROID: Update the ABI symbol list
  ANDROID: GKI: Update symbol list for mtk
  ANDROID: mm: lru_cache_disable skips lru cache drainnig
  ANDROID: mm: cma: introduce __cma_alloc API
  ANDROID: Update the ABI representation
  BACKPORT: fscrypt: support crypto data unit size less than filesystem block size
  UPSTREAM: netfilter: nf_tables: remove catchall element in GC sync path
  ANDROID: GKI: Update oplus symbol list
  ANDROID: vendor_hooks: export tracepoint symbol trace_mm_vmscan_kswapd_wake
  BACKPORT: HID: input: map battery system charging
  ANDROID: fuse-bpf: Ignore readaheads unless they go to the daemon
  FROMGIT: f2fs: skip adding a discard command if exists
  UPSTREAM: f2fs: clean up zones when not successfully unmounted
  UPSTREAM: f2fs: use finish zone command when closing a zone
  UPSTREAM: f2fs: check zone write pointer points to the end of zone
  UPSTREAM: f2fs: close unused open zones while mounting
  UPSTREAM: f2fs: maintain six open zones for zoned devices
  ANDROID: update symbol for unisoc whitelist
  ANDROID: vendor_hooks: mm: add hook to count the number pages allocated for each slab
  ANDROID: Update the ABI symbol list
  ...

Change-Id: I9c0a3423376524b5392f0670c27fb0515fec3407
Signed-off-by: Omkar Sai Sandeep Katadi <okatadi@google.com>
This commit is contained in:
Omkar Sai Sandeep Katadi 2023-12-15 20:22:18 +00:00
commit 027d47e0e0
2085 changed files with 25864 additions and 12855 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo
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@ -5,6 +5,6 @@ Description:
Indicates whether or not this SBE device has experienced a
timeout; i.e. the SBE did not respond within the time allotted
by the driver. A value of 1 indicates that a timeout has
ocurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has ocurred, or if one
has, more recent transfers have completed successful.
occurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has occurred, or if one
has, more recent transfers have completed successfully.

15
Documentation/ABI/testing/sysfs-devices-system-cpu
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@ -513,17 +513,18 @@ Description: information about CPUs heterogeneity.
cpu_capacity: capacity of cpuX.
What: /sys/devices/system/cpu/vulnerabilities
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/l1tf
/sys/devices/system/cpu/vulnerabilities/mds
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
/sys/devices/system/cpu/vulnerabilities/retbleed
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/srbds
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
Date: January 2018
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Information about CPU vulnerabilities

2
Documentation/ABI/testing/sysfs-driver-chromeos-acpi
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@ -134,4 +134,4 @@ KernelVersion: 5.19
Description:
Returns the verified boot data block shared between the
firmware verification step and the kernel verification step
(binary).
(hex dump).

9
Documentation/admin-guide/cgroup-v1/memory.rst
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@ -91,8 +91,13 @@ Brief summary of control files.
memory.oom_control set/show oom controls.
memory.numa_stat show the number of memory usage per numa
node
memory.kmem.limit_in_bytes This knob is deprecated and writing to
it will return -ENOTSUPP.
memory.kmem.limit_in_bytes Deprecated knob to set and read the kernel
memory hard limit. Kernel hard limit is not
supported since 5.16. Writing any value to
do file will not have any effect same as if
nokmem kernel parameter was specified.
Kernel memory is still charged and reported
by memory.kmem.usage_in_bytes.
memory.kmem.usage_in_bytes show current kernel memory allocation
memory.kmem.failcnt show the number of kernel memory usage
hits limits

109
Documentation/admin-guide/hw-vuln/gather_data_sampling.rst Normal file
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@ -0,0 +1,109 @@
.. SPDX-License-Identifier: GPL-2.0
GDS - Gather Data Sampling
==========================
Gather Data Sampling is a hardware vulnerability which allows unprivileged
speculative access to data which was previously stored in vector registers.
Problem
-------
When a gather instruction performs loads from memory, different data elements
are merged into the destination vector register. However, when a gather
instruction that is transiently executed encounters a fault, stale data from
architectural or internal vector registers may get transiently forwarded to the
destination vector register instead. This will allow a malicious attacker to
infer stale data using typical side channel techniques like cache timing
attacks. GDS is a purely sampling-based attack.
The attacker uses gather instructions to infer the stale vector register data.
The victim does not need to do anything special other than use the vector
registers. The victim does not need to use gather instructions to be
vulnerable.
Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
are possible.
Attack scenarios
----------------
Without mitigation, GDS can infer stale data across virtually all
permission boundaries:
Non-enclaves can infer SGX enclave data
Userspace can infer kernel data
Guests can infer data from hosts
Guest can infer guest from other guests
Users can infer data from other users
Because of this, it is important to ensure that the mitigation stays enabled in
lower-privilege contexts like guests and when running outside SGX enclaves.
The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
that guests are not allowed to disable the GDS mitigation. If a host erred and
allowed this, a guest could theoretically disable GDS mitigation, mount an
attack, and re-enable it.
Mitigation mechanism
--------------------
This issue is mitigated in microcode. The microcode defines the following new
bits:
================================ === ============================
IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
and mitigation support.
IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
0 by default.
IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
to GDS_MITG_DIS are ignored
Can't be cleared once set.
================================ === ============================
GDS can also be mitigated on systems that don't have updated microcode by
disabling AVX. This can be done by setting gather_data_sampling="force" or
"clearcpuid=avx" on the kernel command-line.
If used, these options will disable AVX use by turning off XSAVE YMM support.
However, the processor will still enumerate AVX support. Userspace that
does not follow proper AVX enumeration to check both AVX *and* XSAVE YMM
support will break.
Mitigation control on the kernel command line
---------------------------------------------
The mitigation can be disabled by setting "gather_data_sampling=off" or
"mitigations=off" on the kernel command line. Not specifying either will default
to the mitigation being enabled. Specifying "gather_data_sampling=force" will
use the microcode mitigation when available or disable AVX on affected systems
where the microcode hasn't been updated to include the mitigation.
GDS System Information
------------------------
The kernel provides vulnerability status information through sysfs. For
GDS this can be accessed by the following sysfs file:
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
The possible values contained in this file are:
============================== =============================================
Not affected Processor not vulnerable.
Vulnerable Processor vulnerable and mitigation disabled.
Vulnerable: No microcode Processor vulnerable and microcode is missing
mitigation.
Mitigation: AVX disabled,
no microcode Processor is vulnerable and microcode is missing
mitigation. AVX disabled as mitigation.
Mitigation: Microcode Processor is vulnerable and mitigation is in
effect.
Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
effect and cannot be disabled.
Unknown: Dependent on
hypervisor status Running on a virtual guest processor that is
affected but with no way to know if host
processor is mitigated or vulnerable.
============================== =============================================
GDS Default mitigation
----------------------
The updated microcode will enable the mitigation by default. The kernel's
default action is to leave the mitigation enabled.

2
Documentation/admin-guide/hw-vuln/index.rst
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@ -19,3 +19,5 @@ are configurable at compile, boot or run time.
l1d_flush.rst
processor_mmio_stale_data.rst
cross-thread-rsb.rst
gather_data_sampling.rst
srso

133
Documentation/admin-guide/hw-vuln/srso.rst Normal file
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@ -0,0 +1,133 @@
.. SPDX-License-Identifier: GPL-2.0
Speculative Return Stack Overflow (SRSO)
========================================
This is a mitigation for the speculative return stack overflow (SRSO)
vulnerability found on AMD processors. The mechanism is by now the well
known scenario of poisoning CPU functional units - the Branch Target
Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
tricking the elevated privilege domain (the kernel) into leaking
sensitive data.
AMD CPUs predict RET instructions using a Return Address Predictor (aka
Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
CALL instruction (i.e., an instruction predicted to be a CALL but is
not actually a CALL) can create an entry in the RAP which may be used
to predict the target of a subsequent RET instruction.
The specific circumstances that lead to this varies by microarchitecture
but the concern is that an attacker can mis-train the CPU BTB to predict
non-architectural CALL instructions in kernel space and use this to
control the speculative target of a subsequent kernel RET, potentially
leading to information disclosure via a speculative side-channel.
The issue is tracked under CVE-2023-20569.
Affected processors
-------------------
AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
processors have not been investigated.
System information and options
------------------------------
First of all, it is required that the latest microcode be loaded for
mitigations to be effective.
The sysfs file showing SRSO mitigation status is:
/sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
The possible values in this file are:
- 'Not affected' The processor is not vulnerable
- 'Vulnerable: no microcode' The processor is vulnerable, no
microcode extending IBPB functionality
to address the vulnerability has been
applied.
- 'Mitigation: microcode' Extended IBPB functionality microcode
patch has been applied. It does not
address User->Kernel and Guest->Host
transitions protection but it does
address User->User and VM->VM attack
vectors.
(spec_rstack_overflow=microcode)
- 'Mitigation: safe RET' Software-only mitigation. It complements
the extended IBPB microcode patch
functionality by addressing User->Kernel
and Guest->Host transitions protection.
Selected by default or by
spec_rstack_overflow=safe-ret
- 'Mitigation: IBPB' Similar protection as "safe RET" above
but employs an IBPB barrier on privilege
domain crossings (User->Kernel,
Guest->Host).
(spec_rstack_overflow=ibpb)
- 'Mitigation: IBPB on VMEXIT' Mitigation addressing the cloud provider
scenario - the Guest->Host transitions
only.
(spec_rstack_overflow=ibpb-vmexit)
In order to exploit vulnerability, an attacker needs to:
- gain local access on the machine
- break kASLR
- find gadgets in the running kernel in order to use them in the exploit
- potentially create and pin an additional workload on the sibling
thread, depending on the microarchitecture (not necessary on fam 0x19)
- run the exploit
Considering the performance implications of each mitigation type, the
default one is 'Mitigation: safe RET' which should take care of most
attack vectors, including the local User->Kernel one.
As always, the user is advised to keep her/his system up-to-date by
applying software updates regularly.
The default setting will be reevaluated when needed and especially when
new attack vectors appear.
As one can surmise, 'Mitigation: safe RET' does come at the cost of some
performance depending on the workload. If one trusts her/his userspace
and does not want to suffer the performance impact, one can always
disable the mitigation with spec_rstack_overflow=off.
Similarly, 'Mitigation: IBPB' is another full mitigation type employing
an indrect branch prediction barrier after having applied the required
microcode patch for one's system. This mitigation comes also at
a performance cost.
Mitigation: safe RET
--------------------
The mitigation works by ensuring all RET instructions speculate to
a controlled location, similar to how speculation is controlled in the
retpoline sequence. To accomplish this, the __x86_return_thunk forces
the CPU to mispredict every function return using a 'safe return'
sequence.
To ensure the safety of this mitigation, the kernel must ensure that the
safe return sequence is itself free from attacker interference. In Zen3
and Zen4, this is accomplished by creating a BTB alias between the
untraining function srso_alias_untrain_ret() and the safe return
function srso_alias_safe_ret() which results in evicting a potentially
poisoned BTB entry and using that safe one for all function returns.
In older Zen1 and Zen2, this is accomplished using a reinterpretation
technique similar to Retbleed one: srso_untrain_ret() and
srso_safe_ret().

63
Documentation/admin-guide/kernel-parameters.txt
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@ -323,6 +323,7 @@
option with care.
pgtbl_v1 - Use v1 page table for DMA-API (Default).
pgtbl_v2 - Use v2 page table for DMA-API.
irtcachedis - Disable Interrupt Remapping Table (IRT) caching.
amd_iommu_dump= [HW,X86-64]
Enable AMD IOMMU driver option to dump the ACPI table
@ -1597,6 +1598,26 @@
Format: off | on
default: on
gather_data_sampling=
[X86,INTEL] Control the Gather Data Sampling (GDS)
mitigation.
Gather Data Sampling is a hardware vulnerability which
allows unprivileged speculative access to data which was
previously stored in vector registers.
This issue is mitigated by default in updated microcode.
The mitigation may have a performance impact but can be
disabled. On systems without the microcode mitigation
disabling AVX serves as a mitigation.
force: Disable AVX to mitigate systems without
microcode mitigation. No effect if the microcode
mitigation is present. Known to cause crashes in
userspace with buggy AVX enumeration.
off: Disable GDS mitigation.
gcov_persist= [GCOV] When non-zero (default), profiling data for
kernel modules is saved and remains accessible via
debugfs, even when the module is unloaded/reloaded.
@ -3265,24 +3286,25 @@
Disable all optional CPU mitigations. This
improves system performance, but it may also
expose users to several CPU vulnerabilities.
Equivalent to: nopti [X86,PPC]
if nokaslr then kpti=0 [ARM64]
nospectre_v1 [X86,PPC]
nobp=0 [S390]
nospectre_v2 [X86,PPC,S390,ARM64]
spectre_v2_user=off [X86]
spec_store_bypass_disable=off [X86,PPC]
ssbd=force-off [ARM64]
nospectre_bhb [ARM64]
Equivalent to: if nokaslr then kpti=0 [ARM64]
gather_data_sampling=off [X86]
kvm.nx_huge_pages=off [X86]
l1tf=off [X86]
mds=off [X86]
tsx_async_abort=off [X86]
kvm.nx_huge_pages=off [X86]
srbds=off [X86,INTEL]
mmio_stale_data=off [X86]
no_entry_flush [PPC]
no_uaccess_flush [PPC]
mmio_stale_data=off [X86]
nobp=0 [S390]
nopti [X86,PPC]
nospectre_bhb [ARM64]
nospectre_v1 [X86,PPC]
nospectre_v2 [X86,PPC,S390,ARM64]
retbleed=off [X86]
spec_store_bypass_disable=off [X86,PPC]
spectre_v2_user=off [X86]
srbds=off [X86,INTEL]
ssbd=force-off [ARM64]
tsx_async_abort=off [X86]
Exceptions:
This does not have any effect on
@ -5801,6 +5823,17 @@
Not specifying this option is equivalent to
spectre_v2_user=auto.
spec_rstack_overflow=
[X86] Control RAS overflow mitigation on AMD Zen CPUs
off - Disable mitigation
microcode - Enable microcode mitigation only
safe-ret - Enable sw-only safe RET mitigation (default)
ibpb - Enable mitigation by issuing IBPB on
kernel entry
ibpb-vmexit - Issue IBPB only on VMEXIT
(cloud-specific mitigation)
spec_store_bypass_disable=
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
(Speculative Store Bypass vulnerability)
@ -6168,10 +6201,6 @@
-1: disable all critical trip points in all thermal zones
<degrees C>: override all critical trip points
thermal.nocrt= [HW,ACPI]
Set to disable actions on ACPI thermal zone
critical and hot trip points.
thermal.off= [HW,ACPI]
1: disable ACPI thermal control

7
Documentation/arm64/silicon-errata.rst
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@ -138,6 +138,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-500 | #841119,826419 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-600 | #1076982,1209401| N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-700 | #2268618,2812531| N/A |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
+----------------+-----------------+-----------------+-----------------------------+
@ -187,6 +191,9 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
| | Hip09 SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
+----------------+-----------------+-----------------+-----------------------------+

2
Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
View File

@ -16,8 +16,6 @@ description: |
reads required input clock frequencies from the devicetree and acts as clock
provider for all clock consumers of PS clocks.
select: false
properties:
compatible:
const: xlnx,versal-clk

1
Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
View File

@ -23,6 +23,7 @@ properties:
connector:
$ref: /schemas/connector/usb-connector.yaml#
unevaluatedProperties: false
ports:
$ref: /schemas/graph.yaml#/properties/ports

46
Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt
View File

@ -23,6 +23,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@51 {
@ -35,6 +38,26 @@ Example:
#gpio-cells = <2>;
};
sc16is752: sc16is752@53 {
compatible = "nxp,sc16is752";
reg = <0x53>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@54 {
compatible = "nxp,sc16is752";
reg = <0x54>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};
* spi as bus
Required properties:
@ -59,6 +82,9 @@ Optional properties:
1 = active low.
- irda-mode-ports: An array that lists the indices of the port that
should operate in IrDA mode.
- nxp,modem-control-line-ports: An array that lists the indices of the port that
should have shared GPIO lines configured as
modem control lines.
Example:
sc16is750: sc16is750@0 {
@ -70,3 +96,23 @@ Example:
gpio-controller;
#gpio-cells = <2>;
};
sc16is752: sc16is752@1 {
compatible = "nxp,sc16is752";
reg = <1>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
gpio-controller; /* Port 0 as GPIOs */
#gpio-cells = <2>;
};
sc16is752: sc16is752@2 {
compatible = "nxp,sc16is752";
reg = <2>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
};

105
Documentation/filesystems/fscrypt.rst
View File

@ -261,9 +261,9 @@ DIRECT_KEY policies
The Adiantum encryption mode (see `Encryption modes and usage`_) is
suitable for both contents and filenames encryption, and it accepts
long IVs --- long enough to hold both an 8-byte logical block number
and a 16-byte per-file nonce. Also, the overhead of each Adiantum key
is greater than that of an AES-256-XTS key.
long IVs --- long enough to hold both an 8-byte data unit index and a
16-byte per-file nonce. Also, the overhead of each Adiantum key is
greater than that of an AES-256-XTS key.
Therefore, to improve performance and save memory, for Adiantum a
"direct key" configuration is supported. When the user has enabled
@ -300,8 +300,8 @@ IV_INO_LBLK_32 policies
IV_INO_LBLK_32 policies work like IV_INO_LBLK_64, except that for
IV_INO_LBLK_32, the inode number is hashed with SipHash-2-4 (where the
SipHash key is derived from the master key) and added to the file
logical block number mod 2^32 to produce a 32-bit IV.
SipHash key is derived from the master key) and added to the file data
unit index mod 2^32 to produce a 32-bit IV.
This format is optimized for use with inline encryption hardware
compliant with the eMMC v5.2 standard, which supports only 32 IV bits
@ -384,31 +384,62 @@ with ciphertext expansion.
Contents encryption
-------------------
For file contents, each filesystem block is encrypted independently.
Starting from Linux kernel 5.5, encryption of filesystems with block
size less than system's page size is supported.
For contents encryption, each file's contents is divided into "data
units". Each data unit is encrypted independently. The IV for each
data unit incorporates the zero-based index of the data unit within
the file. This ensures that each data unit within a file is encrypted
differently, which is essential to prevent leaking information.
Each block's IV is set to the logical block number within the file as
a little endian number, except that:
Note: the encryption depending on the offset into the file means that
operations like "collapse range" and "insert range" that rearrange the
extent mapping of files are not supported on encrypted files.
- With CBC mode encryption, ESSIV is also used. Specifically, each IV
is encrypted with AES-256 where the AES-256 key is the SHA-256 hash
of the file's data encryption key.
There are two cases for the sizes of the data units:
- With `DIRECT_KEY policies`_, the file's nonce is appended to the IV.
Currently this is only allowed with the Adiantum encryption mode.
* Fixed-size data units. This is how all filesystems other than UBIFS
work. A file's data units are all the same size; the last data unit
is zero-padded if needed. By default, the data unit size is equal
to the filesystem block size. On some filesystems, users can select
a sub-block data unit size via the ``log2_data_unit_size`` field of
the encryption policy; see `FS_IOC_SET_ENCRYPTION_POLICY`_.
- With `IV_INO_LBLK_64 policies`_, the logical block number is limited
to 32 bits and is placed in bits 0-31 of the IV. The inode number
(which is also limited to 32 bits) is placed in bits 32-63.
* Variable-size data units. This is what UBIFS does. Each "UBIFS
data node" is treated as a crypto data unit. Each contains variable
length, possibly compressed data, zero-padded to the next 16-byte
boundary. Users cannot select a sub-block data unit size on UBIFS.
- With `IV_INO_LBLK_32 policies`_, the logical block number is limited
to 32 bits and is placed in bits 0-31 of the IV. The inode number
is then hashed and added mod 2^32.
In the case of compression + encryption, the compressed data is
encrypted. UBIFS compression works as described above. f2fs
compression works a bit differently; it compresses a number of
filesystem blocks into a smaller number of filesystem blocks.
Therefore a f2fs-compressed file still uses fixed-size data units, and
it is encrypted in a similar way to a file containing holes.
Note that because file logical block numbers are included in the IVs,
filesystems must enforce that blocks are never shifted around within
encrypted files, e.g. via "collapse range" or "insert range".
As mentioned in `Key hierarchy`_, the default encryption setting uses
per-file keys. In this case, the IV for each data unit is simply the
index of the data unit in the file. However, users can select an
encryption setting that does not use per-file keys. For these, some
kind of file identifier is incorporated into the IVs as follows:
- With `DIRECT_KEY policies`_, the data unit index is placed in bits
0-63 of the IV, and the file's nonce is placed in bits 64-191.
- With `IV_INO_LBLK_64 policies`_, the data unit index is placed in
bits 0-31 of the IV, and the file's inode number is placed in bits
32-63. This setting is only allowed when data unit indices and
inode numbers fit in 32 bits.
- With `IV_INO_LBLK_32 policies`_, the file's inode number is hashed
and added to the data unit index. The resulting value is truncated
to 32 bits and placed in bits 0-31 of the IV. This setting is only
allowed when data unit indices and inode numbers fit in 32 bits.
The byte order of the IV is always little endian.
If the user selects FSCRYPT_MODE_AES_128_CBC for the contents mode, an
ESSIV layer is automatically included. In this case, before the IV is
passed to AES-128-CBC, it is encrypted with AES-256 where the AES-256
key is the SHA-256 hash of the file's contents encryption key.
Filenames encryption
--------------------
@ -477,7 +508,8 @@ follows::
__u8 contents_encryption_mode;
__u8 filenames_encryption_mode;
__u8 flags;
__u8 __reserved[4];
__u8 log2_data_unit_size;
__u8 __reserved[3];
__u8 master_key_identifier[FSCRYPT_KEY_IDENTIFIER_SIZE];
};
@ -512,6 +544,29 @@ This structure must be initialized as follows:
The DIRECT_KEY, IV_INO_LBLK_64, and IV_INO_LBLK_32 flags are
mutually exclusive.
- ``log2_data_unit_size`` is the log2 of the data unit size in bytes,
or 0 to select the default data unit size. The data unit size is
the granularity of file contents encryption. For example, setting
``log2_data_unit_size`` to 12 causes file contents be passed to the
underlying encryption algorithm (such as AES-256-XTS) in 4096-byte
data units, each with its own IV.
Not all filesystems support setting ``log2_data_unit_size``. ext4
and f2fs support it since Linux v6.7. On filesystems that support
it, the supported nonzero values are 9 through the log2 of the
filesystem block size, inclusively. The default value of 0 selects
the filesystem block size.
The main use case for ``log2_data_unit_size`` is for selecting a
data unit size smaller than the filesystem block size for
compatibility with inline encryption hardware that only supports
smaller data unit sizes. ``/sys/block/$disk/queue/crypto/`` may be
useful for checking which data unit sizes are supported by a
particular system's inline encryption hardware.
Leave this field zeroed unless you are certain you need it. Using
an unnecessarily small data unit size reduces performance.
- For v2 encryption policies, ``__reserved`` must be zeroed.
- For v1 encryption policies, ``master_key_descriptor`` specifies how

4
Documentation/scsi/scsi_mid_low_api.rst
View File

@ -1190,11 +1190,11 @@ Members of interest:
- pointer to scsi_device object that this command is
associated with.
resid
- an LLD should set this signed integer to the requested
- an LLD should set this unsigned integer to the requested
transfer length (i.e. 'request_bufflen') less the number
of bytes that are actually transferred. 'resid' is
preset to 0 so an LLD can ignore it if it cannot detect
underruns (overruns should be rare). If possible an LLD
underruns (overruns should not be reported). An LLD
should set 'resid' prior to invoking 'done'. The most
interesting case is data transfers from a SCSI target
device (e.g. READs) that underrun.

2
MAINTAINERS
View File

@ -6034,7 +6034,7 @@ S: Supported
F: Documentation/networking/devlink
F: include/net/devlink.h
F: include/uapi/linux/devlink.h
F: net/core/devlink.c
F: net/devlink/
DH ELECTRONICS IMX6 DHCOM BOARD SUPPORT
M: Christoph Niedermaier <cniedermaier@dh-electronics.com>

8
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 43
SUBLEVEL = 57
EXTRAVERSION =
NAME = Curry Ramen
@ -1356,7 +1356,7 @@ prepare0: archprepare
# All the preparing..
prepare: prepare0
ifdef CONFIG_RUST
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
$(Q)$(MAKE) $(build)=rust
endif
@ -1858,7 +1858,7 @@ $(DOC_TARGETS):
# "Is Rust available?" target
PHONY += rustavailable
rustavailable:
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v && echo "Rust is available!"
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh && echo "Rust is available!"
# Documentation target
#
@ -1982,7 +1982,9 @@ quiet_cmd_depmod = DEPMOD $(MODLIB)
modules_install:
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst
ifndef modules_sign_only
$(call cmd,depmod)
endif
else # CONFIG_MODULES

1557
android/abi_gki_aarch64.stg
View File

File diff suppressed because it is too large Load Diff

3
android/abi_gki_aarch64_db845c
View File

@ -197,6 +197,8 @@
dma_async_device_register
dma_async_tx_descriptor_init
dma_buf_export
dma_buf_map_attachment_unlocked
dma_buf_unmap_attachment_unlocked
dma_fence_context_alloc
dma_fence_init
dma_fence_release
@ -523,6 +525,7 @@
param_ops_uint
pci_clear_master
pci_disable_device
pcie_capability_clear_and_set_word
pcie_capability_read_word
pcie_capability_write_word
pci_enable_device

683
android/abi_gki_aarch64_exynosauto
View File

File diff suppressed because it is too large Load Diff

37
android/abi_gki_aarch64_mtk
View File

@ -454,6 +454,7 @@
devlink_unregister
dev_load
devm_add_action
devm_alloc_etherdev_mqs
__devm_alloc_percpu
devm_backlight_device_register
devm_bitmap_zalloc
@ -503,6 +504,7 @@
devm_led_classdev_register_ext
devm_led_classdev_unregister
devm_mbox_controller_register
devm_mdiobus_alloc_size
devm_memremap
devm_mfd_add_devices
devm_nvmem_cell_get
@ -877,6 +879,7 @@
dst_cache_set_ip6
dst_release
dump_stack
efi
em_cpu_get
em_dev_register_perf_domain
enable_irq
@ -888,6 +891,7 @@
eth_header_parse
eth_mac_addr
eth_platform_get_mac_address
eth_prepare_mac_addr_change
ethtool_convert_legacy_u32_to_link_mode
ethtool_convert_link_mode_to_legacy_u32
__ethtool_get_link_ksettings
@ -1689,6 +1693,7 @@
__of_get_address
of_get_child_by_name
of_get_cpu_node
of_get_mac_address
of_get_named_gpio_flags
of_get_next_available_child
of_get_next_child
@ -1717,6 +1722,7 @@
of_pci_get_max_link_speed
of_phandle_iterator_init
of_phandle_iterator_next
of_phy_get_and_connect
of_phy_simple_xlate
of_platform_depopulate
of_platform_device_create
@ -1784,9 +1790,14 @@
pci_dev_put
pci_disable_ats
pci_disable_device
pci_disable_msi
pci_disable_msix
pcie_capability_clear_and_set_word
pcie_capability_read_word
pci_enable_ats
pci_enable_device_mem
pci_enable_msi
pci_enable_msix_range
pci_find_ext_capability
pci_free_irq
pci_free_irq_vectors
@ -1806,14 +1817,19 @@
pci_msi_mask_irq
pci_msi_unmask_irq
pci_pio_to_address
pci_prepare_to_sleep
pci_read_config_dword
pci_read_config_word
__pci_register_driver
pci_release_selected_regions
pci_remove_root_bus
pci_request_irq
pci_request_selected_regions
pci_restore_state
pci_save_state
pci_select_bars
pci_set_master
pci_set_power_state
pci_stop_root_bus
pci_store_saved_state
pci_unlock_rescan_remove
@ -1839,14 +1855,21 @@
pfn_is_map_memory
phy_attached_info
phy_connect
phy_connect_direct
phy_disconnect
phy_do_ioctl_running
phy_ethtool_get_eee
phy_ethtool_get_link_ksettings
phy_ethtool_get_wol
phy_ethtool_nway_reset
phy_ethtool_set_eee
phy_ethtool_set_link_ksettings
phy_ethtool_set_wol
phy_exit
phy_find_first
phy_get
phy_init
phy_init_eee
phylink_connect_phy
phylink_create
phylink_destroy
@ -1858,13 +1881,17 @@
phylink_start
phylink_stop
phylink_suspend
phy_mii_ioctl
phy_power_off
phy_power_on
phy_print_status
phy_put
phy_remove_link_mode
phy_set_mode_ext
phy_start
phy_start_aneg
phy_stop
phy_support_asym_pause
phy_suspend
pick_migrate_task
pid_task
@ -1984,6 +2011,12 @@
pstore_register
pstore_type_to_name
pstore_unregister
ptp_clock_event
ptp_clock_index
ptp_clock_register
ptp_clock_unregister
ptp_find_pin
ptp_schedule_worker
put_cmsg
__put_cred
put_device
@ -2694,10 +2727,10 @@
__traceiter_android_vh_iommu_iovad_alloc_iova
__traceiter_android_vh_iommu_iovad_free_iova
__traceiter_android_vh_is_fpsimd_save
__traceiter_android_vh_mmc_update_mmc_queue
__traceiter_android_vh_mm_alloc_pages_direct_reclaim_enter
__traceiter_android_vh_mm_alloc_pages_direct_reclaim_exit
__traceiter_android_vh_mm_alloc_pages_may_oom_exit
__traceiter_android_vh_mmc_update_mmc_queue
__traceiter_android_vh_rwsem_init
__traceiter_android_vh_rwsem_wake
__traceiter_android_vh_rwsem_write_finished
@ -2802,10 +2835,10 @@
__tracepoint_android_vh_iommu_iovad_alloc_iova
__tracepoint_android_vh_iommu_iovad_free_iova
__tracepoint_android_vh_is_fpsimd_save
__tracepoint_android_vh_mmc_update_mmc_queue
__tracepoint_android_vh_mm_alloc_pages_direct_reclaim_enter
__tracepoint_android_vh_mm_alloc_pages_direct_reclaim_exit
__tracepoint_android_vh_mm_alloc_pages_may_oom_exit
__tracepoint_android_vh_mmc_update_mmc_queue
__tracepoint_android_vh_rwsem_init
__tracepoint_android_vh_rwsem_wake
__tracepoint_android_vh_rwsem_write_finished

6
android/abi_gki_aarch64_oplus
View File

@ -92,6 +92,8 @@
snd_soc_find_dai
spi_bus_type
stack_trace_save_tsk
static_key_enable
static_key_disable
stpcpy
task_rq_lock
tcf_action_exec
@ -162,6 +164,7 @@
__traceiter_android_vh_rwsem_wake_finish
__traceiter_android_vh_adjust_alloc_flags
__traceiter_android_vh_adjust_kvmalloc_flags
__traceiter_android_vh_alloc_pages_slowpath
__traceiter_android_vh_sched_stat_runtime_rt
__traceiter_android_vh_shrink_node_memcgs
__traceiter_android_vh_sync_txn_recvd
@ -172,6 +175,7 @@
__traceiter_block_rq_issue
__traceiter_block_rq_merge
__traceiter_block_rq_requeue
__traceiter_mm_vmscan_kswapd_wake
__traceiter_net_dev_queue
__traceiter_net_dev_xmit
__traceiter_netif_receive_skb
@ -260,6 +264,7 @@
__tracepoint_android_vh_rwsem_wake_finish
__tracepoint_android_vh_adjust_alloc_flags
__tracepoint_android_vh_adjust_kvmalloc_flags
__tracepoint_android_vh_alloc_pages_slowpath
__tracepoint_android_vh_sched_stat_runtime_rt
__tracepoint_android_vh_shrink_node_memcgs
__tracepoint_android_vh_sync_txn_recvd
@ -280,6 +285,7 @@
__tracepoint_block_rq_issue
__tracepoint_block_rq_merge
__tracepoint_block_rq_requeue
__tracepoint_mm_vmscan_kswapd_wake
__tracepoint_net_dev_queue
__tracepoint_net_dev_xmit
__tracepoint_netif_receive_skb

17
android/abi_gki_aarch64_pixel
View File

@ -26,6 +26,7 @@
amba_driver_unregister
android_rvh_probe_register
anon_inode_getfd
anon_inode_getfile
arc4_crypt
arc4_setkey
__arch_clear_user
@ -409,6 +410,7 @@
devm_device_add_groups
devm_device_remove_group
__devm_drm_dev_alloc
devm_drm_of_get_bridge
devm_drm_panel_bridge_add_typed
devm_extcon_dev_allocate
devm_extcon_dev_register
@ -538,6 +540,7 @@
dma_buf_vunmap
dmaengine_unmap_put
dma_fence_add_callback
dma_fence_array_create
dma_fence_context_alloc
dma_fence_default_wait
dma_fence_get_status
@ -725,6 +728,7 @@
drm_helper_mode_fill_fb_struct
drm_helper_probe_single_connector_modes
drm_ioctl
drm_kms_helper_connector_hotplug_event
drm_kms_helper_hotplug_event
drm_kms_helper_poll_fini
drm_kms_helper_poll_init
@ -1405,6 +1409,7 @@
of_find_i2c_adapter_by_node
of_find_i2c_device_by_node
of_find_matching_node_and_match
of_find_mipi_dsi_host_by_node
of_find_node_by_name
of_find_node_by_phandle
of_find_node_by_type
@ -1419,11 +1424,13 @@
of_get_next_available_child
of_get_next_child
of_get_next_parent
of_get_parent
of_get_property
of_get_regulator_init_data
of_graph_get_next_endpoint
of_graph_get_port_parent
of_graph_get_remote_endpoint
of_graph_get_remote_node
of_graph_is_present
of_graph_parse_endpoint
of_iomap
@ -2182,12 +2189,15 @@
__traceiter_android_rvh_setscheduler
__traceiter_android_rvh_set_task_cpu
__traceiter_android_rvh_set_user_nice
__traceiter_android_rvh_set_user_nice_locked
__traceiter_android_rvh_typec_tcpci_get_vbus
__traceiter_android_rvh_uclamp_eff_get
__traceiter_android_rvh_update_blocked_fair
__traceiter_android_rvh_update_load_avg
__traceiter_android_rvh_update_load_sum
__traceiter_android_rvh_update_misfit_status
__traceiter_android_rvh_update_rt_rq_load_avg
__traceiter_android_rvh_util_fits_cpu
__traceiter_android_vh_arch_set_freq_scale
__traceiter_android_vh_audio_usb_offload_connect
__traceiter_android_vh_binder_restore_priority
@ -2252,6 +2262,8 @@
__traceiter_sched_util_est_cfs_tp
__traceiter_sched_util_est_se_tp
__traceiter_sched_wakeup
__traceiter_softirq_entry
__traceiter_softirq_exit
__traceiter_suspend_resume
__traceiter_workqueue_execute_end
__traceiter_workqueue_execute_start
@ -2284,12 +2296,15 @@
__tracepoint_android_rvh_setscheduler
__tracepoint_android_rvh_set_task_cpu
__tracepoint_android_rvh_set_user_nice
__tracepoint_android_rvh_set_user_nice_locked
__tracepoint_android_rvh_typec_tcpci_get_vbus
__tracepoint_android_rvh_uclamp_eff_get
__tracepoint_android_rvh_update_blocked_fair
__tracepoint_android_rvh_update_load_avg
__tracepoint_android_rvh_update_load_sum
__tracepoint_android_rvh_update_misfit_status
__tracepoint_android_rvh_update_rt_rq_load_avg
__tracepoint_android_rvh_util_fits_cpu
__tracepoint_android_vh_arch_set_freq_scale
__tracepoint_android_vh_audio_usb_offload_connect
__tracepoint_android_vh_binder_restore_priority
@ -2356,6 +2371,8 @@
__tracepoint_sched_util_est_cfs_tp
__tracepoint_sched_util_est_se_tp
__tracepoint_sched_wakeup
__tracepoint_softirq_entry
__tracepoint_softirq_exit
__tracepoint_suspend_resume
__tracepoint_workqueue_execute_end
__tracepoint_workqueue_execute_start

2
android/abi_gki_aarch64_qcom
View File

@ -3293,7 +3293,9 @@
topology_update_thermal_pressure
_totalram_pages
_trace_android_vh_record_pcpu_rwsem_starttime
trace_array_get_by_name
trace_array_put
trace_array_set_clr_event
__trace_bprintk
trace_clock_local
trace_event_buffer_commit

4
android/abi_gki_aarch64_unisoc
View File

@ -715,10 +715,12 @@
__traceiter_android_vh_cpu_idle_exit
__traceiter_android_vh_enable_thermal_power_throttle
__traceiter_android_vh_get_thermal_zone_device
__traceiter_android_vh_kmalloc_large_alloced
__traceiter_android_vh_modify_thermal_request_freq
__traceiter_android_vh_modify_thermal_target_freq
__traceiter_android_vh_regmap_update
__traceiter_android_vh_scheduler_tick
__traceiter_android_vh_slab_folio_alloced
__traceiter_android_vh_thermal_power_cap
__traceiter_android_vh_thermal_register
__traceiter_android_vh_thermal_unregister
@ -794,10 +796,12 @@
__tracepoint_android_vh_cpu_idle_exit
__tracepoint_android_vh_enable_thermal_power_throttle
__tracepoint_android_vh_get_thermal_zone_device
__tracepoint_android_vh_kmalloc_large_alloced
__tracepoint_android_vh_modify_thermal_request_freq
__tracepoint_android_vh_modify_thermal_target_freq
__tracepoint_android_vh_regmap_update
__tracepoint_android_vh_scheduler_tick
__tracepoint_android_vh_slab_folio_alloced
__tracepoint_android_vh_thermal_power_cap
__tracepoint_android_vh_thermal_register
__tracepoint_android_vh_thermal_unregister

3
arch/Kconfig
View File

@ -285,6 +285,9 @@ config ARCH_HAS_DMA_SET_UNCACHED
config ARCH_HAS_DMA_CLEAR_UNCACHED
bool
config ARCH_HAS_CPU_FINALIZE_INIT
bool
# Select if arch init_task must go in the __init_task_data section
config ARCH_TASK_STRUCT_ON_STACK
bool

20
arch/alpha/include/asm/bugs.h
View File

@ -1,20 +0,0 @@
/*
* include/asm-alpha/bugs.h
*
* Copyright (C) 1994 Linus Torvalds
*/
/*
* This is included by init/main.c to check for architecture-dependent bugs.
*
* Needs:
* void check_bugs(void);
*/
/*
* I don't know of any alpha bugs yet.. Nice chip
*/
static void check_bugs(void)
{
}

3
arch/alpha/kernel/setup.c
View File

@ -385,8 +385,7 @@ setup_memory(void *kernel_end)
#endif /* CONFIG_BLK_DEV_INITRD */
}
int __init
page_is_ram(unsigned long pfn)
int page_is_ram(unsigned long pfn)
{
struct memclust_struct * cluster;
struct memdesc_struct * memdesc;

6
arch/arc/include/asm/atomic-llsc.h
View File

@ -18,7 +18,7 @@ static inline void arch_atomic_##op(int i, atomic_t *v) \
: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
} \
#define ATOMIC_OP_RETURN(op, asm_op) \
@ -34,7 +34,7 @@ static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \
: [val] "=&r" (val) \
: [ctr] "r" (&v->counter), \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
\
return val; \
}
@ -56,7 +56,7 @@ static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \
[orig] "=&r" (orig) \
: [ctr] "r" (&v->counter), \
[i] "ir" (i) \
: "cc"); \
: "cc", "memory"); \
\
return orig; \
}

6
arch/arc/include/asm/atomic64-arcv2.h
View File

@ -60,7 +60,7 @@ static inline void arch_atomic64_##op(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); \
: "cc", "memory"); \
} \
#define ATOMIC64_OP_RETURN(op, op1, op2) \
@ -77,7 +77,7 @@ static inline s64 arch_atomic64_##op##_return_relaxed(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: [val] "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); /* memory clobber comes from smp_mb() */ \
: "cc", "memory"); \
\
return val; \
}
@ -99,7 +99,7 @@ static inline s64 arch_atomic64_fetch_##op##_relaxed(s64 a, atomic64_t *v) \
" bnz 1b \n" \
: "=&r"(orig), "=&r"(val) \
: "r"(&v->counter), "ir"(a) \
: "cc"); /* memory clobber comes from smp_mb() */ \
: "cc", "memory"); \
\
return orig; \
}

1
arch/arm/Kconfig
View File

@ -5,6 +5,7 @@ config ARM
select ARCH_32BIT_OFF_T
select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE if HAVE_KRETPROBES && FRAME_POINTER && !ARM_UNWIND
select ARCH_HAS_BINFMT_FLAT
select ARCH_HAS_CPU_FINALIZE_INIT if MMU
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_HAS_DEBUG_VIRTUAL if MMU
select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE

8
arch/arm/boot/dts/Makefile
View File

@ -331,6 +331,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-iconnect.dtb \
kirkwood-iomega_ix2_200.dtb \
kirkwood-is2.dtb \
kirkwood-km_fixedeth.dtb \
kirkwood-km_kirkwood.dtb \
kirkwood-l-50.dtb \
kirkwood-laplug.dtb \
@ -861,7 +862,10 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
am3517-craneboard.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
logicpd-torpedo-35xx-devkit.dtb \
logicpd-torpedo-37xx-devkit.dtb \
logicpd-torpedo-37xx-devkit-28.dtb \
logicpd-som-lv-35xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
@ -1527,6 +1531,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-388-helios4.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_39X) += \
armada-390-db.dtb \
armada-395-gp.dtb \
armada-398-db.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
@ -1556,6 +1562,7 @@ dtb-$(CONFIG_MACH_DOVE) += \
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt2701-evb.dtb \
mt6580-evbp1.dtb \
mt6582-prestigio-pmt5008-3g.dtb \
mt6589-aquaris5.dtb \
mt6589-fairphone-fp1.dtb \
mt6592-evb.dtb \
@ -1608,6 +1615,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
aspeed-bmc-inspur-on5263m5.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \

3
arch/arm/boot/dts/am335x-guardian.dts
View File

@ -103,8 +103,9 @@ panel-info {
};
guardian_beeper: dmtimer-pwm@7 {
guardian_beeper: pwm-7 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&guardian_beeper_pins>;

2
arch/arm/boot/dts/am3517-evm.dts
View File

@ -150,7 +150,7 @@ bl: backlight {
enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
};
pwm11: dmtimer-pwm@11 {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

3
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
View File

@ -19,7 +19,8 @@ chosen {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
};
gpio-keys {

13
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
View File

@ -46,3 +46,16 @@ button-restart {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

13
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
View File

@ -83,3 +83,16 @@ pcie0_chipcommon: chipcommon@0 {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

4
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View File

@ -135,8 +135,8 @@ port@4 {
label = "lan4";
};
port@5 {
reg = <5>;
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac0>;
};

5
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -127,6 +127,9 @@ uart0: serial@300 {
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
usb2: usb2@4000 {
@ -156,8 +159,6 @@ ehci_port2: port@2 {
};
ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

6
arch/arm/boot/dts/bcm947189acdbmr.dts
View File

@ -60,9 +60,9 @@ button-wps {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 21 0>;
gpio-miso = <&chipcommon 22 0>;
gpio-mosi = <&chipcommon 23 0>;
sck-gpios = <&chipcommon 21 0>;
miso-gpios = <&chipcommon 22 0>;
mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/exynos4210-i9100.dts
View File

@ -201,8 +201,8 @@ lcd@0 {
power-on-delay = <10>;
reset-delay = <10>;
panel-width-mm = <90>;
panel-height-mm = <154>;
panel-width-mm = <56>;
panel-height-mm = <93>;
display-timings {
timing {

2
arch/arm/boot/dts/imx50-kobo-aura.dts
View File

@ -26,7 +26,7 @@ gpio-leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
on {
led-on {
label = "kobo_aura:orange:on";
gpios = <&gpio6 24 GPIO_ACTIVE_LOW>;
panic-indicator;

10
arch/arm/boot/dts/imx53-cx9020.dts
View File

@ -86,27 +86,27 @@ tfp410_out: endpoint {
leds {
compatible = "gpio-leds";
pwr-r {
led-pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
led-pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
led-pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
led-sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
led-sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -52,13 +52,13 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&led_pin_gpio>;
user1 {
led-user1 {
label = "user1";
gpios = <&gpio2 8 0>;
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "user2";
gpios = <&gpio2 9 0>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx53-m53menlo.dts
View File

@ -34,19 +34,19 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "TestLed601";
gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
user2 {
led-user2 {
label = "TestLed602";
gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
eth {
led-eth {
label = "EthLedYe";
gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "netdev";

2
arch/arm/boot/dts/imx53-tx53.dtsi
View File

@ -94,7 +94,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stk5led>;
user {
led-user {
label = "Heartbeat";
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx53-usbarmory.dts
View File

@ -67,7 +67,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "LED";
gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";

6
arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi
View File

@ -211,17 +211,17 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_q7_gpio1 &pinctrl_q7_gpio3 &pinctrl_q7_gpio5>;
alarm1 {
led-alarm1 {
label = "alarm:red";
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
};
alarm2 {
led-alarm2 {
label = "alarm:yellow";
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
};
alarm3 {
led-alarm3 {
label = "alarm:blue";
gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx6dl-prtrvt.dts
View File

@ -124,6 +124,10 @@ &usbh1 {
status = "disabled";
};
&usbotg {
disable-over-current;
};
&vpu {
status = "disabled";
};

4
arch/arm/boot/dts/imx6dl-riotboard.dts
View File

@ -25,14 +25,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

6
arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
View File

@ -274,7 +274,7 @@ leds: led-controller@30 {
#address-cells = <1>;
#size-cells = <0>;
chan@0 {
led@0 {
chan-name = "R";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -282,7 +282,7 @@ chan@0 {
color = <LED_COLOR_ID_RED>;
};
chan@1 {
led@1 {
chan-name = "G";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
@ -290,7 +290,7 @@ chan@1 {
color = <LED_COLOR_ID_GREEN>;
};
chan@2 {
led@2 {
chan-name = "B";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;

6
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -34,20 +34,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6q-h100.dts
View File

@ -76,19 +76,19 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_h100_leds>;
led0: power {
led0: led-power {
label = "power";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
led1: stream {
led1: led-stream {
label = "stream";
gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led2: rec {
led2: led-rec {
label = "rec";
gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
default-state = "off";

4
arch/arm/boot/dts/imx6q-kp.dtsi
View File

@ -66,14 +66,14 @@ lcd_panel_in: endpoint {
leds {
compatible = "gpio-leds";
green {
led-green {
label = "led1";
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
red {
led-red {
label = "led0";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";

4
arch/arm/boot/dts/imx6q-marsboard.dts
View File

@ -73,14 +73,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-user1 {
label = "imx6:green:user1";
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
user2 {
led-user2 {
label = "imx6:green:user2";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6q-tbs2910.dts
View File

@ -49,7 +49,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
blue {
led-blue {
label = "blue_status_led";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-emcon.dtsi
View File

@ -46,14 +46,14 @@ som_leds: leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_som_leds>;
green {
led-green {
label = "som:green";
gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
red {
led-red {
label = "som:red";
gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
default-state = "keep";

4
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -80,20 +80,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
View File

@ -80,20 +80,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View File

@ -81,20 +81,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw551x.dtsi
View File

@ -115,7 +115,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
default-state = "on";

6
arch/arm/boot/dts/imx6qdl-gw552x.dtsi
View File

@ -72,20 +72,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw553x.dtsi
View File

@ -113,14 +113,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw560x.dtsi
View File

@ -139,20 +139,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-gw5903.dtsi
View File

@ -123,7 +123,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View File

@ -120,20 +120,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5907.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5910.dtsi
View File

@ -74,20 +74,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

6
arch/arm/boot/dts/imx6qdl-gw5912.dtsi
View File

@ -72,20 +72,20 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
led2: led-user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-gw5913.dtsi
View File

@ -71,14 +71,14 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
led0: led-user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
led1: led-user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";

10
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View File

@ -85,31 +85,31 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
j14-pin1 {
led-j14-pin1 {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pin3 {
led-j14-pin3 {
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j14-pins8-9 {
led-j14-pins8-9 {
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin2 {
led-j46-pin2 {
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";
};
j46-pin3 {
led-j46-pin3 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
retain-state-suspended;
default-state = "off";

4
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View File

@ -181,13 +181,13 @@ i2c3mux@1 {
leds {
compatible = "gpio-leds";
speaker-enable {
led-speaker-enable {
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "off";
};
ttymxc4-rs232 {
led-ttymxc4-rs232 {
gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
default-state = "on";

8
arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi
View File

@ -25,17 +25,17 @@ gpio_leds: leds {
pinctrl-0 = <&pinctrl_gpioleds>;
status = "disabled";
red {
led-red {
label = "phyboard-mira:red";
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
};
green {
led-green {
label = "phyboard-mira:green";
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
};
blue {
led-blue {
label = "phyboard-mira:blue";
gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
@ -182,7 +182,7 @@ i2c_rtc: rtc@68 {
pinctrl-0 = <&pinctrl_rtc_int>;
reg = <0x68>;
interrupt-parent = <&gpio7>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
status = "disabled";
};
};

4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -47,12 +47,12 @@ gpio_leds: leds {
pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
led_green: green {
led_green: led-green {
label = "phyflex:green";
gpios = <&gpio1 30 0>;
};
led_red: red {
led_red: led-red {
label = "phyflex:red";
gpios = <&gpio2 31 0>;
};

11
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
View File

@ -69,6 +69,7 @@ &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -78,10 +79,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6qdl-rex.dtsi
View File

@ -55,7 +55,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
led0: usr {
led0: led-usr {
label = "usr";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View File

@ -21,7 +21,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
user {
led-user {
label = "debug";
gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
};

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -130,7 +130,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
red {
led-red {
gpios = <&gpio1 2 0>;
default-state = "on";
};

4
arch/arm/boot/dts/imx6qdl-ts7970.dtsi
View File

@ -73,13 +73,13 @@ blue-led {
default-state = "off";
};
en-usb-5v {
en-usb-5v-led {
label = "en-usb-5v";
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
sel_dc_usb {
sel-dc-usb-led {
label = "sel_dc_usb";
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
default-state = "off";

2
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View File

@ -92,7 +92,7 @@ power {
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_user_led>;

2
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -33,7 +33,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll-evk.dts
View File

@ -37,7 +37,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

2
arch/arm/boot/dts/imx6sll.dtsi
View File

@ -552,7 +552,7 @@ usbphy2: usb-phy@20ca000 {
reg = <0x020ca000 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USBPHY2>;
phy-reg_3p0-supply = <&reg_3p0>;
phy-3p0-supply = <&reg_3p0>;
fsl,anatop = <&anatop>;
};

2
arch/arm/boot/dts/imx6sx-sabreauto.dts
View File

@ -20,7 +20,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
led-user {
label = "debug";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

4
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
View File

@ -15,14 +15,14 @@ chosen {
leds {
compatible = "gpio-leds";
red {
led-red {
label = "udoo-neo:red:mmc";
gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
orange {
led-orange {
label = "udoo-neo:orange:user";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
default-state = "keep";

6
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -981,6 +981,8 @@ usdhc1: mmc@2190000 {
<&clks IMX6SX_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -993,6 +995,8 @@ usdhc2: mmc@2194000 {
<&clks IMX6SX_CLK_USDHC2>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
@ -1005,6 +1009,8 @@ usdhc3: mmc@2198000 {
<&clks IMX6SX_CLK_USDHC3>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};

2
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
View File

@ -30,7 +30,7 @@ gpio_leds_som: leds {
pinctrl-0 = <&pinctrl_gpioleds_som>;
compatible = "gpio-leds";
phycore-green {
led-phycore-green {
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};

2
arch/arm/boot/dts/imx6ul-tx6ul.dtsi
View File

@ -131,7 +131,7 @@ ds1339: rtc@68 {
leds {
compatible = "gpio-leds";
user_led: user {
user_led: led-user {
label = "Heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;

6
arch/arm/boot/dts/imx7s.dtsi
View File

@ -1184,6 +1184,8 @@ usdhc1: mmc@30b40000 {
<&clks IMX7D_USDHC1_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1196,6 +1198,8 @@ usdhc2: mmc@30b50000 {
<&clks IMX7D_USDHC2_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1208,6 +1212,8 @@ usdhc3: mmc@30b60000 {
<&clks IMX7D_USDHC3_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};

2
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
View File

@ -59,7 +59,7 @@ led2 {
};
};
pwm10: dmtimer-pwm {
pwm10: pwm-10 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

48
arch/arm/boot/dts/motorola-mapphone-common.dtsi
View File

@ -133,7 +133,7 @@ soundcard {
dais = <&mcbsp2_port>, <&mcbsp3_port>;
};
pwm8: dmtimer-pwm-8 {
pwm8: pwm-8 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_direction_pin>;
@ -143,7 +143,7 @@ pwm8: dmtimer-pwm-8 {
ti,clock-source = <0x01>;
};
pwm9: dmtimer-pwm-9 {
pwm9: pwm-9 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_enable_pin>;
@ -352,13 +352,13 @@ isl29030@44 {
&omap4_pmx_core {
/* hdmi_hpd.gpio_63 */
hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
hdmi_hpd_gpio: hdmi-hpd-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
>;
};
hdq_pins: pinmux_hdq_pins {
hdq_pins: hdq-pins {
pinctrl-single,pins = <
/* 0x4a100120 hdq_sio.hdq_sio aa27 */
OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
@ -366,7 +366,7 @@ OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
};
/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
dss_hdmi_pins: pinmux_dss_hdmi_pins {
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
@ -380,7 +380,7 @@ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
* devices. Off mode value should be tested if we have off mode working
* later on.
*/
mmc3_pins: pinmux_mmc3_pins {
mmc3_pins: mmc3-pins {
pinctrl-single,pins = <
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
@ -406,40 +406,40 @@ OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
};
/* gpmc_ncs0.gpio_50 */
poweroff_gpio: pinmux_poweroff_pins {
poweroff_gpio: poweroff-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
>;
};
/* kpd_row0.gpio_178 */
tmp105_irq: pinmux_tmp105_irq {
tmp105_irq: tmp105-irq-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
usb_gpio_mux_sel1: usb-gpio-mux-sel1-pins {
/* gpio_60 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
>;
};
touchscreen_pins: pinmux_touchscreen_pins {
touchscreen_pins: touchscreen-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
als_proximity_pins: pinmux_als_proximity_pins {
als_proximity_pins: als-proximity-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
usb_mdm6600_pins: usb-mdm6600-pins {
pinctrl-single,pins = <
/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
@ -476,7 +476,7 @@ OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
>;
};
usb_ulpi_pins: pinmux_usb_ulpi_pins {
usb_ulpi_pins: usb-ulpi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
@ -496,7 +496,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
};
/* usb0_otg_dp and usb0_otg_dm */
usb_utmi_pins: pinmux_usb_utmi_pins {
usb_utmi_pins: usb-utmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
@ -521,7 +521,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
* when not used. If needed, we can add rts pin remux later based
* on power measurements.
*/
uart1_pins: pinmux_uart1_pins {
uart1_pins: uart1-pins {
pinctrl-single,pins = <
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
@ -538,7 +538,7 @@ OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
};
/* uart3_tx_irtx and uart3_rx_irrx */
uart3_pins: pinmux_uart3_pins {
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
@ -557,7 +557,7 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
uart4_pins: pinmux_uart4_pins {
uart4_pins: uart4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
@ -566,7 +566,7 @@ OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
mcbsp2_pins: mcbsp2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
@ -575,7 +575,7 @@ OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
>;
};
mcbsp3_pins: pinmux_mcbsp3_pins {
mcbsp3_pins: mcbsp3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
@ -584,13 +584,13 @@ OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
>;
};
vibrator_direction_pin: pinmux_vibrator_direction_pin {
vibrator_direction_pin: vibrator-direction-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1) /* dmtimer8_pwm_evt (gpio_27) */
>;
};
vibrator_enable_pin: pinmux_vibrator_enable_pin {
vibrator_enable_pin: vibrator-enable-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
>;
@ -598,7 +598,7 @@ OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
usb_gpio_mux_sel2: usb-gpio-mux-sel2-pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
@ -614,12 +614,12 @@ &rng_target {
/* Configure pwm clock source for timers 8 & 9 */
&timer8 {
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
&timer9 {
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
/*

6
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
View File

@ -8,9 +8,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

6
arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
View File

@ -12,9 +12,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

12
arch/arm/boot/dts/omap3-cm-t3517.dts
View File

@ -11,12 +11,12 @@ / {
model = "CompuLab CM-T3517";
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";

3
arch/arm/boot/dts/omap3-cpu-thermal.dtsi
View File

@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal {
polling-delay = <1000>; /* milliseconds */
coefficients = <0 20000>;
/* sensor ID */
thermal-sensors = <&bandgap 0>;
thermal-sensors = <&bandgap>;
cpu_trips: trips {
cpu_alert0: cpu_alert {

8
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -147,7 +147,7 @@ backlight: backlight {
pinctrl-0 = <&backlight_pins>;
};
pwm11: dmtimer-pwm {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer11>;
#pwm-cells = <3>;
@ -332,7 +332,7 @@ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
>;
};
};
gps_pins: pinmux_gps_pins {
pinctrl-single,pins = <
@ -869,8 +869,8 @@ &mcbsp4 { /* GSM voice PCM */
};
&hdqw1w {
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
};
/* image signal processor within OMAP3 SoC */

2
arch/arm/boot/dts/omap3-ldp.dts
View File

@ -301,5 +301,5 @@ &usb_otg_hs {
&vaux1 {
/* Needed for ads7846 */
regulator-name = "vcc";
regulator-name = "vcc";
};

40
arch/arm/boot/dts/omap3-n900.dts
View File

@ -156,7 +156,7 @@ battery: n900-battery {
io-channel-names = "temp", "bsi", "vbat";
};
pwm9: dmtimer-pwm {
pwm9: pwm-9 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer9>;
@ -236,27 +236,27 @@ gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <
/* address lines */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
/* data lines, gpmc_d0..d7 not muxable according to TRM */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
/*
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
*/
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
};
i2c1_pins: pinmux_i2c1_pins {
@ -738,12 +738,12 @@ tpa6130a2: tpa6130a2@60 {
si4713: si4713@63 {
compatible = "silabs,si4713";
reg = <0x63>;
reg = <0x63>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
};
bq24150a: bq24150a@6b {

44
arch/arm/boot/dts/omap3-zoom3.dts
View File

@ -23,9 +23,9 @@ memory@80000000 {
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
@ -84,28 +84,28 @@ OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
@ -205,22 +205,22 @@ wlcore: wlcore@2 {
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&uart4 {
status = "disabled";
status = "disabled";
};
&usb_otg_hs {

29
arch/arm/boot/dts/omap4-cpu-thermal.dtsi
View File

@ -12,21 +12,24 @@ cpu_thermal: cpu_thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
/* sensor ID */
thermal-sensors = <&bandgap 0>;
/*
* See 44xx files for single sensor addressing, omap5 and dra7 need
* also sensor ID for addressing.
*/
thermal-sensors = <&bandgap 0>;
cpu_trips: trips {
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_cooling_maps: cooling-maps {
map0 {

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