wcd939x-usbss: Reset surge CPLDO control register and update pwr mode
1. Reset the CPLDO control register in case a negative surge event has occurred. 2. Cache power mode and update at the time of usecase setup. Change-Id: Ib6060715bd92d743591b62f30da6e4cac5fbcb66 Signed-off-by: Sam Rainey <quic_rainey@quicinc.com> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef WCD_USBSS_PRIV_H
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#define WCD_USBSS_PRIV_H
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@ -41,6 +41,7 @@ struct wcd_usbss_ctxt {
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struct kobject *surge_kobject;
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struct task_struct *surge_thread;
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unsigned int surge_timer_period_ms;
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unsigned int cached_audio_pwr_mode;
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};
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extern struct regmap *wcd_usbss_regmap_init(struct device *dev,
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@ -81,7 +81,7 @@ static struct kobj_attribute wcd_usbss_surge_period_attribute =
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* 3. Register 0x06 Bit<0> reads 1 after toggling
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* register WCD_USBSS_PMP_MISC1 Bit<0> from 0 --> 1 --> 0
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*
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* Returns true if all checks fails (indicates OVP and reset needed), false otherwise
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* Returns true if any checks fail (indicates OVP and reset needed), false otherwise
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*/
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static bool wcd_usbss_is_in_reset_state(void)
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{
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@ -90,14 +90,16 @@ static bool wcd_usbss_is_in_reset_state(void)
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/* Check 1: Read WCD_USBSS_CPLDO_CTL2 */
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regmap_read(wcd_usbss_ctxt_->regmap, WCD_USBSS_CPLDO_CTL2, &read_val);
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if (read_val == 0xFF)
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return false;
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if (read_val != 0xFF)
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return true;
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/* Check 2: Read WCD_USBSS_RCO_MISC2 */
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for (i = 0; i < NUM_RCO_MISC2_READ; i++) {
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regmap_read(wcd_usbss_ctxt_->regmap, WCD_USBSS_RCO_MISC2, &read_val);
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if ((read_val & 0x2) == 0)
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return false;
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break;
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if (i == (NUM_RCO_MISC2_READ - 1))
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return true;
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}
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/* Toggle WCD_USBSS_PMP_MISC1 bit<0>: 0 --> 1 --> 0 */
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@ -107,11 +109,11 @@ static bool wcd_usbss_is_in_reset_state(void)
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/* Check 3: Read WCD_USBSS_PMP_MISC2 */
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regmap_read(wcd_usbss_ctxt_->regmap, WCD_USBSS_PMP_MISC2, &read_val);
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if (read_val & 0x1)
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return false;
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if ((read_val & 0x1) == 0)
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return true;
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/* All checks failed, so a reset has occurred, and return true */
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return true;
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/* All checks passed, so a reset has not occurred */
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return false;
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}
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/*
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@ -124,7 +126,11 @@ static int wcd_usbss_reset_routine(void)
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/* Mark the cache as dirty to force a flush */
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regcache_mark_dirty(wcd_usbss_ctxt_->regmap);
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regcache_sync(wcd_usbss_ctxt_->regmap);
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/* Write 0xFF to WCD_USBSS_CPLDO_CTL2 */
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regmap_update_bits(wcd_usbss_ctxt_->regmap, WCD_USBSS_CPLDO_CTL2, 0xFF, 0xFF);
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/* Set RCO_EN: WCD_USBSS_USB_SS_CNTL Bit<3> --> 0x0 --> 0x1 */
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regmap_update_bits(wcd_usbss_ctxt_->regmap, WCD_USBSS_USB_SS_CNTL, 0x8, 0x0);
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regmap_update_bits(wcd_usbss_ctxt_->regmap, WCD_USBSS_USB_SS_CNTL, 0x8, 0x8);
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return wcd_usbss_switch_update(wcd_usbss_ctxt_->cable_type, wcd_usbss_ctxt_->cable_status);
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}
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@ -377,6 +383,7 @@ static int wcd_usbss_switch_update_defaults(struct wcd_usbss_ctxt *priv)
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/* Disable Equalizer */
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regmap_update_bits(priv->regmap, WCD_USBSS_EQUALIZER1,
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WCD_USBSS_EQUALIZER1_EQ_EN_MASK, 0x00);
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regmap_update_bits(priv->regmap, WCD_USBSS_USB_SS_CNTL, 0x07, 0x05); /* Mode5: USB*/
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/* Once plug-out done, restore to MANUAL mode */
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audio_fsm_mode = WCD_USBSS_AUDIO_MANUAL;
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return 0;
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@ -384,8 +391,6 @@ static int wcd_usbss_switch_update_defaults(struct wcd_usbss_ctxt *priv)
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static void wcd_usbss_update_reg_init(struct regmap *regmap)
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{
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/* update Register Power On Reset values (if any) */
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regmap_update_bits(regmap, WCD_USBSS_USB_SS_CNTL, 0x07, 0x02); /*Mode2*/
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if (audio_fsm_mode == WCD_USBSS_AUDIO_FSM)
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regmap_update_bits(regmap, WCD_USBSS_FUNCTION_ENABLE, 0x03,
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0x02); /* AUDIO_FSM mode */
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@ -510,9 +515,15 @@ int wcd_usbss_audio_config(bool enable, enum wcd_usbss_config_type config_type,
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switch (config_type) {
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case WCD_USBSS_CONFIG_TYPE_POWER_MODE:
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/* Configure power mode from RX HPH mixer ctl */
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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/* Configure power mode from RX HPH mixer ctl if AATC cable is connected */
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if (wcd_usbss_ctxt_->cable_status == WCD_USBSS_CABLE_CONNECT &&
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(wcd_usbss_ctxt_->cable_type == WCD_USBSS_AATC ||
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wcd_usbss_ctxt_->cable_type == WCD_USBSS_GND_MIC_SWAP_AATC ||
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wcd_usbss_ctxt_->cable_type == WCD_USBSS_HSJ_CONNECT))
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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WCD_USBSS_USB_SS_CNTL, 0x07, power_mode);
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wcd_usbss_ctxt_->cached_audio_pwr_mode = power_mode;
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break;
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default:
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pr_err("%s Invalid config type %d\n", __func__, config_type);
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@ -555,6 +566,10 @@ int wcd_usbss_switch_update(enum wcd_usbss_cable_types ctype,
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wcd_usbss_dpdm_switch_update(true, true);
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break;
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case WCD_USBSS_AATC:
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/* Update power mode as per wcd mixer ctls */
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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WCD_USBSS_USB_SS_CNTL, 0x07,
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wcd_usbss_ctxt_->cached_audio_pwr_mode);
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/* for AATC plug-in, change mode to FSM */
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audio_fsm_mode = WCD_USBSS_AUDIO_FSM;
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/* Disable all switches */
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@ -602,6 +617,9 @@ int wcd_usbss_switch_update(enum wcd_usbss_cable_types ctype,
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case WCD_USBSS_GND_MIC_SWAP_AATC:
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dev_info(wcd_usbss_ctxt_->dev,
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"%s: GND MIC Swap register updates..\n", __func__);
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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WCD_USBSS_USB_SS_CNTL, 0x07,
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wcd_usbss_ctxt_->cached_audio_pwr_mode);
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/* for GND MIC Swap, change mode to FSM */
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audio_fsm_mode = WCD_USBSS_AUDIO_FSM;
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/* Disable all switches */
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@ -629,6 +647,9 @@ int wcd_usbss_switch_update(enum wcd_usbss_cable_types ctype,
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WCD_USBSS_AUDIO_FSM_START, 0x01, 0x01, NULL, false, true);
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break;
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case WCD_USBSS_HSJ_CONNECT:
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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WCD_USBSS_USB_SS_CNTL, 0x07,
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wcd_usbss_ctxt_->cached_audio_pwr_mode);
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/* Select MG2, GSBU1 */
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regmap_update_bits(wcd_usbss_ctxt_->regmap,
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WCD_USBSS_SWITCH_SELECT0, 0x03, 0x1);
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