97bb4452e1
This change ports commit e2dc259daa ("kgsl: hwsched:
Add support for GMU tracepoints logging") to gen8.
Change-Id: I53f7d1c1a338911ffa0727477277904269596021
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
499 lines
15 KiB
C
499 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef __ADRENO_GEN8_GMU_H
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#define __ADRENO_GEN8_GMU_H
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#include <linux/mailbox_client.h>
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#include "adreno_gen8_hfi.h"
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#include "kgsl_gmu_core.h"
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struct gen8_dcvs_table {
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u32 gpu_level_num;
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u32 gmu_level_num;
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struct opp_gx_desc gx_votes[MAX_GX_LEVELS];
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struct opp_desc cx_votes[MAX_CX_LEVELS];
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};
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/**
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* struct gen8_gmu_device - GMU device structure
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* @ver: GMU Version information
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* @irq: GMU interrupt number
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* @fw_image: GMU FW image
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* @hfi_mem: pointer to HFI shared memory
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* @dump_mem: pointer to GMU debug dump memory
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* @gmu_log: gmu event log memory
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* @hfi: HFI controller
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* @num_gpupwrlevels: number GPU frequencies in GPU freq table
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* @num_bwlevel: number of GPU BW levels
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* @num_cnocbwlevel: number CNOC BW levels
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* @rpmh_votes: RPMh TCS command set for GPU, GMU voltage and bw scaling
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* @clks: GPU subsystem clocks required for GMU functionality
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* @wakeup_pwrlevel: GPU wake up power/DCVS level in case different
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* than default power level
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* @idle_level: Minimal GPU idle power level
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* @fault_count: GMU fault count
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* @mailbox: Messages to AOP for ACD enable/disable go through this
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* @log_wptr_retention: Store the log wptr offset on slumber
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*/
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struct gen8_gmu_device {
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struct {
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u32 core;
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u32 core_dev;
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u32 pwr;
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u32 pwr_dev;
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u32 hfi;
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} ver;
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struct platform_device *pdev;
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int irq;
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const struct firmware *fw_image;
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struct kgsl_memdesc *dump_mem;
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struct kgsl_memdesc *gmu_log;
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/** @vrb: GMU virtual register bank memory */
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struct kgsl_memdesc *vrb;
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/** @trace: gmu trace container */
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struct kgsl_gmu_trace trace;
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/** @gmu_init_scratch: Memory to store the initial HFI messages */
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struct kgsl_memdesc *gmu_init_scratch;
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/** @gpu_boot_scratch: Memory to store the bootup HFI messages */
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struct kgsl_memdesc *gpu_boot_scratch;
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struct gen8_hfi hfi;
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/** @pwrlevels: Array of GMU power levels */
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struct clk_bulk_data *clks;
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/** @num_clks: Number of entries in the @clks array */
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int num_clks;
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u32 idle_level;
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/** @freqs: Array of GMU frequencies */
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u32 freqs[GMU_MAX_PWRLEVELS];
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/** @vlvls: Array of GMU voltage levels */
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u32 vlvls[GMU_MAX_PWRLEVELS];
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struct kgsl_mailbox mailbox;
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/** @gmu_globals: Array to store gmu global buffers */
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struct kgsl_memdesc gmu_globals[GMU_KERNEL_ENTRIES];
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/** @global_entries: To keep track of number of gmu buffers */
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u32 global_entries;
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struct gmu_vma_entry *vma;
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u32 log_wptr_retention;
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/** @cm3_fault: whether gmu received a cm3 fault interrupt */
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atomic_t cm3_fault;
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/**
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* @itcm_shadow: Copy of the itcm block in firmware binary used for
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* snapshot
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*/
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void *itcm_shadow;
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/** @flags: Internal gmu flags */
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unsigned long flags;
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/** @rscc_virt: Pointer where RSCC block is mapped */
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void __iomem *rscc_virt;
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/** @domain: IOMMU domain for the kernel context */
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struct iommu_domain *domain;
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/** @log_stream_enable: GMU log streaming enable. Disabled by default */
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bool log_stream_enable;
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/** @log_group_mask: Allows overriding default GMU log group mask */
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u32 log_group_mask;
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struct kobject log_kobj;
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/*
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* @perf_ddr_bw: The lowest ddr bandwidth that puts CX at a corner at
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* which GMU can run at higher frequency.
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*/
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u32 perf_ddr_bw;
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/** @rdpm_cx_virt: Pointer where the RDPM CX block is mapped */
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void __iomem *rdpm_cx_virt;
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/** @rdpm_mx_virt: Pointer where the RDPM MX block is mapped */
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void __iomem *rdpm_mx_virt;
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/** @num_oob_perfcntr: Number of active oob_perfcntr requests */
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u32 num_oob_perfcntr;
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/** @acd_debug_val: DVM value to calibrate ACD for a level */
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u32 acd_debug_val;
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/** @stats_enable: GMU stats feature enable */
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bool stats_enable;
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/** @stats_mask: GMU performance countables to enable */
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u32 stats_mask;
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/** @stats_interval: GMU performance counters sampling interval */
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u32 stats_interval;
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/** @stats_kobj: kernel object for GMU stats directory in sysfs */
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struct kobject stats_kobj;
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/** @cp_init_hdr: raw command header for cp_init */
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u32 cp_init_hdr;
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/** @switch_to_unsec_hdr: raw command header for switch to unsecure packet */
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u32 switch_to_unsec_hdr;
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/** @dcvs_table: Table for gpu dcvs levels */
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struct gen8_dcvs_table dcvs_table;
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};
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/* Helper function to get to gen8 gmu device from adreno device */
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struct gen8_gmu_device *to_gen8_gmu(struct adreno_device *adreno_dev);
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/* Helper function to get to adreno device from gen8 gmu device */
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struct adreno_device *gen8_gmu_to_adreno(struct gen8_gmu_device *gmu);
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/**
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* gen8_reserve_gmu_kernel_block() - Allocate a global gmu buffer
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* @gmu: Pointer to the gen8 gmu device
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* @addr: Desired gmu virtual address
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* @size: Size of the buffer in bytes
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* @vma_id: Target gmu vma where this buffer should be mapped
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* @align: Alignment for the GMU VA and GMU mapping size
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*
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* This function allocates a global gmu buffer and maps it in
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* the desired gmu vma
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*
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* Return: Pointer to the memory descriptor or error pointer on failure
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*/
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struct kgsl_memdesc *gen8_reserve_gmu_kernel_block(struct gen8_gmu_device *gmu,
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u32 addr, u32 size, u32 vma_id, u32 align);
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/**
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* gen8_reserve_gmu_kernel_block_fixed() - Maps phyical resource address to gmu
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* @gmu: Pointer to the gen8 gmu device
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* @addr: Desired gmu virtual address
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* @size: Size of the buffer in bytes
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* @vma_id: Target gmu vma where this buffer should be mapped
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* @resource: Name of the resource to get the size and address to allocate
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* @attrs: Attributes for the mapping
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* @align: Alignment for the GMU VA and GMU mapping size
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*
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* This function maps the physcial resource address to desired gmu vma
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*
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* Return: Pointer to the memory descriptor or error pointer on failure
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*/
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struct kgsl_memdesc *gen8_reserve_gmu_kernel_block_fixed(struct gen8_gmu_device *gmu,
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u32 addr, u32 size, u32 vma_id, const char *resource, int attrs, u32 align);
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/**
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* gen8_alloc_gmu_kernel_block() - Allocate a gmu buffer
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* @gmu: Pointer to the gen8 gmu device
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* @md: Pointer to the memdesc
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* @size: Size of the buffer in bytes
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* @vma_id: Target gmu vma where this buffer should be mapped
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* @attrs: Attributes for the mapping
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*
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* This function allocates a buffer and maps it in the desired gmu vma
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*
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* Return: 0 on success or error code on failure
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*/
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int gen8_alloc_gmu_kernel_block(struct gen8_gmu_device *gmu,
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struct kgsl_memdesc *md, u32 size, u32 vma_id, int attrs);
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/**
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* gen8_gmu_import_buffer() - Import a gmu buffer
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* @gmu: Pointer to the gen8 gmu device
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* @vma_id: Target gmu vma where this buffer should be mapped
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* @md: Pointer to the memdesc to be mapped
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* @attrs: Attributes for the mapping
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* @align: Alignment for the GMU VA and GMU mapping size
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*
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* This function imports and maps a buffer to a gmu vma
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*
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* Return: 0 on success or error code on failure
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*/
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int gen8_gmu_import_buffer(struct gen8_gmu_device *gmu, u32 vma_id,
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struct kgsl_memdesc *md, u32 attrs, u32 align);
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/**
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* gen8_free_gmu_block() - Free a gmu buffer
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* @gmu: Pointer to the gen8 gmu device
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* @md: Pointer to the memdesc that is to be freed
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*
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* This function frees a gmu block allocated by gen8_reserve_gmu_kernel_block()
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*/
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void gen8_free_gmu_block(struct gen8_gmu_device *gmu, struct kgsl_memdesc *md);
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/**
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* gen8_build_rpmh_tables - Build the rpmh tables
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* @adreno_dev: Pointer to the adreno device
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*
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* This function creates the gpu dcvs and bw tables
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*
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* Return: 0 on success and negative error on failure
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*/
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int gen8_build_rpmh_tables(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_gx_is_on - Check if GX is on
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* @adreno_dev: Pointer to the adreno device
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*
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* This function reads pwr status registers to check if GX
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* is on or off
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*/
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bool gen8_gmu_gx_is_on(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_device_probe - GEN8 GMU snapshot function
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* @pdev: Pointer to the platform device
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* @chipid: Chipid of the target
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* @gpucore: Pointer to the gpucore
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*
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* The target specific probe function for gmu based gen8 targets.
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*/
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int gen8_gmu_device_probe(struct platform_device *pdev,
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u32 chipid, const struct adreno_gpu_core *gpucore);
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/**
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* gen8_gmu_reset - Reset and restart the gmu
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_reset(struct adreno_device *adreno_dev);
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/**
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* gen8_enable_gpu_irq - Enable gpu interrupt
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* @adreno_dev: Pointer to the adreno device
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*/
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void gen8_enable_gpu_irq(struct adreno_device *adreno_dev);
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/**
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* gen8_disable_gpu_irq - Disable gpu interrupt
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* @adreno_dev: Pointer to the adreno device
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*/
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void gen8_disable_gpu_irq(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_snapshot- Take snapshot for gmu targets
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* @adreno_dev: Pointer to the adreno device
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* @snapshot: Pointer to the snapshot structure
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*
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* Send an NMI to gmu if we hit a gmu fault. Then take gmu
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* snapshot and carry on with rest of the gen8 snapshot
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*/
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void gen8_gmu_snapshot(struct adreno_device *adreno_dev,
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struct kgsl_snapshot *snapshot);
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/**
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* gen8_gmu_probe - Probe gen8 gmu resources
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* @device: Pointer to the kgsl device
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* @pdev: Pointer to the gmu platform device
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*
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* Probe the gmu and hfi resources
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_probe(struct kgsl_device *device,
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struct platform_device *pdev);
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/**
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* gen8_gmu_parse_fw - Parse the gmu fw binary
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_parse_fw(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_memory_init - Allocate gmu memory
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* @adreno_dev: Pointer to the adreno device
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*
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* Allocates the gmu log buffer and others if ndeeded.
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_memory_init(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_aop_send_acd_state - Enable or disable acd feature in aop
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* @gmu: Pointer to the gen8 gmu device
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* @flag: Boolean to enable or disable acd in aop
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*
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* This function enables or disables gpu acd feature using mailbox
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*/
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void gen8_gmu_aop_send_acd_state(struct gen8_gmu_device *gmu, bool flag);
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/**
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* gen8_gmu_load_fw - Load gmu firmware
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* @adreno_dev: Pointer to the adreno device
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*
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* Loads the gmu firmware binary into TCMs and memory
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_load_fw(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_device_start - Bring gmu out of reset
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_device_start(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_hfi_start - Indicate hfi start to gmu
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* @device: Pointer to the kgsl device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_hfi_start(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_itcm_shadow - Create itcm shadow copy for snapshot
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_itcm_shadow(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_register_config - gmu register configuration
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* @adreno_dev: Pointer to the adreno device
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*
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* Program gmu regsiters based on features
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*/
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void gen8_gmu_register_config(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_version_info - Get gmu firmware version
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_version_info(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_irq_enable - Enable gmu interrupts
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* @adreno_dev: Pointer to the adreno device
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*/
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void gen8_gmu_irq_enable(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_irq_disable - Disaable gmu interrupts
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* @adreno_dev: Pointer to the adreno device
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*/
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void gen8_gmu_irq_disable(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_suspend - Hard reset the gpu and gmu
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* @adreno_dev: Pointer to the adreno device
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*
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* In case we hit a gmu fault, hard reset the gpu and gmu
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* to recover from the fault
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*/
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void gen8_gmu_suspend(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_oob_set - send gmu oob request
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* @device: Pointer to the kgsl device
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* @req: Type of oob request as defined in enum oob_request
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*
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* Request gmu to keep gpu powered up till the oob is cleared
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_oob_set(struct kgsl_device *device, enum oob_request oob);
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/**
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* gen8_gmu_oob_clear - clear an asserted oob request
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* @device: Pointer to the kgsl device
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* @req: Type of oob request as defined in enum oob_request
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*
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* Clear a previously requested oob so that gmu can power
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* collapse the gpu
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*/
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void gen8_gmu_oob_clear(struct kgsl_device *device, enum oob_request oob);
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/**
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* gen8_gmu_wait_for_lowest_idle - wait for gmu to complete ifpc
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* @adreno_dev: Pointer to the adreno device
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*
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* If ifpc is enabled, wait for gmu to put gpu into ifpc.
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_wait_for_lowest_idle(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_wait_for_idle - Wait for gmu to become idle
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_wait_for_idle(struct adreno_device *adreno_dev);
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/**
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* gen8_rscc_sleep_sequence - Trigger rscc sleep sequence
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_rscc_sleep_sequence(struct adreno_device *adreno_dev);
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/**
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* gen8_rscc_wakeup_sequence - Trigger rscc wakeup sequence
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* @adreno_dev: Pointer to the adreno device
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_rscc_wakeup_sequence(struct adreno_device *adreno_dev);
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/**
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* gen8_halt_gbif - Halt CX and GX requests in GBIF
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* @adreno_dev: Pointer to the adreno device
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*
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* Clear any pending GX or CX transactions in GBIF and
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* deassert GBIF halt
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_halt_gbif(struct adreno_device *adreno_dev);
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/**
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* gen8_gmu_remove - Clean up gmu probed resources
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* @device: Pointer to the kgsl device
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*/
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void gen8_gmu_remove(struct kgsl_device *device);
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/**
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* gen8_gmu_enable_clks - Enable gmu clocks
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* @adreno_dev: Pointer to the adreno device
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* @level: GMU frequency level
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*
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* Return: 0 on success or negative error on failure
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*/
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int gen8_gmu_enable_clks(struct adreno_device *adreno_dev, u32 level);
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/**
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* gen8_gmu_handle_watchdog - Handle watchdog interrupt
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* @adreno_dev: Pointer to the adreno device
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*/
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void gen8_gmu_handle_watchdog(struct adreno_device *adreno_dev);
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|
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/**
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* gen8_gmu_send_nmi - Send NMI to GMU
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* @device: Pointer to the kgsl device
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* @force: Boolean to forcefully send NMI irrespective of GMU state
|
|
*/
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void gen8_gmu_send_nmi(struct kgsl_device *device, bool force);
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/**
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* gen8_gmu_add_to_minidump - Register gen8_device with va minidump
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* @adreno_dev: Pointer to the adreno device
|
|
*/
|
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int gen8_gmu_add_to_minidump(struct adreno_device *adreno_dev);
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|
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/**
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* gen8_snapshot_gmu_mem - Snapshot a GMU memory descriptor
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* @device: Pointer to the kgsl device
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* @buf: Destination snapshot buffer
|
|
* @remain: Remaining size of the snapshot buffer
|
|
* @priv: Opaque handle
|
|
*
|
|
* Return: Number of bytes written to snapshot buffer
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|
*/
|
|
size_t gen8_snapshot_gmu_mem(struct kgsl_device *device,
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u8 *buf, size_t remain, void *priv);
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|
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/**
|
|
* gen8_bus_ab_quantize - Calculate the AB vote that needs to be sent to GMU
|
|
* @adreno_dev: Handle to the adreno device
|
|
* @ab: ab request that needs to be scaled in MBps
|
|
*
|
|
* Returns the AB value that needs to be prefixed to bandwidth vote in kbps
|
|
*/
|
|
u32 gen8_bus_ab_quantize(struct adreno_device *adreno_dev, u32 ab);
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#endif
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