For Gen8 target SMMU stalled on fault status is not
available through the HW register. Hence implement
new function to get the smmu stall on fault status.
Change-Id: I78aa030b8eb7586f1a6c272613491263fa2e95ba
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
Signed-off-by: Kaushal Sanadhya <quic_ksanadhy@quicinc.com>
In hardware scheduling some events originating in GMU
are not captured on host side. The preemption tracepoints
for preempt trigger and preempt done are examples. Such
tracepoints need to be continued to be supported with
HW scheduling for backwards compatibility and profiling
or debugging. We therefore need a means to be able to log
these events on the GMU with the timestamp of when they
occur and convey them to the host such that kgsl can log
them lazily to ftrace.
Change-Id: Ib12e2341f928091ad3918841c267a8f2e92dc766
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
There is a need for sharing certain bits of information
between kgsl and GMU before GMU has booted. So far, the
only way to do that is to use GMU scratch registers. But,
we only have a very limited number of scratch registers.
So, allocate a buffer in system memory such that each
dword in this buffer acts as a virtual scratch register.
Change-Id: Ib7a265283ec2cd04897a24cc974c6c2e4adebb11
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
This change adds code to implement warmboot for GPU
which will help us reduce the bootup latency of GPU.
Change-Id: Ie40fb03cc56fe2e39485a29e239fd8649cd246b0
Signed-off-by: Urvashi Agrawal <quic_urvaagra@quicinc.com>
Currently NMI is sent for GMU fault during snapshot collection
only. Thus, GMU is not stalled properly if there is a pending
snapshot which is not read yet. Send NMI irrespective of snapshot
collection in case of GMU fault.
Change-Id: If6d5e08bfc43b63acc85a28936398a9ca6059b83
Signed-off-by: NISARG SHETH <quic_nsheth@quicinc.com>
Snapshot parsers need this to be able to identify this buffer
uniquely (using type=SNAPSHOT_GMU_MEM_HW_FENCE) to parse
it accordingly. Also, remove KGSL_MEMDESC_IOMEM flag as it is
no longer needed.
Change-Id: If0bf9c0efe9a099a8b6790737642b0fe2d69ce29
Signed-off-by: Harshdeep Dhatt <quic_hdhatt@quicinc.com>
GMU TCMs read over side-band debug controller interface is
supported on gen7_2_x family. Thus, dump GMU DTCM through DBGC
interface in snapshot.
Change-Id: I38bb482e1e81c9e31125fc76ce717d4493600c96
Signed-off-by: Kamal Agrawal <quic_kamaagra@quicinc.com>
There is difference in register specification within Gen7
family GPU’s. So split header files as per the hardware
differences for easier maintenance.
Change-Id: I79eeab92b9aa921d70604b2145238f101a642b7b
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
External registers help to understand the system state. Currently,
it is dumped in the mid of snapshot flow. If there is an error while
collecting snapshot, these registers may not be captured. Therefore,
dump external registers in the beginning of snapshot flow.
Change-Id: Ibb73782501d56032f77b88603f4e2d7118fa6fb1
Signed-off-by: Kamal Agrawal <quic_kamaagra@quicinc.com>
Move snapshot related code from gmu file to gmu snapshot file.
Change-Id: I5082226786aeb17c1331a341d0daf2fa21a12365
Signed-off-by: Kamal Agrawal <quic_kamaagra@quicinc.com>
Query HFI_VALUE_CONTEXT_QUEUE value from GMU FW. If GMU responds with
a non-zero value, then GMU FW supports context queues. If so, allocate
per context GMU buffers and use them to dispatch submissions instead of
the dispatch queues. Each RB priority gets its own dispatch interrupt bit.
Capture these buffers in a snapshot.
Change-Id: I228432088f2415f7dd35da29c45474bd41402859
Signed-off-by: Harshdeep Dhatt <quic_hdhatt@quicinc.com>
GPU GX will be treated ON when the gfx clock and gxgdsc is
enabled. For noGMU based targets this is always true under
the assumptions both are enabled. Fix this by checking the
gfx clock and gxgdsc status for nogmu targets.
Change-Id: I565e3ac7e13179da89aea122b0cc21078192fe87
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Signed-off-by: Rohan Sethi <quic_rohsethi@quicinc.com>
Add the new blocks and registers for the Gen7_2_0.
Change-Id: Ife11844cddcd8e2a0a07ec5d2e463c6a23efc163
Signed-off-by: Urvashi Agrawal <quic_urvaagra@quicinc.com>
Signed-off-by: Lynus Vaz <quic_lvaz@quicinc.com>
Gmu global such as ipc core memdesc is not mapped to host.
Skip these kind of gmu global memdesc dumping to snapshot
to avoid null pointer dereference.
Change-Id: Idba9168e854430253624629ed45826015773148f
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
Snapshot of the Adreno GPU (KGSL) driver from msm-5.10 commit
b809380cd817 (Merge "defconfig: enable new touch NT36XXX_SPI").
Add in the Makefile and other changes required to compile kgsl code
outside the kernel tree.
Change-Id: I63801a9c9ebcd6e2dbd20f023b664caf7255818c
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
