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icnss2: Add cmem support for wcn7750

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Add cmem support for wcn7750 and pass the mem info
as part of soc info to wlan host driver.

Change-Id: Icb40d8cfe50cdd160471b8210a67ce9dc8dd3ad0
CRs-Fixed: 3750961
This commit is contained in:
Sandeep Singh 2024-03-04 15:14:03 +05:30 committed by Ravindra Konda
parent b6c97a4162
commit f6e67cd993
4 changed files with 24 additions and 2 deletions
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2
icnss2/main.c
View File

@ -3400,6 +3400,8 @@ int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
info->rd_card_chain_cap = priv->rd_card_chain_cap;
info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
info->phy_qam_cap = priv->phy_qam_cap;
memcpy(&info->dev_mem_info, &priv->dev_mem_info,
sizeof(info->dev_mem_info));
return 0;
}

1
icnss2/main.h
View File

@ -433,6 +433,7 @@ struct icnss_priv {
uint32_t nr_mem_region;
struct icnss_mem_region_info
mem_region[WLFW_MAX_NUM_MEMORY_REGIONS];
struct icnss_dev_mem_info dev_mem_info[ICNSS_MAX_DEV_MEM_NUM];
struct dentry *root_dentry;
spinlock_t on_off_lock;
struct icnss_stats stats;

14
icnss2/qmi.c
View File

@ -695,7 +695,7 @@ out:
int wlfw_cap_send_sync_msg(struct icnss_priv *priv)
{
int ret;
int ret = 0, i = 0;
struct wlfw_cap_req_msg_v01 *req;
struct wlfw_cap_resp_msg_v01 *resp;
struct qmi_txn txn;
@ -774,6 +774,18 @@ int wlfw_cap_send_sync_msg(struct icnss_priv *priv)
WLFW_MAX_TIMESTAMP_LEN + 1);
}
if (resp->dev_mem_info_valid) {
for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
priv->dev_mem_info[i].start =
resp->dev_mem_info[i].start;
priv->dev_mem_info[i].size =
resp->dev_mem_info[i].size;
icnss_pr_info("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
i, priv->dev_mem_info[i].start,
priv->dev_mem_info[i].size);
}
}
if (resp->voltage_mv_valid) {
priv->cpr_info.voltage = resp->voltage_mv;
icnss_pr_dbg("Voltage for CPR: %dmV\n",

9
inc/icnss2.h
View File

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _ICNSS_WLAN_H_
#define _ICNSS_WLAN_H_
@ -13,6 +13,7 @@
#define IWCN_MAX_IRQ_REGISTRATIONS 32
#define ICNSS_MAX_TIMESTAMP_LEN 32
#define ICNSS_WLFW_MAX_BUILD_ID_LEN 128
#define ICNSS_MAX_DEV_MEM_NUM 4
#define DEVICE_NAME_MAX 10
enum icnss_uevent {
@ -40,6 +41,11 @@ struct icnss_uevent_data {
void *data;
};
struct icnss_dev_mem_info {
u64 start;
u64 size;
};
/* Device information like supported device ids, etc*/
struct device_info {
char name[DEVICE_NAME_MAX];
@ -165,6 +171,7 @@ struct icnss_soc_info {
enum icnss_rd_card_chain_cap rd_card_chain_cap;
enum icnss_phy_he_channel_width_cap phy_he_channel_width_cap;
enum icnss_phy_qam_cap phy_qam_cap;
struct icnss_dev_mem_info dev_mem_info[ICNSS_MAX_DEV_MEM_NUM];
};
#define icnss_register_driver(ops) \