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disp: msm: sde: update fudgefactor during mdp clock calculation

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Add changes to include qseed inefficiency factor during mdp
core clock calculation. This calculated value is sent to
mmrm driver to set with reserve only flag.

Change-Id: If19356ba36e7f9155fdfeeadead9260d1c56dc6b
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
This commit is contained in:
Jayaprakash Madisetty 2024-06-12 13:10:37 +05:30
parent 2abf17e048
commit da0c9886e7
1 changed files with 28 additions and 6 deletions
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34
msm/sde/sde_crtc.c
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@ -5043,13 +5043,21 @@ static int _sde_crtc_vblank_enable(
static void _sde_crtc_reserve_resource(struct drm_crtc *crtc, struct drm_connector *conn)
{
struct sde_kms *kms;
struct drm_encoder *encoder;
u32 min_transfer_time = 0, lm_count = 1;
u64 mode_clock_hz = 0, updated_fps = 0, topology_id;
struct drm_encoder *encoder;
u32 inf_factor = 105, lm_width, num_bubbles = 0;
if (!crtc || !conn)
return;
kms = _sde_crtc_get_kms(crtc);
if (!kms || !kms->catalog) {
SDE_ERROR("invalid kms\n");
return;
}
encoder = conn->state->best_encoder;
if (!sde_encoder_is_built_in_display(encoder))
return;
@ -5063,17 +5071,31 @@ static void _sde_crtc_reserve_resource(struct drm_crtc *crtc, struct drm_connect
updated_fps = drm_mode_vrefresh(&crtc->mode);
topology_id = sde_connector_get_topology_name(conn);
if (TOPOLOGY_DUALPIPE_MODE(topology_id))
if (TOPOLOGY_DUALPIPE_MODE(topology_id)) {
lm_count = 2;
else if (TOPOLOGY_QUADPIPE_MODE(topology_id))
if (SDE_HW_MAJOR(kms->catalog->hw_rev) == SDE_HW_MAJOR(SDE_HW_VER_A00))
num_bubbles = 40;
} else if (TOPOLOGY_QUADPIPE_MODE(topology_id)) {
lm_count = 4;
if (SDE_HW_MAJOR(kms->catalog->hw_rev) == SDE_HW_MAJOR(SDE_HW_VER_A00))
num_bubbles = 56;
}
if (SDE_HW_MAJOR(kms->catalog->hw_rev) == SDE_HW_MAJOR(SDE_HW_VER_900)
&& lm_count > 1)
num_bubbles = 30;
lm_width = (crtc->mode.hdisplay) / lm_count;
num_bubbles = mult_frac(num_bubbles, 100, lm_width);
inf_factor = max((100 + num_bubbles), inf_factor);
/* mode clock = [(h * v * fps * 1.05) / (num_lm)] */
mode_clock_hz = mult_frac(crtc->mode.htotal * crtc->mode.vtotal * updated_fps, 105, 100);
mode_clock_hz = mult_frac(crtc->mode.htotal * crtc->mode.vtotal * updated_fps,
inf_factor, 100);
mode_clock_hz = div_u64(mode_clock_hz, lm_count);
SDE_DEBUG("[%s] h=%d v=%d fps=%d lm=%d mode_clk=%u\n",
SDE_DEBUG("[%s] h=%d v=%d fps=%d lm=%d mode_clk=%u inf_factor=%u\n",
crtc->mode.name, crtc->mode.htotal, crtc->mode.vtotal,
updated_fps, lm_count, mode_clock_hz);
updated_fps, lm_count, mode_clock_hz, inf_factor);
sde_core_perf_crtc_reserve_res(crtc, mode_clock_hz);
}