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qcacld-3.0: enable HAL_DELAYED_REG_WRITE_V2 and LOCK_LESS_ACCESS

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Enable FEATURE_HAL_DELAYED_REG_WRITE_V2 support for Tx rings
register writes and QCA_OL_DP_SRNG_LOCK_LESS_ACCESS support
for Rx rings register writes, for moselle platforms.

Change-Id: I6b2469d22a37a097fa721269d311c0076c3b89a0
CRs-Fixed: 2873528
This commit is contained in:
Vevek Venkatesan 2021-01-16 18:35:56 +05:30 committed by Gerrit - the friendly Code Review server
parent 10b241f2d3
commit d478e8a285
2 changed files with 4 additions and 0 deletions
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2
Kbuild
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@ -2678,6 +2678,8 @@ cppflags-$(CONFIG_PLD_PCIE_INIT_FLAG) += -DCONFIG_PLD_PCIE_INIT
cppflags-$(CONFIG_WLAN_FEATURE_DP_RX_THREADS) += -DFEATURE_WLAN_DP_RX_THREADS
cppflags-$(CONFIG_WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT) += -DWLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
cppflags-$(CONFIG_FEATURE_HAL_DELAYED_REG_WRITE) += -DFEATURE_HAL_DELAYED_REG_WRITE
cppflags-$(CONFIG_FEATURE_HAL_DELAYED_REG_WRITE_V2) += -DFEATURE_HAL_DELAYED_REG_WRITE_V2
cppflags-$(CONFIG_QCA_OL_DP_SRNG_LOCK_LESS_ACCESS) += -DQCA_OL_DP_SRNG_LOCK_LESS_ACCESS
cppflags-$(CONFIG_PLD_USB_CNSS) += -DCONFIG_PLD_USB_CNSS

2
configs/default_defconfig
View File

@ -527,6 +527,8 @@ ifeq ($(CONFIG_CNSS_QCA6750), y)
CONFIG_QCA6750_HEADERS_DEF := y
CONFIG_QCA_WIFI_QCA6750 := y
CONFIG_FEATURE_HAL_DELAYED_REG_WRITE := n
CONFIG_FEATURE_HAL_DELAYED_REG_WRITE_V2 := y
CONFIG_QCA_OL_DP_SRNG_LOCK_LESS_ACCESS := y
endif
ifeq ($(CONFIG_CNSS_QCA6750), y)