Merge "asoc: reset scp1_val and scp2_val after ssr"

This commit is contained in:
qctecmdr 2024-02-28 08:26:04 -08:00 committed by Gerrit - the friendly Code Review server
commit bf838c54f7
3 changed files with 14 additions and 14 deletions

View File

@ -2130,12 +2130,6 @@ int wcd9378_micbias_control(struct snd_soc_component *component,
case MICB_DISABLE:
if (wcd9378->micb_ref[micb_index] > 0)
wcd9378->micb_ref[micb_index]--;
if (!wcd9378->dev_up) {
dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
__func__, req);
ret = -ENODEV;
goto done;
}
if ((wcd9378->micb_ref[micb_index] == 0) &&
(wcd9378->pullup_ref[micb_index] > 0)) {
/*PULL UP?*/
@ -2297,6 +2291,11 @@ static int wcd9378_event_notify(struct notifier_block *block,
wcd9378_get_logical_addr(wcd9378->tx_swr_dev);
wcd9378_get_logical_addr(wcd9378->rx_swr_dev);
wcd9378->tx_swr_dev->scp1_val = 0;
wcd9378->tx_swr_dev->scp2_val = 0;
wcd9378->rx_swr_dev->scp1_val = 0;
wcd9378->rx_swr_dev->scp2_val = 0;
wcd9378_init_reg(component);
regcache_mark_dirty(wcd9378->regmap);
regcache_sync(wcd9378->regmap);

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _LINUX_SOUNDWIRE_H
@ -273,6 +273,8 @@ struct swr_device {
bool paging_support;
struct irq_domain *slave_irq;
bool slave_irq_pending;
u8 scp1_val; /*used for v1.2 or class devices*/
u8 scp2_val; /*used for v1.2 or class devices*/
};
static inline struct swr_device *to_swr_device(struct device *dev)

View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/device.h>
@ -24,8 +24,7 @@
#define SCP1_ADDRESS (0X48)
#define SCP2_ADDRESS (0X49)
#define SDCA_READ_WRITE_BIT (0x8000)
u8 g_scp1_val;
u8 g_scp2_val;
static DEFINE_MUTEX(swr_rw_lock);
static int regmap_swr_reg_address_get(struct swr_device *swr,
@ -43,24 +42,24 @@ static int regmap_swr_reg_address_get(struct swr_device *swr,
scp2_val = temp >> SCP2_ADDRESS_VAL_SHIFT;
if (scp1_val || scp2_val) {
if (scp1_val != g_scp1_val) {
if (scp1_val != swr->scp1_val) {
ret = swr_write(swr, swr->dev_num, SCP1_ADDRESS, &scp1_val);
if (ret < 0) {
dev_err(&swr->dev, "%s: write reg scp1_address failed, err %d\n",
__func__, ret);
return ret;
}
g_scp1_val = scp1_val;
swr->scp1_val = scp1_val;
}
if (scp2_val != g_scp2_val) {
if (scp2_val != swr->scp2_val) {
ret = swr_write(swr, swr->dev_num, SCP2_ADDRESS, &scp2_val);
if (ret < 0) {
dev_err(&swr->dev, "%s: write reg scp2_address failed, err %d\n",
__func__, ret);
return ret;
}
g_scp2_val = scp2_val;
swr->scp2_val = scp2_val;
}
*reg_addr = (*(u16 *)reg | SDCA_READ_WRITE_BIT);
dev_dbg(&swr->dev, "%s: reg: 0x%x, scp1_val: 0x%x, scp2_val: 0x%x, reg_addr: 0x%x\n",