asoc: cdc: wsa-macro: add 1msec delay before resetting FS cntrl

added 1msec delay before resetting FS cntrl, to ensure no
glitch at the start of VI feedback.

Change-Id: Ia9ae296f336e4deb4b8bedb718316a6772466a95
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
This commit is contained in:
sarath varma ganapathiraju 2024-02-06 18:53:47 +05:30 committed by Sarath Varma Ganapathiraju
parent 3737f300d4
commit a1c0d5b7bb

View File

@ -1132,6 +1132,7 @@ static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *com
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x20);
usleep_range(1000, 1500);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x0F, val);
@ -1144,6 +1145,7 @@ static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *com
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x10);
usleep_range(1000, 1500);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
@ -1161,6 +1163,7 @@ static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *com
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x20);
usleep_range(1000, 1500);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x0F, val);
@ -1173,6 +1176,7 @@ static int lpass_cdc_wsa_macro_enable_vi_decimator(struct snd_soc_component *com
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x10);
usleep_range(1000, 1500);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);