From 8f70367411f97d1ff9d6dc09c6b0ffc3be729e6e Mon Sep 17 00:00:00 2001
From: Naman Padhiar <quic_npadhiar@quicinc.com>
Date: Wed, 7 Feb 2024 20:45:12 +0530
Subject: [PATCH] cnss2: Start Device RDDM timer after Host REQ

For the cases where SOL is not enabled, Host REQ
reset will be used for second RDDM entry. If Host
REQ reset is success, start RDDM timer to wait for
RDDM status callback from MHI. If RDDM timer get
timedout read EE register to check for RDDM state
and schedule recovery.

Change-Id: I34253526ff4b20aedf8ab8f1f49831f68a3e0a35
CRs-Fixed: 3727389
---
 cnss2/pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/cnss2/pci.c b/cnss2/pci.c
index d243ac78a2..99509b19af 100644
--- a/cnss2/pci.c
+++ b/cnss2/pci.c
@@ -6135,7 +6135,7 @@ int cnss_pci_force_fw_assert_hdlr(struct cnss_pci_data *pci_priv)
 		cnss_pr_dbg("Sending Host Reset Req\n");
 		if (!cnss_mhi_force_reset(pci_priv)) {
 			ret = 0;
-			goto runtime_pm_put;
+			goto mhi_reg_dump;
 		}
 
 		cnss_pci_dump_debug_reg(pci_priv);
@@ -6145,6 +6145,7 @@ int cnss_pci_force_fw_assert_hdlr(struct cnss_pci_data *pci_priv)
 		goto runtime_pm_put;
 	}
 
+mhi_reg_dump:
 	if (pci_priv->is_smmu_fault) {
 		cnss_pci_mhi_reg_dump(pci_priv);
 		pci_priv->is_smmu_fault = false;